JPH0877286A - Interface device for memory card - Google Patents

Abstract

PURPOSE: To provide the interface device which effectively connects a memory card of personal computer standards to a host processor. CONSTITUTION: A host interface part 210 interfaces a control signal the host processor and supplies its access information to a sequence control part 230 and a data control part 220. The sequence control part 230 receives the control signal from the host interface part 210 and also receives a state signal from the memory card to control the data control part 23 according to the sequence corresponding to the, memory card. Specically, when the memory card is connected, its data management information is read out by the data control part 230 and stored in a buffer 240. When the host processor accesses the memory card thereafter, its management is performed with the data management information stored in the buffer 240 and after the access ends, the data management information in the buffer 240 is rewritten sequentially, and then written on the memory card at the end of the processing.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory card interface device for connecting an IC memory card equipped with a semiconductor memory and a host processing device for handling the data, and particularly to a digital electronic still camera or the like. The present invention relates to a memory card interface device suitable for use when connecting a memory card of personal computer standard to a host processing device.

[0002]

2. Description of the Related Art Recently, for example, in a digital electronic still camera, an IC memory card using a semiconductor memory has been used instead of a floppy disk as a medium for recording digital data representing an imaged image.

In a personal computer or the like,
Standardization of a so-called PC card that can handle an I / O card that has a card such as a modem and other input / output (I / O) devices and the IC memory card described above has been achieved. There is. At this time, the PC card is, for example, PC
-In order to be able to read and write data with the same access as the existing hard disk of personal computer standard such as AT standard, for example, ATA (At Att
achment Interface for Disk Drives) specifications are considered. In this case, to access the memory, use the same address and command as the hard disk, such as the number of sectors, sector position, cylinder position, and head position.
Data is read and written in each sector, for example, in units of 512 bytes.

As a data management system inside the memory card, for example, a DOS (Disc Operation System) file format generally used in personal computers is adopted. In this case, each data recorded on the memory card is handled as a file, and each file has a predetermined capacity, for example, 10 files.
It is managed in 24-byte cluster units. Therefore,
In the management area of the memory card, a management table called FAT (File Allocation Table) that manages each file in cluster units is prepared. When accessing the data area, the table is accessed and the data for each cluster is accessed. Are read and written. For example, when one file extends over a plurality of clusters, the chain and start information of each cluster are written together with their chain information, and data is read and written in cluster units based on the information. Of course, when the data writing is executed, the contents of the management area are rewritten.

[0005]

However, when the memory card of the personal computer standard as described above is connected to a host processor which is not a personal computer system such as a digital electronic still camera, the host processor does not have to be connected to the host processor. There was a problem that the interface with the memory card had to be optimized.

For example, in a digital electronic still camera
When connecting a memory card that uses the DOS file format, the data from the camera is a large amount of image data, so the number of clusters that occupy inside the card increases and the data management area of the memory card, for example, There is a problem that the number of times the FAT area is accessed becomes large and the access to the memory card from the system side becomes complicated.

In this case, in particular, a flash EE in which erasing and writing are executed for each predetermined capacity as a memory card.
When a PROM (electrically erasable and rewritable ROM) is used as a memory element, data must be accessed for each erase unit. For example, even when rewriting 1 byte of data in the data management area, it is necessary to erase the 1024 bytes of data in block units and then rewrite that portion. However, there is a problem that it becomes slower and there is a disadvantage in terms of reliability such as whether or not the information is correctly written in the memory card. Also, when using a PC card with ATA specifications, access is still required in units of 512 bytes.
Similar to the above, the processing on the system side is burdened, and there is a risk of problems in terms of reliability.

The present invention solves the above-mentioned problems of the prior art, and solves the problems of a DOS file format memory card,
It is another object of the present invention to provide a memory card interface device that can effectively connect an ATA specification memory card to a host processing device such as a digital electronic still camera.

[0009]

In order to solve the above-mentioned problems, a memory card interface device according to the present invention has a data management area for managing stored data in block units of a predetermined capacity. In a memory card interface device that detachably connects a memory card whose area is rewritten in byte units to a host processing device that accesses data to this memory card, a control signal for accessing the memory card from the host processing device is transmitted. Based on a control signal from the host interface unit that interfaces, a sequence control unit that executes a sequence control when accessing the memory card by receiving a control signal from the host interface unit and a status signal from the memory card, From memory card A data control unit that reads data from the processing device and writes data from the host processing device to the memory card, and the data control unit stores the data in the memory card when the memory card is accessed from the host processing device. The data control unit has a management information storage unit that reads out the information in the data management region and retains the information in a rewritable manner. It is characterized by having a data management information rewriting function of notifying and rewriting the contents according to an instruction from the host processor via the host interface section.

In this case, the memory card is a personal computer standard memory card in which each data is accessed by a predetermined capacity, and the management information storing means of this apparatus is at least the access capacity of the personal computer standard memory card. Has the same capacity as
The data control means may read the block including the data management area of the memory card into the management information storage means and rewrite the contents in byte units.

Further, the memory card may be a flash EEPROM which is erased for each predetermined capacity, and the management information storage means of this device has at least the same capacity as the erase unit of the flash EEPROM, The data control means reads information of a predetermined capacity including the data management area of the memory card into the management information storage means, rewrites the contents in byte units, and the sequence control section has a predetermined capacity area including the data management area. It is advisable to write the information including the data management area rewritten after erasing the data in the erased area.

Further, when initializing the data management area of the memory card, the host interface section writes a predetermined unique value to the management information storage means via the data control means, and the data control means writes the unique value. It is advantageous to initialize the data management area by writing the contents of the management information storage means in the data management area of the memory card.

Further, it is advantageous that the data control section further has at least two data storage means for buffering data of each block unit having a predetermined capacity.

The host processing device is a digital electronic still camera that records and reproduces picked-up image data, the host interface unit is connected to a central processing unit that performs main control of the digital electronic still camera, and the data control unit is The data management information of the memory card stored in the management information recording means is supplied to the central processing unit of the digital electronic still camera through the host interface section, and the contents of the management information recording means are rewritten based on the access information. Good to do.

[0015]

According to the memory card interface device of the present invention, when the memory card is accessed from the host processing device, first, the data management information including the management table stored in the data management area of the memory card is passed through the data control unit. It is read and stored in the management information storage means. With respect to the data management information of the memory card stored in the management information storage means, a portion required for access is sent to the host processing device via the host interface section at any time in response to a request from the host processing device, and based on the information. The host processing unit sends a control signal for accessing the memory card to the host interface unit. For example, when reading data, the host processing device sends a start address indicating the start of data to the sequence control unit via the host interface unit. As a result, the data control unit is controlled based on the control signal from the sequence control unit to sequentially read the data from the memory card and transfer it to the host processing device. When writing data, as in the case of reading, the address of the empty area of the memory card is read from the management information storage means and sent to the host processing device, and based on this information, a control signal including the address is sent from the host processing device. Sent out. As a result, the host interface section sends the control signal to the sequence control section.
As a result, the data control unit is controlled based on the sequence control signal, and the writing of data from the host processing device to the memory card is sequentially executed. When the data writing is completed, the rewritten information is sent to the data control section via the host interface section, whereby the information of the rewritten section held in the management information storage means in the data control section is rewritten, and the rewritten information is rewritten. The information thus written is sequentially written in the data management area after the data writing to the memory card is completed, and the access is completed.

[0016]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a memory card interface device according to the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 shows an embodiment of a memory card interface device according to the present invention. The memory card interface device according to the present embodiment is installed in a host processing device such as a digital electronic still camera,
This is a device that provides an interface between this host processing device and a personal computer standard memory card (hereinafter referred to as a PC card). Particularly, in this embodiment, a DOS (Disk Operation System) file format for managing recorded data in predetermined block units, for example, cluster units is adopted in a PC card, and information in the data management area is transferred to a memory card interface. The main feature is that it is held by the device.

More specifically, as shown in FIG. 1, the memory card interface device 50 of this embodiment has a host interface unit 210, a data control unit 220, and a sequence control unit.
It has 230 and a buffer 240. The host interface unit 210 is a CPU interface circuit that interfaces control signals from, for example, a central processing unit (CPU) of the digital electronic still camera 10, and, for example, an 8-bit bidirectional bus 52 and a plurality of control lines 54 form a central interface. It is connected to the processing unit. This host interface unit 210
The data control unit 220 has an access information adding function of receiving access information for rewriting the data management information of the PC card from the central processing unit of the camera, and the data control unit 210.
Is a signal processing circuit having a data management information supply function for supplying data management information from the PC card to the central processing unit and a control signal processing function for supplying a control signal from the central processing unit to the sequence control unit 230. .

The data control unit 220 is a data interface circuit that bidirectionally interfaces data between the digital electronic still camera and the PC card, and controls data in the digital electronic still camera.
Connected to the memory controller by bidirectional bus 54,
It is also connected to the connector 300 that connects the PC card with a 16-bit data bus and a 24-bit address bus. The data control unit 220 reads the data management information from the PC card under the control of the sequence control unit 230, stores it in the buffer 240, and manages the data according to the access information to the PC card supplied via the host interface unit 210. It has a data management information rewriting function to rewrite information. In the present embodiment, the buffer 240 has a total of three buffer areas including a management information storage area for storing PC card data management information and two data buffer areas for alternately buffering accessed data. are doing. The data buffer area has a capacity of each sector accessed by the PC card, for example, 512 bytes. Data is stored alternately for each sector, and the data speed on the host side and the memory card The difference from the data speed on the side is absorbed by the data buffer areas on the two sides. The management information storage area is the data management area
It has a capacity of one cluster including 500, for example, a capacity of 1024 bytes.

The sequence controller 230 receives a control signal from the host interface 210 to access the PC card, and receives the status signal to control the data controller 220 in a sequence conforming to the standard of the PC card 20. It is a card control circuit. For example, in this embodiment, the sequence control unit 230 is set to the ATA (At Attachment Interface for Disk Drive).
ves) has a register 250 for setting the address of the PC card, and when the address for accessing the PC card from the host processing unit is transferred to the sequence control unit 230 via the host interface unit 210, the address is transferred. The address corresponding to the PC card is set in the register 250 based on. In other words, the memory is set in the register 250 with addresses that specify the number of sectors, sector position, head position, and command in the same way as a hard disk, and this is supplied to the PC card from the address bus 60 via the data control unit 220. To do.

FIG. 2 shows an embodiment of a digital electronic still camera equipped with the memory card interface device 50. The digital electronic still camera 10 of the present embodiment is configured such that image data representing an image captured by the image capturing unit 100 such as a CCD (Charged Coupled Device) is subjected to predetermined processing such as compression and is sequentially recorded on a recording medium such as the memory card 20. It is an image processing apparatus that records and sequentially reproduces data read from a recording medium into original data and displays it on a display device such as a CRT (Cathode Ray Tube) 30.

Explaining the details of each section of the digital electronic still camera, the image pickup section 100 converts the subject image formed on the image pickup surface into an electric signal for each color of red, blue and green (R, G, B). It is a photoelectric conversion circuit for outputting the output. The electric signal from the image pickup unit 100 is supplied to the YC processing unit 104 via the analog / digital (A / D) converter 102. The A / D converter 102 is a signal conversion circuit that converts the RGB analog image signals from the imaging unit 100 into, for example, 10-bit digital data and outputs the digital data.

The YC processing unit 104 is a data processing circuit for converting a signal supplied as RGB image data into YC data composed of a luminance signal (Y) and a color difference signal (C) which can be displayed on the display device 30. . The YC-processed signal can be displayed on the display device 30 via the D / A converter 106, and in the case of recording on a recording medium, the compression / expansion unit 10 via the data bus 150.
Supplied to 8. The compression / decompression unit 108 compresses the YC data by a predetermined compression method such as two-dimensional orthogonal transformation and Huffman coding, and inversely transforms the compressed data to decompress and restore the original YC data. Is. The compressed image data is sent from the memory controller 110 to the memory card 20 via the memory card interface device 50.
Are recorded in each.

The memory controller section 110 is a data control circuit for controlling recording and reproduction of image data on a recording medium, and executes respective controls in response to the reproduction control signal 112 and the photographing control signal 114. An image buffer 120 for expanding and buffering image data is connected to the memory controller unit 110. The image buffer 120 is formed by a memory circuit such as a dynamic RAM (DRAM) that can be rewritten at any time, and expands image data. In this case, it is applied when the image data read from the memory card 20 is expanded by the compression / expansion unit 108 and reproduced. The image data from the image buffer 120 has a spatial frequency enhanced by a low pass filter (LPF), and is displayed on the display device 30 via the YC processing unit 104 and the D / A converter 106. The low pass filter is formed by an electric circuit in the memory controller unit 110, and its oscillation frequency is the local oscillation control unit (LPF VCO) 1
It is controlled to an appropriate value by controlling from 22. The reproduction control signal 112 is generated by the reproduction signal generation unit (reproduction SSG) 124, and the shooting control signal 114 is generated by the shooting signal generation unit (shooting SSG) 126. These signal generators 124,
126 is activated based on the operation of an operation unit such as a release button and a record button provided on the outer surface of the camera.

A central processing unit (CPU) 130 is a CPU
A control circuit for controlling via the bus 160. In particular, in this embodiment, a control signal for controlling writing and reading of data to and from the memory card is sent to the memory card interface device 50 via, for example, an 8-bit bus. Specifically, at the time of shooting, the empty area of the memory card 20 is detected through the memory card interface unit 50, the address is supplied to the memory card interface unit 50, and the image data processed by the processing units 104 and 108 is detected. The memory card interface device 50 via the memory controller 110
To write to PC card 20 from. When reading data from the PC card 20, the data area is detected via the memory card interface device 50, the address is generated, the data is read to the memory controller 110, and the reproduction process is executed to display it on the display device 30. Let

The pin arrangement of the 68-pin PC card 30 applied in this embodiment is shown in FIGS. 3 and 4. In these figures, the input / output bidirectional data buses D0 to D15 are respectively connected to the 2nd to 6th pins, the 30th to 32nd pins, the 37th to 41st pins, and the 64th to 66th pins, and their addresses are supplied. Address bus
A0 to A25 are 8th pin, 10th to 14th pin, 19th to 29th pin,
It is arranged on pins 46 to 50 and pins 53 to 56, respectively.
These are the connectors of the memory card interface device 50
Each is connected to the data control unit 220 via 300.

Card enable signals -CE1 and -CE2, which are control signals for activating the memory card 30, are the seventh pin and the 42nd pin.
The pins are arranged, and these are connected to the sequence control unit 230 via the connector 300. These card enable signals -CE1 and -CE2 are accessed by negative logic. When both signals are negative, 16-bit data access is executed, and when signal -CE1 is negative and signal -CE2 is positive. In addition, 8-bit access is possible. Output enable-OE which becomes negative when reading data is placed on the 9th pin and write enable-W which becomes negative when writing data-W
The E / -PGMs are arranged on the 15th pin, respectively, and are connected to the sequence controller 230 similarly to the card enable.

Ready + RDY indicating the state of the memory card 30
/ Busy-The BSY pin is located on the 16th pin and becomes positive when data can be read and written.
When processing is performed inside the card, it becomes negative and notifies the sequence control unit 230 of the state. The operating power supply VCC is placed on the 17th and 51st pins, and the programming power supplies VPP1 and VPP2
Are arranged at the 18th pin and the 52nd pin, and power is supplied from the host processing unit via the memory interface unit 50. Write protect-WP, which indicates whether or not the data can be written, is placed on the 33rd pin. When this signal is negative, only the data can be read from the card and cannot be written.

Below, the terminals of card detection -CD1 and -CD2 are arranged at the 36th and 67th pins, and the refresh RFSH terminal to which the refresh signal is supplied when DRAM is adopted as the memory element is the 43rd refresh RFSH terminal. It is prepared on the pin. Also, the reset terminal RESET is arranged at the 58th pin, and the wait terminal -WAIT is arranged at the 59th pin. Further 61st
Battery voltage detection BVD1, when the attribute memory space select-REG when accessing the area that stores the card attributes etc. on the pin is arranged and the memory element such as SRAM is required for the card is adopted. BVD2 is located on pins 62 and 63. The 44th, 45th, 57th and 60th pins are reserved terminals RFU,
The remaining 1st pin, 34th pin, 35th pin and 68th pin are respectively arranged as a ground terminal GND.

Thus, the PC card is programmable
The pin arrangement is set so that any semiconductor memory element that requires a battery such as EEPROM, EPROM to SRAM, DRAM, etc. can be adopted.
It is assumed that the data access method of the specification access and DOS file format is adopted. For example, as shown in FIG. 5, the memory card according to the present embodiment manages each data in units of clusters having a predetermined capacity, for example, 1024 bytes. The first cluster has attribute information 510 and a boot sector. 520, FAT (File alloc
A data management area 500 including an ation table) 530 and a directory 540 is prepared. The attribute information 510 is a read-only file 01h that indicates whether erasing or updating is prohibited, a hidden file 02h that indicates whether there is a hidden file that is not displayed by the directory command, a system file 04h, and a volume name. Attributes such as 08h, directory 10h indicating a subdirectory, and distinction 20h such as archive file are recorded in the form of the logical product of each.

The boot sector 520 includes various coefficients necessary for accessing this memory, and specifically,
Version number, number of bytes per sector, number of sectors per cluster, number of FATs, number of sectors per FAT, number of sectors per track, number of heads, drive number, volume ID number, volume label, file system type, etc. are recorded. ing. In the FAT area 530, start addresses and end addresses of respective clusters, chains between clusters, and distinctions such as empty clusters are recorded, and respective data are accessed based on the contents of the FAT area. Directory 540
The file name, file type, file update time and file update date, the first cluster number of the file, and the file size are recorded.

Normally, when data write and read processes are executed, the data management area 500 is accessed and executed for each cluster. However, in this embodiment, when the memory card is attached to the device,
It is read and stored in the buffer 420 of the memory card interface device 50, and the buffer 420 is accessed when the host processing device requires it. At this time, when processing such as rewriting data in the memory card is executed, the data management information is rewritten in the buffer 420, and after all processing is completed, the data management information rewritten in the buffer 420 is stored in the memory card. Write to the data management area 500 of the card. Therefore, in this embodiment, when the memory card is accessed from the host processing device, it is not necessary to access the data management area 500 of the memory card each time, and the interface processing device 50 rewrites the data management information.

The operation of the memory card interface device 30 in the present embodiment having the above-mentioned configuration will be described together with the operation of the digital electronic still camera. First,
When the PC card 20 is connected to the connector 300 of the memory interface device 50 while the main power of the digital electronic still camera 10 is turned on, the operating power Vcc is supplied to the PC card 20 and the card detection signal of the PC card 20 is supplied. -CE1, -CE2 become active. As a result, the sequence control unit 230 of the memory interface device 50 causes the card detection signal -CE
When 1-CE2 is detected, the sequence controller 230 sends a sequence control signal to the PC card 20 and the data controller 220 to sequentially read the data management information 500 including the FAT stored in the data management area 500 of the PC card 20. To do.

Next, when a ready signal -RDY is sent from the PC card 20, the data control area 60 is sent from the data control unit 60.
An address signal indicating the start address of 0 is sent to the PC card 20 via the address bus 60, and the management data area
The respective data management information is read from 500 and read to the data control unit 220 via the data bus 58. As a result, the data control unit 220 sequentially stores the read data management information in the management information storage area of the buffer 240.
Next, when the storage of the data management information is completed, the data control unit 220 can send a ready signal to the central processing unit 130 of the digital electronic still camera 10 via the host interface unit 210 to access the memory card 20. Let us know.

Upon receipt of the ready signal, the central processing unit 130
Data control unit 220 via host interface unit 210
A control signal for reading out the contents of the data management information accumulated in each of the information is sent. As a result, the central processing unit 13
At 0, the contents are sequentially read out via the host interface unit 210, and the contents of the card are sequentially checked. For example, the attribute information 510 is read to check whether image data can be written to the connected PC card, and then the boot sector 520 is read to check the version and the like. If is included, it is displayed on an operation display unit (not shown) or the like. Next, the FAT 530 is read and the number of clusters is checked to check the recordable capacity of the data area. If this check is passed, the central processing unit 130 displays on the operation display unit that photographing is possible.

When the operator sees the display, he / she sets the camera on the desired subject.
When the release button is operated with the 10 pointing, the central processing unit 130 controls the image pickup unit 100 in response to the operation and shoots a subject. The output of the image pickup unit 100 is converted into the corresponding digital data by the analog-digital converter 102 and the YC
It is supplied to the processing unit 104. YC that received RGB image data
The processing unit 104 converts this into YC data, and the compression / expansion unit 10
Transfer to 8. As a result, the compression / expansion unit 108 compresses the YC data and sends it to the memory controller 108, and from there, records the data on the PC card 20 via the memory card interface device 50.

At this time, the central processing unit 130 accesses the FAT data of the data management information stored in the buffer 240 via the host interface unit 210 and the data control unit 220, and the free area of the data area is Find a cluster. The number of clusters required to store the image data is calculated by the central processing unit 130 based on the compression rate compressed by the compression / expansion unit 160. The central processing unit 130 thus generates an address designating the leading storage position of the required cluster in the data storage area of the memory card 20 and sends it to the card interface unit 50. In the card interface device 50, the address received from the central processing unit 130 is transferred from the host interface unit 210 to the sequence control unit.
Send to 230 and PC to register 250 based on this address
The address corresponding to the card 20, that is, the same address as the hard disk designated in the order of the number of sectors, sector position, head position, and command is set. Next, the sequence controller 230 sends write enable-WE to the memory card 20 via the connector 300, and when ready-RDY becomes active in the card 20, supplies the address set in the register 250 to the data controller 220. From here, supply to the PC card 20 via the address bus 60. As a result, the PC card 20 can access the desired address.

During this period, the digital electronic still camera 10
The central processing unit 130 of the memory interface device controls the memory controller 110 after sending the address and writes the image data to be written in the memory card 20 via the bus 54 to the memory interface device.
50 to the data control unit 220. As a result, the data control unit 220 sequentially accumulates the image data from the memory controller 110 in the data buffer area of the buffer 240,
When receiving a data write control signal from the sequence controller 230, the image data is read from the buffer 240 and sequentially supplied to the PC card 20 via the data bus 58. As a result, in the PC card 20, the image data from the digital electronic still camera 10 is sequentially written at a predetermined address.

Next, when the image data of a predetermined capacity from the buffer 240 is transferred to the memory card 20, the sequence controller 230 supplies the camera with a request signal for designating the next address. As a result, the central processing unit 130
Generates the address in the host interface unit 21
Then, the memory controller 110 is controlled to send the next data to the data controller 220 in the same manner as above. As a result, in the same manner as above, the register 250 of the sequence controller 230 is
The address of the next sector is set in the
Data is accumulated from 0 to the other data buffer area. Next, when the PC card 20 finishes writing the data from one of the buffers, the ready RDY signal is supplied, and the sequence control unit 230 supplies the address set in the register 250 to the memory card 20 via the data control unit 220. To do. Then, similarly to the above, the data stored in the buffer by the data control unit 220 is supplied to the memory card 20.

Similarly, a digital electronic still camera will be described below.
While the address from the central processing unit 130 of 10 is set in the register 250 of the sequence control unit 230, the image data from the memory controller 110 is accumulated in the buffer 240 by the data control unit 220, and is ready from the PC card 10. RD
When the Y signal is sent, it is supplied to the memory card 20 in the order of address and data under the control of the sequence controller 230.
Image data writing is executed for each sector.

In the digital still camera 10 that has sent the image data for one cluster, the central processing unit 13
0 reads the FAT 530 of the data management area accumulated in the memory interface device, calculates the start address of the next empty cluster in which image data is recorded, and supplies it to the host interface unit 210 in the same manner as above. Similarly, data writing is executed for each sector under the control of the sequence control unit 230, and the central processing unit 130 refers to the FAT accumulated in the buffer 240 for each cluster to generate the start address of the next cluster. The writing of the image data for each cluster is sequentially executed.

When the image data for one image is stored in the memory card 20 in this way, the central controller 130 updates the data management area stored in the buffer 240 via the host interface 210 and the data controller 220. To do. For example, the number of the next cluster corresponding to each cluster is written in the FAT so that the clusters used for recording the data for one image are linked, and "all 1s" are written in the final cluster. Similarly, the directory is updated. The directory is updated for the data type and start cluster. The start cluster is the cluster number of the first cluster in the series of clusters used for recording the packet data, and is created by the central processing unit 130 and updated by the buffer 240.

When the data management information is rewritten in the buffer 240, the sequence controller 230 sets the address in the register 250 and accesses the memory card 20 in the same manner as the above-mentioned data writing. Then card 20
When the ready RDY signal is received from the sequence controller 230
Sequentially sends the addresses set via the data control unit 220 to the memory card 20, and then reads the data management information in the buffer 240 to read the data management area of the memory card 20.
The data management information updated to 500 is sequentially supplied, and the rewriting is executed.

On the other hand, when reading data, the memory card interface device 50 reads the data management information from the memory card 20 and the buffer 240
The data management information is stored in the management information storage area, and the data management information is sequentially supplied to the access from the central processing unit 130 of the digital electronic still camera 10. As a result, the central processing unit 30 of the camera 10 generates an address of desired data of the memory card 20 for each sector and sends it to the host interface unit 210. Receiving this, the host interface unit 210 sets an address corresponding to the memory card 20 in the register 250 of the sequence control unit 230 for each sector and transfers this to the memory card 20 via the address bus 60 of the data control unit 220. Send the data at that address to the memory card
Read sequentially from 20. The read data is sent to the buffer 24 of the data control unit 220 via the data bus 58 for each sector.
The data is sequentially accumulated in 0 and sequentially transferred to the memory controller 110 via the bus 56 for each sector. The above processing is sequentially repeated for each cluster, so that one screen of data from the memory card 20 is transferred to the memory card interface device 50.
Is read by the digital electronic still camera 10 via.

Memory controller 110 that receives data
Sends it to the compression / expansion unit 108 and expands the compressed data by inverse conversion or the like. The decompressed data is sequentially expanded in the image buffer 100, and when one screen of data is accumulated in the buffer 100, the memory controller 110
Are sequentially read out and the spatial frequency is emphasized by a low-pass filter or the like, and the YC processing unit 104 and the D / A converter 106 are
Display on the display device 30 via.

Further, in the case where the memory card 10 is initialized in this embodiment, when the initialization instruction is sent from the host processing device 10, the host interface unit 210 of the memory card interface device 50 causes the data control unit 220. Is supplied with a predetermined value, for example, an eigenvalue in which the values of all sectors are “all 1”, and is written in the buffer 240. Next, the sequence control unit 230 supplies the address of the portion of the memory card 20 to be initialized to the memory card 20 via the data control unit 220, and then the unique value written in the buffer 240 is read and supplied to the memory card 20. As a result, the unique value is sequentially written in the memory card 20, and the initialization of the desired address is executed. After that, the address is updated sequentially and the value of the buffer 240 is repeatedly supplied to the memory card 20,
The memory card 20 is automatically initialized without receiving control from the host processing device 10.

As described above, according to the memory interface device of this embodiment, the digital electronic still camera is used.
When accessing the memory card 20 from 10, the information in the data management area is read out and stored in the management information storage area of the buffer 240, and the stored information is sequentially sent in response to the access from the camera 10. It is not necessary to access the data management area of the card 20 for each cluster, the processing is simple, and the access to the memory card 20 is reduced, so that data can be read or written from the memory card 20 at high speed. . In particular, when the memory card 20 is equipped with an EEPROM, the data management area needs to be rewritten only once, so that erasing at that time is reduced and the life of the memory is extended.

In the above embodiments, the case where the memory interface device is applied to a digital electronic still camera has been described as an example. However, in the present invention, other host processing devices such as character data, voice data, etc. including a word processor, It may be applied to various information processing devices that handle respective data such as image data.

[0048]

As described in detail above, according to the memory card interface device of the present invention, the data control section is provided with the management information storage means for reading and storing the data management information of the memory card, so that the data writing is performed. Also, it is not necessary to access the memory card every time when executing reading, and the processing in the memory card is reduced. As a result, the processing can be performed at high speed and the reliability can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a memory card interface device according to the present invention.

FIG. 2 is a block diagram showing a configuration example of a digital electronic still camera to which the embodiment of FIG. 1 is applied.

FIG. 3 is a diagram showing a pin arrangement of a memory card applied to the embodiment of FIG.

FIG. 4 is a diagram showing a pin arrangement of the memory card following FIG.

FIG. 5 is a diagram showing an example of data storage of a memory card in the present embodiment.

[Explanation of symbols]

 10 Digital electronic still camera 20 Memory card 30 Display device 50 Memory card interface device 110 Memory controller unit 130 Central processing unit 210 Host interface unit 220 Data control unit 230 Sequence control unit 240 Buffer

Continuation of the front page (51) Int.Cl. ⁶ Identification code Office reference number FI Technical display area H04N 5/765 5/781

Claims (6)

[Claims] 1. A memory card having a data management area for managing stored data in block units of a predetermined capacity, and the data management area is rewritten in byte units, and data is accessed to the memory card. In a memory card interface device detachably connected to a host processing device, the device includes a host interface unit for interfacing a control signal when the host processing device accesses the memory card, and a control signal from the host interface unit. And a sequence control unit that executes a sequence control when accessing the memory card by receiving a status signal from the memory card, and a control signal from the memory card to the host processing device based on a control signal from the sequence control unit. Data read and the host processor And a data control unit for writing data from the storage device to the memory card, wherein the data control unit reads information in a data management area of the memory card when the memory card is accessed from the host processing device, The data control unit has a management information storage unit that rewritably holds the data management information, and the data control unit notifies the host processing device of the contents of the data management area accumulated in the management information storage unit through the host interface unit. A memory card interface device having a data management information rewriting function for rewriting the contents according to an instruction from the host processing device via the host interface unit. 2. The memory card interface device according to claim 1, wherein the memory card is a personal computer standard memory card in which each data is accessed for each predetermined capacity, and the management information storage means includes: The data control unit has at least the same access capacity as the memory card of the personal computer standard, and the data control unit reads out and stores a portion of the data management area of the memory card that needs to be rewritten in the management information storage unit. , A memory card interface device characterized by rewriting the contents in byte units. 3. The memory card interface device according to claim 1, wherein the memory card is a flash EEPROM that is erased for each predetermined capacity, and the management information storage means is at least an erase unit of the flash EEPROM. The data control means has a capacity similar to the capacity,
Information of a predetermined capacity including the data management area of the memory card is read into the management information storage means, the contents are rewritten in byte units, and the area of the predetermined capacity including the data management area is erased by the sequence control unit. A memory card interface device, characterized in that information including a data management area rewritten after writing is written in an erased area. 4. The memory card interface device according to claim 1, wherein the host interface unit is
When initializing the data management area of the memory card, a predetermined unique value is written in the management information storage means via the data control means, and the data control means is the content of the management information storage means in which the unique value is written. The memory card interface device is characterized in that the initialization of the data management area is executed by writing the data into the data management area of the memory card. 5. The memory card interface device according to claim 1, wherein the data control unit further has at least two or more data storage units for buffering a predetermined amount of data. apparatus. 6. The memory card interface device according to claim 1, wherein the host processing device is a digital electronic still camera that records and reproduces captured image data, and the host interface unit is a digital electronic still camera. Connected to a central processing unit for main control, the data control unit supplies the data management information of the memory card stored in the management information recording means to the central processing unit of the digital electronic still camera via the host interface unit. A memory card interface device characterized by rewriting the contents of the management information recording means based on the access information.