JPH088408B2 - Electronic circuit device - Google Patents
Electronic circuit deviceInfo
- Publication number
- JPH088408B2 JPH088408B2 JP4125018A JP12501892A JPH088408B2 JP H088408 B2 JPH088408 B2 JP H088408B2 JP 4125018 A JP4125018 A JP 4125018A JP 12501892 A JP12501892 A JP 12501892A JP H088408 B2 JPH088408 B2 JP H088408B2
- Authority
- JP
- Japan
- Prior art keywords
- solder
- melting point
- circuit board
- low melting
- processed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
【0001】[0001]
【産業上の利用分野】本発明は、回路基板上の部品がキ
ャップではんだ封止された電子回路装置に係わり、特に
回路基板、キャップ各々との間に低融点はんだを介し、
これら低融点はんだ間に予め圧延・熱処理された高融点
加工はんだが介挿された状態で、低融点はんだ自体の溶
融によって回路基板上の部品がはんだ封止されるように
した電子回路装置に関するものである。 BACKGROUND OF THE INVENTION The present invention relates to the parts on a circuit board.
Involved in electronic circuit devices that are solder-sealed with caps, especially
Low melting point solder is interposed between the circuit board and each of the caps,
High melting point that was previously rolled and heat treated between these low melting point solders
With the processed solder inserted, melt the low melting point solder itself.
The components on the circuit board are solder-sealed by fusion
And an electronic circuit device.
【0002】[0002]
【従来の技術】従来、電子回路装置においては、半導体
や部品の機械的、化学的保護および量産性、信頼性の向
上を目的として、はんだによる面付実装が知られてい
る。その中でも、半導体の最も高密度な実装法として、
図4に示すごとく、半導体チップ1と回路基板2の周端
部対向面を電極4,5を介して微細なはんだ3で接続す
る方法が知られている(例えば特開昭43−28735
号公報や米国特許第3871014号明細書を参照のこ
と)。2. Description of the Related Art Conventionally, in electronic circuit devices, surface mounting by soldering has been known for the purpose of mechanical and chemical protection of semiconductors and components, mass productivity and improvement of reliability. Among them, as the highest density mounting method for semiconductors,
As shown in FIG. 4, a method is known in which the semiconductor chip 1 and the peripheral surface of the circuit board 2 are connected to each other with fine solder 3 via electrodes 4 and 5 (for example, Japanese Patent Laid-Open No. 43-28735).
See Japanese Patent Publication No. 3871014 and U.S. Pat. No. 3,871,014.
And ).
【0003】[0003]
【発明が解決しようとする課題】しかるに、従来の方法
は、半導体チップ1と回路基板2とを接続する際にはん
だ3を完全に溶融し、上記電極4,5とのぬれ・拡散反
応を利用して、半導体チップ1と基板2とを接続してい
た。そのため、半導体チップ1と基板2との接続部とし
てのはんだ3が冷却過程で合金組成の偏析や欠隔および
残留応力が発生して、伸びが小さな鋳造組織状態とな
る。この鋳造状態は外力にたいして伸びが小さく、不均
一な変形を発生するため、疲労特性がわるく、使用中で
の種々のストレスにたいして比較的短時間で、はんだ3
が破壊する問題があった。However, according to the conventional method, when the semiconductor chip 1 and the circuit board 2 are connected, the solder 3 is completely melted and the wetting / diffusion reaction between the electrodes 4 and 5 is utilized. Then, the semiconductor chip 1 and the substrate 2 were connected. Therefore, as a connecting portion between the semiconductor chip 1 and the substrate 2,
During the cooling process, all the solder 3 is segregated in alloy composition, gaps and residual stress are generated, and the cast structure becomes small in elongation. The casting condition is small elongation against the external force, for generating a non-uniform deformation, fatigue characteristics is poor, a relatively short time against <br/> various stresses in use, the solder 3
There was a problem of destroying.
【0004】本発明は、従来の上記問題点を解決し、軟
らかく、かつ延性や疲労特性に優れ、高信頼性のはんだ
封止を可能とする電子回路装置を提供することにある。[0004] The present invention is to solve the conventional problems described above, soft
Another object of the present invention is to provide an electronic circuit device which has excellent ductility and fatigue characteristics and enables highly reliable solder sealing.
【0005】[0005]
【課題を解決するための手段】本発明は、上記の目的を
達成するために、メタライズを有する回路基板上の部品
をキャップではんだ封止すべく、そのはんだは、キャッ
プ側に設けられた第1の低融点はんだと、回路基板側に
設けられた第2の低融点はんだと、該第2の低融点はん
だと上記第1の低融点はんだとの間に介挿された、予め
圧延・熱処理された高融点加工はんだとからなり、上記
第1,第2の低融点はんだ自体の溶融によって回路基板
上の実装部品をはんだ封止したものである。SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides a component on a circuit board having a metallization.
The solder is capped so that the
The first low melting point solder provided on the
The second low melting point solder provided and the second low melting point solder
If so, it is previously inserted between the first low melting point solder and
It consists of rolled and heat-treated high melting point processed solder.
Circuit board by melting the first and second low melting point solders themselves
The above mounted components are sealed with solder .
【0006】[0006]
【作用】しかして、本発明は、つぎのような現象および
原理にもとづいて、低融点はんだに加え、予め圧延・熱
処理された高融点加工はんだ(以下、加工はんだと称
す)加工はんだ材を用い、回路基板上の部品をキャップ
ではんだ封止したものである。すなわち、金属の多く
は、溶融・凝固すると、ガスの吸截や欠陥が多く、さら
に純金属以外のほとんどの合金は凝固の過程で組成偏析
や重量偏析をともなう不均質な鋳造組織となる。このよ
うな欠陥や不均質な組織からなる金属・合金は一般に脆
いため、構造部材などに使用する場合などにおいては圧
延や熱処理をおこない、鋳造組織をこわして均質にし、
これにより靭性や延性を改善する方法がおこなわれてい
る。しかるに、ろう材としてのPb−SnやAu−Sn
などの合金は、溶融接続を基本原理としているため、溶
融凝固すると、かならず鋳造組織となるので、これを加
工して組織を破壊することはほとんど不可能である。The present invention is based on the following phenomena and principles, and in addition to the low melting point solder, is preliminarily rolled and heated.
Processed high melting point processed solder (hereinafter referred to as processed solder
Capped parts on the circuit board using processed solder material
In one in which the solder seal. That is, most of the metals, when melted and solidified, have many gas absorptions and defects, and most alloys other than pure metals have a heterogeneous cast structure with composition segregation and weight segregation during the solidification process. Metals and alloys consisting of such defects and inhomogeneous structures are generally brittle, so when they are used for structural members, etc., they are rolled or heat-treated to break the cast structure and make it homogeneous.
As a result, a method of improving toughness and ductility is performed. However, Pb-Sn and Au-Sn as brazing materials
Since alloys such as the above have a basic principle of fusion connection, when they are melted and solidified, they always have a cast structure, and it is almost impossible to process this to destroy the structure.
【0007】図5は縦軸に応力(kg/mm2)をと
り、横軸に伸びε(%)をとった場合のPb−Sn合金
を例として加工はんだa′、b′、c′と、鋳造材a、
b、cの引張特性がどの程度異なるかを示したものであ
る。In FIG. 5, working solders a ', b', and c'are given by taking a Pb-Sn alloy with stress (kg / mm2) on the vertical axis and elongation ε (%) on the horizontal axis as an example. Casting material a,
It shows how different the tensile properties of b and c are.
【0008】同図に示すごとく、加工はんだa′、
b′、c′はいずれの組成においても、軟らかく、著し
い伸びの改善が見られる。この加工はんだa′、b′、
c′は圧延率90%で冷間圧延したシートから引張試験
片を作成したのち、約1週間位室温で熱処理したもので
ある。つぎに図6は95Pb/5Snはんだの鋳造材
(図6(a)、図5のcに相当)と、加工はんだ(図6
(b)、図5のc′に相当)の組織を比較したものであ
る。同図に示すごとく、加工はんだの組織は鋳造材に比
較して、結晶粒が細かく偏析して高濃度のSnが球状化
し、かつ内部歪みの少ないものになっている。この伸び
は鋳造材の3〜4倍で、加工・熱処理による特性改善の
効果が理解できる。As shown in the figure, the processed solder a ',
In both compositions, b'and c'are soft and markedly improved in elongation. This processed solder a ', b',
In c ', a tensile test piece is prepared from a sheet cold-rolled at a rolling rate of 90% and then heat-treated at room temperature for about 1 week. Next, FIG. 6 is 95Pb / 5Sn solder cast material (the FIG. 6 (a), the equivalent to c in FIG. 5), the processing of solder (Fig. 6
(B), corresponding to the structure of c'in FIG. 5). As shown in the figure, the structure of the processed solder is such that the crystal grains are finely segregated, the high-concentration Sn is spheroidized, and the internal strain is small as compared with the cast material. This elongation is 3 to 4 times that of the cast material, and the effect of property improvement by working and heat treatment can be understood.
【0009】本発明者らは、上記の現象から、上記の加
工はんだを接続材として使用することにより、種々のス
トレスによる疲労などに十分に耐えられる接続部が得ら
れるとおもうにいたったのである。すなわち、加工はん
だより低融点のはんだで、加工はんだの接続端部のみを
溶融接続することにより、加工はんだのすぐれた靭性お
よび延性を失うことなく接続できるので、信頼性の高い
接続ができ、かつこのような効果が期待できるような材
料としてはほとんどのろう材について可能性があるから
である。図7はM.Hansenによって1958年に
発表されたPb−Sn合金の状態図、図8は同じくPb
−In合金の状態図、図9は同じくPb−Sb合金の状
態図である。これらの図から明らかなごとく、いずれも
冷却凝固過程で偏析や不均質な組織となり、これらを加
工・熱処理すれば、伸び特性の改善が期待できる。From the above phenomena, the present inventors have made it clear that by using the above-mentioned processed solder as a connecting material, a connecting portion which can sufficiently withstand fatigue due to various stresses can be obtained. . In other words, the processing reaction
A low melting point solder than I, by only connecting end portions of the machining solder melting connection, can be connected without losing excellent toughness and ductility of the processed solder can reliable connection, and like this This is because most brazing filler metals have potential as materials that can be expected to be effective. FIG. The phase diagram of the Pb-Sn alloy announced by Hansen in 1958.
FIG. 9 is a state diagram of the —In alloy, and FIG. 9 is a state diagram of the Pb—Sb alloy. As is clear from these figures, segregation and inhomogeneous structures are formed in the cooling and solidification process, and if these are processed and heat-treated, improvement in elongation properties can be expected.
【0010】[0010]
【実施例】以下本発明の一実施例を示す図1ないし図3
について説明する。図1は本発明を電子回路装置におけ
る封止に実施した場合を示す図1および図2について説
明する。図2に示すごとく、回路基板2上に接続用はん
だ24により接続する半導体チップ1およびコンデンサ
などの部品を封止するため、上記半導体チップ1および
コンデンサなどの部品の上方部を覆うように配置された
キャップ25と、上記回路基板2の周端部間に電極4,
5を介して加工成形された加工はんだ26を介挿し、上
記電極4,5各々と加工はんだ26との間に該加工はん
だ26よりも低融点のはんだ(図示せず)を付着し、こ
の低融点のはんだのみを溶融して、上記キャップ25と
回路基板2とを局部的に溶融接続したものである。な
お、上記キャップ25、加工はんだ26および回路基板
25にて封止された内部は真空かあるいは不活性ガスの
雰囲気で部品を保護している。また、上記半導体チップ
1およびコンデンサなどの部品を回路基板2に接続する
ための接続用はんだ24は、キャップ25と回路基板2
とを封止する際に溶融しないように、高融点のはんだを
使用している。1 to 3 showing an embodiment of the present invention.
Will be described. FIG. 1 is described with reference to FIGS. 1 and 2 showing a case where the present invention is applied to sealing in an electronic circuit device. As shown in FIG. 2 , in order to seal the components such as the semiconductor chip 1 and the capacitor connected to the circuit board 2 by the connecting solder 24, the semiconductor chip 1 and the capacitor are arranged so as to cover the upper parts of the components. Between the cap 25 and the peripheral end of the circuit board 2
The processed solder 26, which has been processed and formed through 5, is inserted, and a solder (not shown) having a melting point lower than that of the processed solder 26 is attached between each of the electrodes 4 and 5 and the processed solder 26. Only the melting point solder is melted and the cap 25 and the circuit board 2 are locally melted and connected. The inside sealed with the cap 25, the processed solder 26 and the circuit board 25 protects the components in a vacuum or an atmosphere of an inert gas. Further, the connecting solder 24 for connecting the semiconductor chip 1 and the components such as the capacitor to the circuit board 2 includes the cap 25 and the circuit board 2.
High melting point solder is used so as not to melt when sealing and.
【0011】つぎに図3により、回路基板上には予め半
導体チップ等の部品が接続されているものとして、その
部品が回路基板上でキャップにより封止された電子回路
装置の製造方法を述べると、まず、図3(a)に示すご
とく各種材料からなる基板2上に各々の材料に適した方
法で電極5を形成する。たとえば上記基板2がアルミナ
セラミックで形成されている場合には、Ag−Pbおよ
びWなどの導体ペーストを印刷、焼成して上記電極5を
形成する。導体ペーストがWのときには、さらにNiメ
ッキなどをおこなって電極5を形成する。このようにし
て形成された電極5上に低融点のはんだを、たとえばP
b−SnあるいはAn−Snなどの共晶はんだをはんだ
ペーストの印刷・リフロやはんだボール、真空蒸着など
による供給・リフロおよびはんだディップによりはんだ
7を形成して回路基板を作成する。同様な方法でキャッ
プ25上の電極4にも低融点のはんだ8を形成する。つ
いで図3(b)に示すごとく、上記電極4,5の形状が
たとえば円形、四角形、三角形などであるとして、これ
に対応する形状をした高融点の加工はんだ26を形成す
る。すなわち、加工はんだ26はたとえば95wt%P
b−5wt%Sn、80wt%Au−20wt%Snを
成形して、上記回路基板2上の低融点はんだ7に一致さ
せて載置する。この状態で加熱し、低融点はんだ7のみ
を溶融して加工はんだ26を電極5上に固定する。な
お、上記加工はんだ26は溶解・鋳造して板状に圧延し
たのち、圧延率90%まで加工して50°Cで2日間不
活性雰囲気中で熱処理をおこなったもので、この引張特
性は前記図5に示すc′の特性にほぼ一致した。つい
で、図3(c)に示すごとく上記キャップ25をその低
融点のはんだ8が上記加工はんだ26に一致するごとく
載置したのち、低融点はんだ8の融点よりもわずかに高
い温度で加熱して加工はんだ26の上部に溶融接続する
と、図3(d)に示すごとく電子回路装置を得ることが
できる。上記実施例では上記加工はんだ26の形状は直
径0.15mm、長さ0.3mmの円柱を用いている。
また上記加工はんだ26の回路基板2への供給方法は、
電極5のパターンに対応して穴の開いたステンレスマス
クを使用している。このようにして得られたはんだ接続
部は、加工はんだ26の融点が高く、体積も多いため、
上記低融点はんだ7,8と接続加工する加工はんだ26
の領域が20〜30μmと非常にわずかであるため、ほ
とんど加工はんだである。これを温度サイクル−55〜
+150°C、1サイクル/hr試験で寿命を評価する
と、疲労寿命は従来の鋳造はんだに比較して95Pb−
5Snはんだで5倍、80Au−20Snはんだで2倍
であった。 [0011] Next the 3, in advance on the circuit board half
Assuming that parts such as conductor chips are connected,
A method of manufacturing an electronic circuit device in which components are sealed with a cap on a circuit board will be described. First, as shown in FIG. 3A, the electrodes 5 are formed on a substrate 2 made of various materials by a method suitable for each material. To form. For example, when the substrate 2 is made of alumina ceramic, a conductive paste such as Ag-Pb and W is printed and fired to form the electrode 5. When the conductor paste is W, Ni plating or the like is further performed to form the electrode 5. On the electrode 5 thus formed, a low melting point solder, for example, P
A eutectic solder such as b-Sn or An-Sn is printed by solder paste, supplied by reflow, solder balls, vacuum deposition, etc. Reflow and solder dip are used to form the solder 7 to form a circuit board. Cash in the same way
The low melting point solder 8 is also formed on the electrode 4 on the chip 25 . Next, as shown in FIG. 3B , assuming that the electrodes 4 and 5 have a shape such as a circle, a quadrangle, or a triangle ,
Forming a high-melting machining solder 26 in which the corresponding shape. That is, the processed solder 26 is, for example, 95 wt% P
b-5 wt% Sn and 80 wt% Au- 20 wt% Sn are molded and placed in conformity with the low melting point solder 7 on the circuit board 2. In this state, heating is performed to melt only the low melting point solder 7 and fix the processed solder 26 on the electrode 5. The processed solder 26 was obtained by melting and casting, rolling it into a plate shape, processing it to a rolling rate of 90% , and heat treating it at 50 ° C. for 2 days in an inert atmosphere. It was almost identical to the characteristics of c 'shown in FIG. Then, the low and the cap 25 as shown in FIG. 3 (c)
After the solder 8 having a melting point is placed so as to match the working solder 26 , it is heated at a temperature slightly higher than the melting point of the low melting point solder 8 and melted and connected to the upper portion of the working solder 26 , as shown in FIG. An electronic circuit device can be obtained as shown. In the above embodiment, the shape of the work solder 26 is a cylinder having a diameter of 0.15 mm and a length of 0.3 mm.
Further, the method of supplying the processed solder 26 to the circuit board 2 is as follows.
A stainless mask having holes corresponding to the pattern of the electrode 5 is used. Since the solder connection portion thus obtained has a high melting point and a large volume of the processed solder 26 ,
Processed solder 26 for connection processing with the low melting point solders 7 and 8
The region is very small, 20 to 30 μm, so that it is almost processed solder. This is a temperature cycle -55
When fatigue life is evaluated by + 150 ° C, 1 cycle / hr test, fatigue life is 95 Pb-compared with conventional cast solder.
It was 5 times for 5Sn solder and 2 times for 80Au-20Sn solder .
【0012】[0012]
【発明の効果】本発明は、以上述べたごとく、軟らか
く、かつ延性や疲労特性のすぐれた加工はんだを用いて
半導体および部品の封止をおこなうことができるから、
簡単な構成、容易な操作により高信頼度の電子回路装置
を得ることができ、かつ今後ますます高信頼度および高
密度が要求される面付実装の分野、たとえば計算機など
の電子回路装置の高機能化に大きい貢献をすることがで
きる。As described above, according to the present invention, a semiconductor and a component can be sealed by using a softened solder having excellent ductility and fatigue characteristics.
Highly reliable electronic circuit devices can be obtained with a simple configuration and easy operation, and in the field of surface mounting, where higher reliability and higher density are required in the future, for example, high-performance electronic circuit devices such as computers. It can make a great contribution to functionalization.
【図1】本発明の一実施例を示す電子回路装置の斜視図
である。FIG. 1 is a perspective view of an electronic circuit device showing an embodiment of the present invention.
【図2】図1のA−A′断面図である。FIG. 2 is a sectional view taken along the line AA ′ of FIG.
【図3】その電子回路装置の製造過程を示す説明用断面
図である。FIG. 3 is an explanatory sectional view showing a manufacturing process of the electronic circuit device .
【図4】従来の電子回路装置を示す斜視図である。FIG. 4 is a perspective view showing a conventional electronic circuit device.
【図5】本発明にかかる加工はんだと従来のはんだとの
引張特性図である。FIG. 5 is a tensile characteristic diagram of a processed solder according to the present invention and a conventional solder.
【図6】本発明にかかる加工はんだと従来の鋳造はんだ
との組織を示す図面に代わる写真である。FIG. 6 is a photograph replacing a drawing showing the structures of a processed solder according to the present invention and a conventional cast solder.
【図7】本発明にかかるPb−Sn合金の状態図であ
る。FIG. 7 is a phase diagram of a Pb—Sn alloy according to the present invention.
【図8】Pb−In合金の状態図である。FIG. 8 is a phase diagram of a Pb-In alloy.
【図9】Pb−Sb合金の状態図である。FIG. 9 is a phase diagram of a Pb-Sb alloy.
【符号の説明】2…回路基板、7,8…低融点のはんだ、4,5…電
極、25…キャップ、26…高融点の加工はんだ 。[Explanation of Codes] 2 ... Circuit board, 7, 8 ... Low melting point solder, 4, 5 ... Electrode
Pole, 25 ... Cap, 26 ... Processed solder with high melting point .
───────────────────────────────────────────────────── フロントページの続き (72)発明者 坂口 勝 神奈川県横浜市戸塚区吉田町292番地 株 式会社 日立製作所 生産技術研究所内 (72)発明者 村田 旻 神奈川県横浜市戸塚区吉田町292番地 株 式会社 日立製作所 生産技術研究所内 (72)発明者 廣田 和夫 神奈川県横浜市戸塚区吉田町292番地 株 式会社 日立製作所 生産技術研究所内 (56)参考文献 特開 昭51−16260(JP,A) ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Katsu Sakaguchi 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Inside the Hitachi, Ltd. Institute of Industrial Science (72) Inventor Murata 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Hitachi, Ltd., Production Engineering Laboratory (72) Inventor, Kazuo Hirota, 292, Yoshida-cho, Totsuka-ku, Yokohama City, Kanagawa Prefecture, Ltd. Hitachi, Ltd., Production Engineering Laboratory (56) Reference JP-A-51-16260 (JP, A) )
Claims (1)
キャップではんだ封止した電子回路装置であって、上記
はんだは、キャップ側に設けられた第1の低融点はんだ
と、回路基板側に設けられた第2の低融点はんだと、該
第2の低融点はんだと上記第1の低融点はんだとの間に
介挿された、予め圧延・熱処理された高融点加工はんだ
とからなり、上記第1,第2の低融点はんだ自体の溶融
によって回路基板上の実装部品がはんだ封止されてなる
構成の電子回路装置。 1. A electronic circuit device solder seal cap components on the circuit board having a metallized, the
The solder is the first low melting point solder provided on the cap side.
And a second low melting point solder provided on the circuit board side,
Between the second low melting point solder and the first low melting point solder
Pre-rolled and heat-treated high melting point processed solder
Consists of a, the first, mounting components on the circuit board by melting of the second low melting point solder itself is formed by solder seal
Electronic circuit device of configuration .
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4125018A JPH088408B2 (en) | 1992-05-18 | 1992-05-18 | Electronic circuit device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4125018A JPH088408B2 (en) | 1992-05-18 | 1992-05-18 | Electronic circuit device |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59208072A Division JPS6187396A (en) | 1984-10-05 | 1984-10-05 | Manufacture of electronic circuit device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05275553A JPH05275553A (en) | 1993-10-22 |
| JPH088408B2 true JPH088408B2 (en) | 1996-01-29 |
Family
ID=14899827
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4125018A Expired - Lifetime JPH088408B2 (en) | 1992-05-18 | 1992-05-18 | Electronic circuit device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH088408B2 (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2890065B1 (en) * | 2005-08-30 | 2007-09-21 | Commissariat Energie Atomique | METHOD FOR ENCAPSULATING A COMPONENT, ESPECIALLY ELECTRIC OR ELECTRONIC, BY MEANS OF AN IMPROVED WELDING CORD |
| JP6984787B2 (en) * | 2019-05-07 | 2021-12-22 | 三菱電機株式会社 | Semiconductor devices and their manufacturing methods |
-
1992
- 1992-05-18 JP JP4125018A patent/JPH088408B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH05275553A (en) | 1993-10-22 |
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