JPH0896435A - Coil drive current waveform control method - Google Patents

Abstract

PURPOSE: To prevent heat emission by integrating a pair of switching element and a parallely connected resistor into the bias voltage impressing section of the coil drive circuit and controlling the switching element by using the edge detection signals of recording signals. CONSTITUTION: The circuit of the device for this method is so formed as to use FETs for switching elements, alternately turn on/off diagonally opposite FETs and make alternate current flow into the coil of the magnetic head. In this case, the on-resistance of the FET 1 is smaller than the resistance 6. Consequently when the FET 1 is on, the parallel resistance of the FET 1, and the resistor 6 becomes roughly equal to the on-resistance of the FET 1 and when the FET 1 is off, the resistor 6 appears just as the parallel resistance. Hence, the bias voltages in inverse proportion to the on-resistance of the FET 1 and the resistor 6 are alternately applied to the magnetic coil 7.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of controlling a coil drive current waveform of a magnetic head for performing magnetic field modulation recording in a magneto-optical recording / reproducing apparatus.

[0002]

2. Description of the Related Art Conventionally, in order to rapidly reverse the magnetization of a magnetic head having an inductance component of about 5 to 50 [μH], four switching elements are used as shown in a simplified circuit diagram of FIG. The switching elements 101 and 104 are driven in pairs, and the switching elements 102 and 103 are driven in pairs. In this way, by alternately turning on / off each of two switching elements in pairs, it is possible to alternately flow currents of opposite directions into the coil 105 of the magnetic head, and accordingly, the direction of the magnetic field is reversed in the magnetic head. It is a mechanism to do.

Alternatively, as shown in FIG. 27B, a method of using two switching elements 106 and 107 to alternately turn them on and off has been adopted. In this case, although the number of switching elements is small, there is another current flow path from the power supply to the ground in addition to the path passing through the coil 105 of the magnetic head, so that the current consumption is approximately doubled.

In any case, if the current flowing through the coil 105 is alternately switched by these methods, 100
Switching is possible without problems at low frequencies below [kHz], but switching at higher frequencies, for example, at frequencies near 1 [MHz], results in switching waveforms even with high-speed switching elements. Becomes as shown in FIG. A of this waveform diagram
The increase in current from the point to the point B represents a state in which the switching element cannot be completely turned on due to the input capacitance, the feedback capacitance, the output capacitance, etc. of the switching element. Actually, when the switching frequency is lowered, the waveform becomes as shown in FIG. 29, and there is no problem at all, but when looking at the enlarged view of the rising waveform in FIG. 29, it takes time until the current is saturated. That is, switching at a frequency near 1 [MHz] means that the enlarged view of the rising waveform in the figure is continuously repeated.

The frequency dependence of the switching waveforms described above is that the peak current value flowing at each frequency in a magnetic head coil that actually needs to be switched at various modulation frequencies varies as shown in FIG. Of course, the generated magnetic field also has different results depending on the switching frequency.

On the other hand, if the magnetic field sensitivity of the magneto-optical recording film is sufficiently lowered, no problem will occur even if the current waveform flowing in the coil of the magnetic head is the waveform shown in FIG. 28 or 30. This is because, for example, if the saturation magnetic field of the recording film is obtained at the current values shown by the broken lines in both figures, the overcurrent portion shown by the diagonal lines in both figures has no effect on the recording state.

However, at this time, there is another problem of heat generation due to loss of the magnetic head coil and core and heat generation in the peripheral circuit, but this causes intermittent energization time (intermittent recording). Will be solved in.

As described above, the above-mentioned problems are caused by increasing the sensitivity of the recording film or recording by intermittent energization without controlling the current waveform flowing in the coil of the magnetic head so far. I've avoided it.

[0009]

However, the above-mentioned conventional technique has the following problems. First,
Although intermittent recording is possible if data can be compressed or if recording efficiency is reduced, continuous recording is naturally required to efficiently record normal continuous data. That is,
The coil energization time of the magnetic head must also be continuous, which causes a problem of heat generation of the magnetic head, switching elements and the like. As an example, in FIG. 31, a current of about ± 400 [mA] is applied to a magnetic head coil having a DC resistance of about 1 [Ω] and an inductance component of about 6 [μH].
The following describes how the temperature of the magnetic head core rises with time when intermittent energization is performed at a ratio of (energization) to 3 (interruption) and when continuous energization is performed. The temperature rise is significantly different between intermittent energization and continuous energization.

Further, even in the case of continuous energization, in the waveform as shown by the solid line and the waveform as shown by the broken line in the former, the excess current in the shaded area appears as it is as the temperature rise, so more When there is heat generation and there is no margin for heat generation, this extra heat generation cannot be ignored.

In order to solve the above problem, it is conceivable to increase the magnetic field sensitivity of the recording film to reduce the value of the current flowing through the magnetic head, but there is a limit to improving the magnetic field sensitivity of the recording film. In order to make a design in anticipation, it is necessary to apply a sufficient current to the magnetic head, which also causes the problem of heat generation. If the current flowing through the magnetic head coil is reduced to suppress heat generation and there is no margin for the magnetic field sensitivity of the recording film, the current increase in the latter half of the switching of the recording current waveform shown by the solid line in FIG. 32 remains unchanged. Since the magnetic field strength appears, the recording state is different between the first half and the latter half of the switching, and as a result, the amplitude of the latter half is larger and the waveform is distorted as in the reproduced waveform 108 shown by the solid line in FIG. . this is,
Naturally, this leads to an increase in jitter, which in turn leads to an increase in error rate.

Further, as a matter of course, since switching is performed at various frequencies in actual recording, a conventional recording waveform as shown in FIG. 30 causes a considerable overcurrent to flow at low frequency switching. As a result, the heat generation of the magnetic head and the peripheral circuit becomes much larger.

The present invention solves the problems described above. It is used in a magnetic head and its drive circuit while controlling the coil drive current waveform to sufficiently maintain the magnetic field sensitivity of the recording film. It is possible to suppress the heat generation of the element to be manufactured as much as possible, and the reliability is improved. Furthermore, since the coil drive current waveform can be easily controlled by adding a few parts, cost increase can be minimized. That is, the object is to propose a low-cost and highly reliable coil drive current waveform control method, and improve the reliability of the magneto-optical recording / reproducing apparatus.

[0014]

The coil drive current waveform control method of the present invention is as follows: (1) In the coil drive current waveform control method of a magnetic head for magnetic field modulation recording of a magneto-optical recording / reproducing apparatus, the bias of the coil drive circuit is used. The voltage applying unit is provided with at least a pair of switching elements and resistors in parallel, and the switching elements are controlled by the edge detection signal of the recording signal.

(2) In the coil drive current waveform control method according to the first aspect, the edge detection signal that causes the switching element to be in a conductive state applies a sufficient high bias voltage by the time when the recording signal is switched. It is characterized by being controlled.

(3) In the coil drive current waveform control method according to the first or second aspect, the pulse width of the edge detection signal that makes the switching element conductive is:
It is characterized in that it is substantially equal to the switching time of the magnetic head.

(4) In the coil drive current waveform control method according to item 1, item 2 or item 3, the edge detection signal is output from an encoder that modulates the recording signal, and the modulation data "1" is output. It is characterized in that it is obtained from an RZ signal which outputs a high level at the position "" or a signal having a phase opposite to the RZ signal.

(5) In the coil drive current waveform control method according to item 1, item 2 or item 3, the edge detection signal is the recording signal, a recording reference clock of the highest recording frequency, or the recording reference. It is characterized in that it is a signal created from a clock having a frequency that is an integral multiple of the clock.

(6) In the coil drive current waveform control method according to the first aspect, the switching element is continuously controlled by an analog waveform.

(7) In a method of controlling a coil drive current waveform of a magnetic head for performing magnetic field modulation recording of a magneto-optical recording / reproducing apparatus, a switching element is provided in a bias voltage applying section of a coil drive circuit, and a voltage drop caused by the switching element,
Alternatively, it is characterized in that the current value is directly controlled by a control signal.

[0021]

【Example】

(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram of an embodiment for performing coil drive current waveform control of the present invention. The operation of the circuit will be described below. The circuit of the present embodiment is a type of circuit in which an FET is used as a switching element, and the FET at the crossing position is alternately turned on / off to cause a current to flow alternately into the coil of the magnetic head. In the present embodiment, in addition to these coil drive circuits, an FET for controlling switching of the bias voltage and a resistor are added to the bias side of the power supply voltage. This is the FET 1 and the resistor 6 in FIG. F
Since there is a relation of ON resistance of FET1 <resistance 6 between ON resistance of ET1 and resistance 6, the parallel resistance of FET1 and resistance 6 becomes almost equal to the ON resistance of FET when FET1 turns on, and FET turns off. When doing, the resistor 6 appears as a resistor component as it is. That is, the bias voltage applied to the magnetic head coil 7 is switched in inverse proportion to the ON resistance of the FET 1 and the resistance 6.

The control signal 1 is used for this switching.
0, and the switching is performed by the edge detection signal 12 as described in the claims. The edge detection signal 12 is shown in FIG.
As shown in, the first edge detection signal 13 that outputs a high level from both the rising edge position and the falling edge position of the recording signal 11 for a certain period of time, and the high level for a certain period of time from the rising position of the recording signal 11 to the falling position. A second edge detection signal 14 that outputs a level, a third edge detection signal 15 that outputs a high level for a certain period of time between the rising position and the falling position of the recording signal 11, and the like are conceivable.
Here, the time at which the edge detection signal 12 outputs a high level, that is, the pulse width (corresponding to τ in FIG. 2) differs depending on the type of modulation signal and the rise time of the magnetic field required for the magnetic head. Therefore, the pulse width of the edge detection signal will be specifically described later.

Next, the bias voltage switching operation will be described. First, consider a simple coil drive circuit that does not have bias voltage switching. In FIG.
When a constant voltage of 5 [V] is applied as the bias voltage, the coil current waveform immediately after switching becomes a current waveform A in FIG. On the other hand, the bias voltage is 2.5
When a constant voltage of [V] is applied, the coil current waveform immediately after switching becomes a current waveform B in the figure. According to the present invention, bias voltage switching is performed before and after the switching time point like the bias voltage of the current waveform C in the figure. The bias voltage is changed from 5 [V] to 2.5.
The current waveform when switched to [V] is as shown in current waveform C in FIG. This is because the high bias voltage of 5 [V] is applied at the time of switching, with the bias voltage of the current waveform C in FIG. 3, after the switching, the current waveform A having a fast rise time is first traced, and thereafter. This is because the saturation current corresponding to the bias voltage of 2.5 [V] flows. Here, the bias voltage is already 2.5 [V]
In the period of D to E of FIG. 3 in which the bias voltage is 2.5, a large amount of the current waveform flows like C and does not follow the current waveform B at the time of D when the bias voltage = 2.5 [V]. This is because the current flows up to the saturation current, and the current amount does not become small as at the current waveform B from this time point even if the bias is low.

The above description will be followed along with a concrete waveform chart. FIG. 4 is a voltage and current waveform diagram of each point in FIG. The recording signal 11 is assumed to be the EFM signal 16, and the control signal 10 is FET1 only for about 230 [ns] from the edge position (rise and fall position) of the recording signal.
In order to turn on, the edge detection signal 12 having a pulse width of 230 [ns] is set. This is a signal corresponding to the first edge detection signal 13 in FIG.

First, the first edge detection signal 13 can be easily obtained by the circuit shown in FIG. That is, the EF having the opposite phase to the EFM signal 16 which is the recording signal 11.
After obtaining the M inverted signal 23 through the inverter 22, the respective signals may be input to the one-shot pulse generation circuits 24 and 25 such as a monostable multivibrator and the two output signals may be passed through the OR gate 26. By doing so, the first edge detection signal 13 corresponding to both the rising and falling edge positions of the original EFM signal can be obtained. The pulse width of the first edge detection signal 13 can be adjusted by changing the values of the resistors and capacitors for setting the pulse widths of the one-shot pulse generation circuits 24 and 25. It is also easy to create the pulse width.

Further, the second edge detection signal 1 of FIG.
4, when the third edge detection signal 15 is obtained, while the edge detection signal is obtained by the circuit of FIG. 5, the EFM signal 16 which is the recording signal 11 is equal to the pulse width (here, 230 [n
s]). Specifically, as shown in FIG. 6, the second edge detection signal 14 is obtained by passing through the delay circuit 27 for 230 [ns]. In this state, the pulse width of the one-shut pulse generation circuit is doubled. Then, the third edge detection signal 15 is obtained.

Waveforms Returning to the description of FIG. 4, the FET 1 is turned on / off by using the edge detection signal 12 (here, the first edge detection signal 13) as the control signal 10, and the bias voltage at point A in FIG. 17 is binary-controlled during one recording unit as shown in FIG. On the other hand, FET2, FET5, F
Since the ET3 and the FET4 are turned on / off as a pair in accordance with the recording signal (here, the EFM signal 16), the direction of the bias voltage applied to the magnetic head is inverted according to the EFM signal 16, and the EFM signal is applied to the coil 7 of the magnetic head. 16
Current flows in each direction corresponding to. The coil current 18 flows with the waveform shown in FIG. 4 (the direction of the arrow in FIG. 1 is plus), and the rising time of this current is about 15
It is 0 to 300 [ns]. At this time, the counter electromotive force at the time of switching appears in the B point potential 19 and the C point potential 20 at both ends of the coil. Further, during the switching period, the supply current 21 from the charging / discharging capacitor 8 flows toward the coil 7 at a point D (the direction of the arrow in FIG. 1 is plus) and normally flows through the FET (FET2 → coil). 7 → FET5, FET3 → coil 7 → FET4), no current is supplied.

Here, the rise time of the current waveform is shown in FIG.
Charging / discharging capacitor 8 in parallel with the magnetic head 7 of
The rise time can be shortened as the capacitance is reduced, but in this case, the counter electromotive force at the ends of the magnetic head during switching increases conversely, so do not exceed the breakdown voltage of the peripheral elements. Note that you must be careful of.

Further, the EFM has been used as a recording modulation signal so far.
Although the signal has been described as an example, the present invention is not limited to this, and is of course applicable to 2-7 modulation recording and 1-7 modulation recording which are often used in ordinary magneto-optical recording. It is possible. However, in this case, the normal recording frequency is in a higher frequency region than the EFM signal, so that the design change of the magnetic head or a faster switching element, a switching circuit or the like is a prerequisite.

In any case, when the magnetic head coil is driven by the circuit and control method described above, the current waveform flowing through the coil does not have different peak current values depending on the frequency, and even at a single frequency. The current value after switching does not increase. Therefore, the magnetic field strength after switching remains almost constant,
Flat characteristics can be obtained.

(Embodiment 2) The second aspect of the present invention will be described below.
An embodiment corresponding to claim 3 will be described with reference to the drawings.
In the first embodiment, the case of the first edge detection signal 13 of FIG. 2 has been mainly described. Here, the case where the second edge detection signal 14 and the third edge detection signal 15 are used will be described in comparison with the first edge detection signal 13.

First, the difference between the edge detection signals shown in FIG. 2 will be described. As can be seen from the above description, when the edge detection signal 11 indicates a high level, the FET1 of the bias voltage control unit turns on. Strictly speaking, since the driver for driving the FET1 is inverted in phase, the FET1 is turned on when the signal level input to the gate of the FET1 is low level. As a result, the potential at the point A shown in FIG. 1 becomes high bias, and conversely, the FET1
When the level of the signal input to the gate of becomes high level, the potential at point A switches to low bias.

Therefore, in the case of the first edge detection signal 13 described in the first embodiment, as shown in FIG. 2, the edge detection signal is detected after the switching point of the recording signal 11 (corresponding to the broken line in the figure). It becomes high, and the high bias voltage is applied for a time substantially equal to the switching time of the magnetic head.

However, as described in the first embodiment, the current is supplied from the charging / discharging capacitor 8 arranged in parallel to the magnetic head to the magnetic head rather than being supplied from the power source during the switching period of the magnetic head. Is supplied.
Therefore, the high bias voltage at the time of switching contributes to the speedup of the rise time of the current, but the high bias voltage during the subsequent pulse width: τ hardly contributes to the speedup of the rise time.

On the other hand, in the case of the second edge detection signal 14, the edge detection pulse is high before the switching time of the recording signal 11 as shown in FIG. Sufficient electric charge is stored in the capacitor 9, and current is supplied to the magnetic head simultaneously with switching. Therefore, the rise time can be speeded up more than in the case of the first edge detection signal. Alternatively, a desired saturation current can be made to flow with a power supply voltage lower than that in the case of using the first edge detection signal, which is also advantageous from the viewpoint of low power consumption.

Further, in the case of the third edge detection signal 15, there is a relation of the third edge detection signal = the first edge detection signal + the second edge detection signal regarding the timing of the pulse width and the recording signal. Therefore, the effects of both the first and second edge detection signals can be expected. However, in this case, it is considered that the second edge detection signal, which is more effective than the first edge detection signal, has substantially the same effect.

Next, how the current waveform is affected when the pulse width becomes shorter or longer than the rising time of the current in the first to third edge detection signals will be described. First, in each case of the first to third edge detection signals, if the pulse width is too short, the high bias level at the time of switching also becomes short, charge accumulation is insufficient, and the rise time of the current waveform does not become fast. On the other hand, when the pulse width is too long, the overshoot after the completion of switching may be large in the case of the first edge detection signal as shown in FIG. 7, and in the case of the second edge detection signal, As shown in FIG. 8, an excess current may flow immediately before switching. Furthermore, in the case of the third edge detection signal, both of the above-mentioned overshoots appear and the waveform becomes as shown in FIG. Therefore, the pulse widths of these edge detection signals are approximately equal to the switching time in the case of the first and second edge detection signals, and about twice the switching time in the case of the third edge detection signal. It is desirable to set the pulse width to. That is, the desired switching time must be clear to determine the pulse width of the edge detection signal.

By the way, this desired switching time differs depending on the modulation method, the number of revolutions of the disk, or the amount of generation of the peak magnetic field. However, a rough guideline can be determined by the highest recorded frequency. For example, when the maximum recording frequency is 1 [MHz], the recording pulse width is 500 [ns], and the switching time (≦ 250 [ns]) of at least ½ thereof is required.

Here, the pulse width of the edge detection signal calculated from the desired switching time can be easily changed by changing the values of the peripheral resistors and capacitors of the one-shot pulse generation circuits of FIGS. 5 and 6. Therefore, the pulse width of the edge detection signal can be optimally set regardless of the maximum recording frequency. At this time, needless to say, it is also necessary to change the design of the magnetic head according to the recording frequency.

In summary of the above description, the edge detection signal is the second edge detection signal of FIG. 2 which can apply a sufficiently high bias voltage until the switching time of the recording signal, and its pulse width is about the magnetic head. Equal to the switching time of In this case, there is a possibility that an overshoot of the current just before switching as shown in FIG. 8 may occur, but if the pulse width is appropriately selected, this can be suppressed to a minute level, so that it has little effect on heat generation. Also, it has been stated above that the pulse width of the edge detection signal is optimally set to be approximately equal to the desired rise time of the magnetic field, but the switching time of the bias voltage is not something that must be strictly controlled, It suffices if it is approximately equal to the rise time of the current,
The required accuracy depends on the rise time of the magnetic field and the margin of heat generation. Therefore, it should be added that the effects of the present invention can be sufficiently obtained even under non-optimal conditions.

(Third Embodiment) In the above-described embodiments, the bias voltage switching control section is arranged on the power supply side, but it may be arranged on the ground side as shown in FIG. 10, for example. At this time, the logic of the control signal 10 is opposite to that in the first embodiment, and the type of the FET 28 used for bias voltage control is also opposite, but the effect is exactly the same as in the first embodiment.

Further, also in other circuit configurations which can be considered as the coil drive circuit, the same effect can be expected by adding the bias voltage switching control section as described above and using the control signal for controlling it. Specifically, a circuit using a transistor instead of the FET as shown in FIG.
A circuit using two ETs as shown in FIG. 12 or a circuit configuration using two transistors as shown in FIG. 13 can be considered. The switching element used for bias voltage control is also F
Both ET and transistor are conceivable, but since the characteristics are different between them, it is necessary to change the resistance value or the like inserted in parallel, but there is no difference in the effect. The specific operation of the circuit is the conventional method for the coil drive circuit, and the bias voltage switching control, which is a feature of the present invention, is almost the same as the method described in the first and second embodiments. The description is omitted here.

(Embodiment 4) An embodiment corresponding to claim 4 of the present invention will be described below. Up to now, an example of using a one-shot pulse generation circuit has been shown for the control signal for switching the bias voltage, but here, as the simplest method, the RZ (Retu of the recording signal encoder IC is used.
A method of using the rn to Zero) signal will be described. This method cannot change the pulse width of the control signal as compared with the method using the one-shot pulse generation circuit described above, and is effective when the rise time of the desired current waveform is almost equal to the pulse width. However, they cannot be used when they are far apart.
On the other hand, since there is no need for extra ICs, resistors, capacitors, etc., there is an advantage that the cost increase can be suppressed and the present invention can be easily implemented.

First, regarding the recording signal, the modulated recording signal may be anything as long as it meets the above conditions.
Here, the EFM signal described so far will be described as an example. The EFM signal is a modulation method used in compact discs and the like, and when the length of the recording reference clock is T, modulated data of 3T to 11T exists. That is, one recording unit has a length of 3T to 11T. At this time, the length of T is about 230 [ns], but on the other hand, since the required rise time of the magnetic field is about 200 [ns], it can be seen that there is not much difference between the two values. . Therefore, if the control signal having the pulse width of the recording reference clock is obtained, the bias voltage switching control as described above can be performed. Details will be described below with reference to specific circuits and timing charts of waveforms.

FIG. 14 is a timing chart for generating a recording waveform inside the encoder IC. Assuming that the modulated EFM signal 34 is shown in the figure, the modulated data is usually obtained as the RZ signal 35. This RZ signal 35
Is a signal that outputs a high level corresponding to "1" of the EFM signal 34, and returns to a low level again when "0" comes next. Therefore, the pulse width when "1" is set is always the length of one clock of the recording reference clock 36. Further, to make the RZ signal 35 a recording signal, the RZ signal 35 is input to the clock input terminal 40 of the circuit diagram shown in FIG. 15, and the inverted output of the D-type flip-flop 38 is input to the data input terminal 39. Just give us your feedback. This way, NRZI (Non Re
A signal called the Turn Zero Inverters signal 37 is obtained. This NRZI signal 37 is EF
This signal is a signal that switches between a high level and a low level corresponding to "1" of the M signal 34, and its waveform is as shown in FIG. In this way, the recording signal 11 input to the drive circuit of the magnetic head coil is obtained. Also, until now RZ signal 3
Although the example in which 5 is used as the first edge detection signal has been described, if the NRZI signal 37 is delayed by one clock with the recording reference clock 36 as shown in FIG. 16, the NRZI ′ signal 41 obtained there is delayed. RZ signal 35
Has a phase relationship of the second edge detection signal, so that if this is used as the control signal, the effect shown in the second embodiment can be expected.

As described above, if the RZ signal 35 and the NRZI signal 37 are obtained from the encoder IC, the RZ signal 35 is used as the control signal 10 in FIG.
7 or the NRZI ′ signal 41 is used as the recording signal 11, the coil drive current waveform control of the present invention can be easily implemented. At this time, the encoder IC is originally a component to be mounted, and the one-shot pulse IC or the like is not used. Therefore, the only components necessary are the switching element for switching the bias voltage and the resistor placed in parallel with it. It will be easy. Therefore, the mounting space can be saved and the cost can be improved.

Further, when the bias voltage control portion is not on the power source side as in FIG. 1 but on the ground side as in FIG. 10, an inverted signal of the RZ signal is required as a control signal, which is an inverter. There is no problem because it can be easily obtained by passing through.

Finally, points to be noted when this configuration is adopted will be described. This is not a problem when the recording reference clock 36 has a single frequency, but when the recording reference clock is switched, for example, when the number of rotations of the disk is switched, such as 1x speed ⇔ 2x speed ⇔ 4x speed, recording is continued. In this case, if the RZ signal 35 is used as the edge detection signal 12, the pulse width also changes according to the frequency of the recording reference clock 36. That is, when the switching time of the current flowing through the magnetic head is determined in accordance with the 4 × speed recording of the highest recording frequency, even if the pulse width of the edge detection signal is almost equal to one clock of the 4 × speed recording, the 2 × speed recording is performed. The pulse width is automatically doubled or quadrupled at the time of recording and 1 × speed recording. As a result, when the 4 × speed recording is set to the maximum recording speed as in this example, the switching time and the pulse width of the edge detection signal are unbalanced in the 1 × speed recording and the 2 × speed recording. 8 or the current waveform as shown in FIG. 9 flows, and attempting to record as it is will greatly affect the reliability of data and heat generation of the magnetic head, which is a problem.

Considering this from the standpoint of the recording medium, the switching speed should not be required to be the same for double speed recording and single speed recording as compared to quadruple speed recording. In that sense, the switching speed is rather double. It may be four times as long. Therefore, it seems convenient to change the pulse width of the edge detection signal to double or quadruple accordingly. However, in practice, since the magnetic head is manufactured so as to record at the highest frequency (in this example, quadruple speed recording), it is difficult to change the switching time with the same magnetic head. The capacity of the charge / discharge capacitor 8 must be switched by some means. This is not very realistic. Therefore, the magnetic field rise time (= current switching speed) is sufficient to record all linear velocities while maintaining the required speed at the highest recording frequency.

Therefore, in such a case, the method as described in the sixth embodiment may be used without using the encoder output RZ signal whose pulse width changes according to the recording reference clock.

(Embodiment 5) An embodiment corresponding to claim 5 of the present invention will be described below. There is no problem when the RZ signal 35 of the modulation signal is output from the encoder IC as in the fourth embodiment, but generally, the signal output from the encoder IC is only the recording signal 11, The signal 35 is not output. Therefore, the edge detection signal 12 used as the control signal 10 must be generated again, and the method will be described here.

FIG. 17 shows a circuit configuration for obtaining the first and second edge detection signals corresponding to the RZ signal by using the recording signal and the recording reference clock, and FIG. 18 shows a timing chart of the waveform of each point at that time. First, the recording data (here, the EFM signal 47) is input to the data input terminal 45 of the D-type flip-flop 42 in the first stage, and the recording reference clock 48 is input to the clock input terminal 46. Recording reference clock 48
Is a clock having a length corresponding to 1T of the modulated recording data as one cycle. The EFM signal 47 is latched by the recording reference clock 48, and the first stage output signal 49 is as shown in FIG. At this time, it should be noted that when the rising and falling edge portions of the EFM signal 47 and the rising position of the recording reference clock 48 almost coincide in time, the first-stage output signal 49 is EF.
Instead of duplicating the M signal 47, the pulse width may be lengthened or shortened by one clock like the erroneous latch signal 50 shown in FIG. 18. It may be necessary to take measures such as delaying either one of the signal input to the terminal 45 and the signal input to the clock input terminal 46 through some gate. In any case, since it can be realized if the phase relationship between both signals is clear, there is no particular problem.

Next, the output signal 49 of the first stage is input to the data input terminal of the D-type flip-flop 43 of the second stage, and the same recording reference clock 48 input in the first stage is input to the clock input terminal. With this configuration,
First stage output signal 4 from the first stage D-type flip-flop 42
9 becomes an EFM signal slightly delayed from the recording reference clock 48 by passing through the gate, so that the second-stage output signal 51 latched by the second-stage D-type flip-flop 43 is
An EFM signal delayed by one clock from the recording reference clock 48 is obtained. In addition, these first stage output signals 49 and 2
Exclusive OR gate 44 with the stage output signal 51
Then, the desired edge detection signal 52 is obtained. Since the edge detection signal 52 has a pulse width corresponding to one recording reference clock of the EFM signal, the pulse width is about 230 [ns]. At this time, the recording signal is the first-stage output signal 49 of the first-stage D-type flip-flop 42 or the second-stage D-type flip-flop 43.
The second-stage output signal 51 of 1 may be used. The former has a phase relationship such that the edge detection signal 52 is the first edge detection signal with respect to the recording signal (= first stage output signal 49), and the latter has edge detection with respect to the recording signal (= second stage output signal 51). The phase relationship is such that the signal 52 is the second edge detection signal.

Here, an example in which a D-type flip-flop is used to latch the recording signal has been described above, but it goes without saying that a JK flip-flop or shift register having the same function may be used. Absent.

Further, in the magneto-optical recording / reproducing apparatus having the magnetic head as described in the present invention, when the gate array IC is used due to the system configuration, the above-mentioned circuit has a very simple circuit configuration, It is easy to incorporate the above circuit into the array IC, and this brings further advantages in terms of mounting and cost. At this time, the signals input to the gate array IC are only the recording signal and the recording reference clock, so that even if the RZ signal is not output from the encoder IC, the edge detection signal can be obtained without adding any part.

(Sixth Embodiment) Here, a case where the recording reference clock is switched in the fifth embodiment will be described. When the recording reference clock is switched, if it is directly input to the clock input terminal 46 of FIG. 17,
As described in the fourth embodiment, the pulse width of the edge detection signal also changes. Therefore, the clock input terminal 4 of FIG.
6, it is necessary to always input the recording reference clock of the highest recording frequency. This is because the pulse width of the edge detection signal is always one clock of the highest recording frequency. A specific example will be described below.

For example, the EFM signal is transmitted at 1 × speed, 2 × speed, 4
In double-speed recording, the pulse width of the edge detection signal may be approximately equal to the switching time required in quadruple-speed recording, and in this case, the pulse width is approximately 50 [ns].

The pulse width of 50 [ns] corresponds to the recording reference clock (≉58 [n] at the time of quadruple speed recording of the EFM signal.
s]), it is necessary to always input the recording reference clock at the quadruple speed recording (corresponding to the highest recording frequency in this example) to the clock input terminal 46. On the other hand, the recording reference clock 55 of the recording data is selected by the clock selecting means 54 at the time of recording as shown in FIG. 19, and is input to the encoder 56. Encoder 56
Then, the EFM signals 57 for 1 × speed, 2 × speed, and 4 × speed recording are respectively output based on the input recording reference clock 55. The EFM signal is the data input terminal 45 of the first-stage D-type flip-flop 42 described earlier with reference to FIG.
, And the recording reference clock 58 of the highest recording frequency is input to the clock input terminal 46 of the first-stage D-type flip-flop 42, as described above, so the EFM signal 57 input to the data input terminal is input. Edge detection signal 52 even if the recording mode is switched to 1x speed, 2x speed, or 4x speed recording.
Holds a constant value for one recording reference clock of the highest recording frequency (here, about 58 [ns]). This allows
Even if the linear velocity is switched, the current waveform control described so far can be performed.

The recording reference clock frequency dividing circuit 53, the clock selecting means 54, etc. shown in FIG. 19 may be included in the encoder 56, so that they will be described just in case.

Although only the method of creating the edge detection signal has been described so far, it is needless to say that the design of the magnetic head needs to be changed in order to perform the 4 × speed recording. Specifically, a magnetic head having a smaller inductance than that of 1 × speed recording is required, and without this, it is impossible to expect an increase in switching speed. Then, the magnetic head for quadruple speed recording is used to perform both single speed recording and double speed recording. At this time, the effective magnetic field range may be narrowed due to the reduction of the core size of the magnetic head, etc., but this can be sufficiently avoided by improving the mechanical accuracy and the mounting accuracy,
It can be considered that there is a sufficient margin for the positional deviation between the light spot position and the effective magnetic field range.

Further, the fact that the flip-flop described above can be replaced with another type, and that cost advantages can be obtained by forming a gate array including the encoder of FIG. 19 and the like are described in the above embodiments. That's right.

(Embodiment 7) In Embodiment 5 and Embodiment 6, when a clock having a frequency equal to or higher than an integral multiple thereof is used instead of the recording reference clock 58 having the highest recording frequency, FIG.
If a plurality of flip-flops such as 0 are arranged and the exclusive OR of the first stage output signal 59 and the output signal of some stages is set according to the pulse width, a desired edge detection signal 60 is obtained.
Is obtained. In this case, it is convenient to use a shift register having a parallel output.

(Embodiment 8) An embodiment corresponding to claim 6 of the present invention will be described below with reference to the drawings. In the embodiments described so far, the bias voltage control performed in the bias voltage applying section was the binary control performed by turning on and off the switching element. That is, since the value of the current flowing through the bias voltage applying section is approximately constant, when the switching element is in the ON state, the ON resistance component of the switching element (strictly speaking, since the switching element is not fully turned ON, , And there is a voltage drop due to the resistance in parallel when the switching element is off, switching the bias voltage. For this purpose, the signal for controlling the switching element must be a digital signal that gives a binary value, and the above-described embodiment also controls such a signal. In this embodiment, this control signal is not limited to a digital signal, but is controlled by an analog waveform.

Specifically, as shown in the circuit diagram of FIG. 21, resistors 61 and 62 are inserted in the line of the control signal 10 to divide the drive voltage, or filtering is performed using a capacitor or a resistor. To get an analog waveform. The original control signal may be the edge detection signal described above or another signal. For example, in the case of the edge detection signal 63, as shown in FIG. Then, as compared with the digital drive signal 64, the analog drive signal 65 for driving the FET becomes as shown in FIG. 22, and thus the FET is driven.

At this time, considering the driving state of the FET with reference to FIG. 23, in the above-described embodiments, the voltage between the gate and the source is switched between approximately 0 [V] and -5 [V], and therefore the resistance thereof is changed. The value was switched to infinity 66 and a certain low resistance value 68, but in this case, the voltage between the gate and the source is about -2 [V] at the maximum, so the resistance value is infinite. There is no state of large 66, and there is a state of having an intermediate resistance value 67 that has a maximum resistance value. Further, the voltage between the gate and the source also changes according to the voltage value of the drive signal, and the on-resistance value becomes smaller as −2 [V] → −5 [V]. Therefore, F in the digital voltage control 69 and the analog voltage control 70 of the present embodiment.
The on-resistance value of ET changes as shown in FIG.

As described above, in this embodiment, the FET is always used in the ON state, and the FET is in the OFF state, that is,
There is no infinite on-resistance. As a result, the following effects can be expected.

Since each channel of the FET has its own junction capacitance and it takes a certain time to charge them at the time of switching, if switching is performed at a high frequency, the FET cannot be fully turned on and the capacity becomes full. The current wasn't running out. However, in the case of transiting between the states that are originally on as in this case, the charging time is shortened and the time until the low on-resistance is reduced is also shortened. Therefore,
Even if the voltage of the bias voltage source of the coil is not changed, it is possible to flow more drive current than before with the same frequency. The same applies to the case where a transistor is used as the switching element.

In order to obtain this effect, it is also possible to give a difference between the voltage value of the bias voltage source that determines the value of the current flowing in the coil and the power supply voltage value of the drive driver.

(Embodiment 9) An embodiment corresponding to claim 7 of the present invention will be described below with reference to the drawings. In the present embodiment, the bias voltage control unit or the resistor is not arranged in parallel in the bias voltage control unit as in the past, and the bias voltage control or the current control is performed only by the switching element.

For example, as shown in the circuit diagram of FIG. 24, one FET is arranged in the bias voltage control section, and the FET1
This is a method of directly controlling the on-resistance value between the drain and source by a control signal input to the gate terminal of. The controlled ON resistance value may be binary switching control as described above, or may be analog control.

The same effect can be achieved when a transistor is used as the switching element, and the same effect can be expected by controlling the base input current value of the transistor 29 shown in FIG.

As described above, in this embodiment, by directly controlling the voltage drop value and the current value by the control signal to the switching element, the parallel resistance used so far becomes unnecessary. Since a current value of, for example, about 200 [mA] flows in this parallel resistor, a resistor having a large rated power had to be used. However, in the present embodiment, this resistor is eliminated, and therefore in terms of cost, It is also advantageous in terms of mounting.

[0073]

As described above, according to the present invention, by controlling the coil drive current waveform of the magnetic head of the magneto-optical recording / reproducing apparatus, while keeping the recording magnetic field strength constant, Reliability is improved by suppressing heat generation of electronic parts such as sliders and switching elements. As an example, when a current of about 200 [mA] is applied to a magnetic head coil having a DC resistance of about 2 [Ω] and an inductance component of about 30 [μH] with a current waveform as shown by the solid line in FIG. When the temperature rises of the magnetic head cores when the current waveform is applied as described above are compared (the peak value of the current on the broken line is set to ± 200 [mA]), as can be seen from FIG. 26, the drive current waveform of the present invention. Heat generation is suppressed by 30% to 40% with the control as compared with the case without the drive current control.

Further, since the margin for heat generation is widened, it becomes possible to continuously apply current to the magnetic head, which opens a way for continuous data recording in which data compression is impossible.

Further, since this method is capable of controlling the current waveform even when the recording reference clock is switched, the above description is also applied when recording is performed over different linear velocities such as 1 × speed recording to 4 × speed recording. It has the characteristic that the effect is sufficiently obtained.

[Brief description of drawings]

FIG. 1 is a circuit diagram for performing coil drive current waveform control of the present invention.

FIG. 2 is a waveform diagram of an edge detection signal used in the present invention.

FIG. 3 is an explanatory diagram of bias voltage control according to the present invention.

FIG. 4 is a voltage and current waveform diagram at each point of the circuit diagram of the present invention.

FIG. 5 is a circuit diagram of first edge detection signal generation according to the present invention.

FIG. 6 is a circuit diagram of second and third edge detection signal generation of the present invention.

FIG. 7 is a current waveform diagram when the pulse width of the first edge detection signal of the present invention is too long.

FIG. 8 is a current waveform diagram when the pulse width of the second edge detection signal of the present invention is too long.

FIG. 9 is a current waveform diagram when the pulse width of the third edge detection signal of the present invention is too long.

FIG. 10 is a circuit diagram for performing coil drive current waveform control of the present invention.

FIG. 11 is a circuit diagram for performing coil drive current waveform control of the present invention.

FIG. 12 is a circuit diagram for performing coil drive current waveform control of the present invention.

FIG. 13 is a circuit diagram for performing coil drive current waveform control of the present invention.

FIG. 14 is a waveform explanatory diagram of an RZ signal used as an edge detection signal in the present invention.

FIG. 15 is a circuit diagram for obtaining an NRZI signal from an RZ signal used as a first edge detection signal in the present invention.

FIG. 16 is a circuit diagram for obtaining an RZ signal and an NRZI ′ signal used as a second edge detection signal in the present invention.

FIG. 17 is a circuit diagram for generating an edge detection signal of the present invention from a recording reference clock and a recording signal.

FIG. 18 is a timing chart of each point of a circuit diagram for generating an edge detection signal of the present invention.

FIG. 19 is a circuit diagram for generating an edge detection signal when the recording reference clock is switched in the present invention.

FIG. 20 is a circuit diagram for generating an edge detection signal of the present invention from a clock that is an integer multiple or more of a recording reference clock and a recording signal.

FIG. 21 is a circuit diagram for controlling the coil drive current waveform according to the present invention.

FIG. 22 is a waveform diagram showing an analog drive signal of the present invention.

FIG. 23 is an explanatory diagram illustrating a difference between digital voltage control and analog voltage control according to the present invention.

FIG. 24 is a circuit diagram for performing coil drive current waveform control of the present invention.

FIG. 25 is a circuit diagram for controlling the coil drive current waveform according to the present invention.

FIG. 26 is a graph illustrating the effect of the present invention.

FIG. 27A is a circuit diagram when four switching elements are used in a conventional magnetic head drive circuit. FIG. 6B is a circuit diagram when two switching elements are used in a conventional magnetic head drive circuit.

FIG. 28 is a waveform diagram showing a current flowing through a coil when high frequency switching is performed in a conventional magnetic head drive circuit.

FIG. 29 is a waveform diagram showing a current flowing through a coil when low frequency switching is performed in a conventional magnetic head drive circuit.

FIG. 30 is a waveform diagram showing a current flowing through a coil when switching is performed at various frequencies in a conventional magnetic head drive circuit.

FIG. 31 is a graph showing the difference in core temperature increase between when the coil is continuously energized and when the coil is energized in the conventional magnetic head drive circuit.

FIG. 32 is a waveform diagram comparing a conventional magnetic head drive current waveform with a magnetic head drive current waveform of the present invention.

FIG. 33 is a reproduction signal waveform diagram when the recording magnetic field sensitivity is lowered in the conventional magnetic head drive circuit.

[Explanation of symbols]

1, 2, 3, 4, 5, 28 FET 6, 61, 62 Resistance 7, 105 Coil 8 Charging / discharging capacitor 9 Capacitor 10 Control signal 11 Recording signal 12, 52, 60, 63 Edge detection signal 13 First edge detection Signal 14 Second edge detection signal 15 Third edge detection signal 16, 34, 47, 57 EFM signal 17 Bias voltage 18 Coil current 19 B point potential 20 C point potential 21 Supply current 22 Inverter 23 EFM inversion signal 24, 25 One-shot pulse generation circuit 26 OR gate 27 Delay circuit 29, 30, 31, 32, 33 Transistor 35 RZ signal 36, 48, 55 Recording reference clock 37 NRZI signal 38, 42, 43 D-type flip-flop 39, 45 Data input terminal 40 , 46 Clock input terminal 41 NRZI 'signal 44 Exclusive OR gate 49, 59 First stage output signal 50 False latch signal 51 Second stage output signal 53 Frequency divider circuit 54 Clock selection means 56 Encoder 58 Recording reference clock of highest recording frequency 64 Digital drive signal 65 Analog drive signal 66 Infinity 67 Intermediate resistance value 68 Low resistance value 69 Digital voltage control 70 Analog voltage control 101, 102, 103, 104, 106, 107 Switching element 108 Reproduced waveform

Claims (7)

[Claims] 1. A coil drive current waveform control method for a magnetic head for performing magnetic field modulation recording in a magneto-optical recording / reproducing apparatus,
A coil drive current waveform control method characterized in that a bias voltage applying section of a coil drive circuit has at least a pair of switching elements and resistors in parallel, and the switching elements are controlled by an edge detection signal of a recording signal. . 2. The coil according to claim 1, wherein the edge detection signal for causing the switching element to be in a conductive state is controlled so that a sufficient high bias voltage is applied by the time when the recording signal is switched. Drive current waveform control method. 3. The coil drive current waveform control according to claim 1, wherein a pulse width of the edge detection signal for making the switching element conductive is substantially equal to a switching time of the magnetic head. Method. 4. The edge detection signal is output from an encoder that modulates the recording signal, and the edge of the modulation data is output.
The coil drive current waveform control method according to claim 1, 2 or 3, wherein the RZ signal is output at a 1 "position and a high level is output, or a signal having a phase opposite to the RZ signal is obtained. . 5. The edge detection signal is a signal created from the recording signal and a recording reference clock having the highest recording frequency, or a clock having a frequency that is an integral multiple of the recording reference clock. The coil drive current waveform control method according to claim 1, claim 2 or claim 3. 6. The coil drive current waveform control method according to claim 1, wherein the switching element is continuously controlled by an analog waveform. 7. A coil drive current waveform control method for a magnetic head for performing magnetic field modulation recording of a magneto-optical recording / reproducing apparatus,
A coil drive current waveform control method comprising a switching element in a bias voltage applying section of a coil drive circuit, and directly controlling a voltage drop or a current value by the switching element by a control signal.