JPH0897323A - Semiconductor package - Google Patents

Abstract

(57) [Summary] [Object] To provide a semiconductor package in which the number of electrode terminals can be increased without changing the arrangement pitch of the electrode terminals arranged in a plane on the package body or the size of the package body. [Arrangement] The arrangement pattern of the electrode terminals 12 arranged on the lower surface of the package body 11 is a regular triangular lattice.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor package surface-mounted on a printed board.

[0002]

2. Description of the Related Art Conventionally, a surface-mounted L
As shown in FIG. 4, a semiconductor package such as SI generally has a structure in which a plurality of electrode terminals 12 are provided on the side surface of a package body 11 including a semiconductor chip, but recently, it is shown in FIG. As described above, a structure in which a plurality of electrode terminals 12 are arranged on the lower surface of the package body 11 in a square grid pattern or a zigzag square grid pattern has been developed and put into practical use.

[0003]

By the way, in the semiconductor package as shown in FIG. 3, the mounting area on the substrate can be reduced as compared with the semiconductor package as shown in FIG. If the number of electrode terminals 12 is to be increased without changing the arrangement pitch, it is necessary to increase the size of the package body 11. However, when the size of the package body 11 is increased, the mounting area on the substrate is increased, so that there is a problem that the size of the substrate must be increased, and there is a problem that the warp of the package body 11 is increased. .

The present invention has been made in view of the above problems, and an object thereof is to change the number of electrode terminals without changing the arrangement pitch of the electrode terminals arranged in a plane on the package body or the size of the package body. It is intended to provide a semiconductor package capable of increasing the number of products.

[0005]

In order to solve the above-mentioned problems, the present invention is characterized in that the electrode terminals are arranged in a non-square grid pattern or a regular triangular grid pattern.

[0006]

[Function] The number of electrode terminals can be changed without changing the arrangement pitch of the electrode terminals or the size of the package body by making the arrangement pattern of the electrode terminals arranged in a plane on the package body into a non-square grid shape or a regular triangle grid shape Can be increased.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described below with reference to FIG. In FIG. 1, reference numeral 11 denotes a package body of a semiconductor package according to an embodiment of the present invention, and a plurality of electrode terminals 12 are arranged in a regular triangular lattice pattern on the lower surface of the package body 11. These electrode terminals 12 are formed in a hemispherical shape and are electrically connected to a semiconductor chip (not shown) included in the package body 11.

In the semiconductor package having such a structure, the number of the electrode terminals 12 is 711 when the size of the package body 11 is 26 mm × 26 mm and the arrangement pitch P of the electrode terminals 12 is 1 mm. On the other hand, in the semiconductor package shown in FIG.
6 mm x 26 mm, the arrangement pitch of the electrode terminals 12 is 1 mm
In that case, the number of electrode terminals 12 is 625.

Therefore, by forming the arrangement pattern of the electrode terminals 12 into a regular triangular lattice, the number of the electrode terminals 12 can be increased without changing the arrangement pitch of the electrode terminals 12 or the size of the package body 11.

In the above-described embodiment, the electrode terminal 12
Although the arrangement pattern of is a regular triangular lattice, the same effect can be obtained even if the arrangement pattern of the electrode terminals 12 is a non-square lattice.

The shape of the electrode terminal 12 is not limited to a hemispherical shape, and may be, for example, a pin shape as shown in FIG. 2A or a flat plate shape as shown in FIG. 2B. It can be one.

The length of the pin-shaped electrode terminal 12 is
Not all the same. That is, in FIG.
The length of the electrode terminal 12 provided in the region on the left side of the -A line may be longer than that of the electrode terminal 12 provided in the region on the right side of the AA line. By doing so, it is possible to deal with substrates having different thicknesses in the middle of the substrate.

The flat and hemispherical electrode terminals 1
As for 2 as well, it is not necessary to make the lengths of the terminals all the same as in the above. Further, in the above-described embodiment, the plurality of electrode terminals 12 are evenly provided on the entire lower surface of the package body 11. However, as shown in FIG. May be arranged in a regular triangular lattice or a non-square lattice.

[0014]

As described above, according to the present invention,
It is possible to provide a semiconductor package in which the number of electrode terminals can be increased without changing the arrangement pitch of the electrode terminals arranged in a plane on the package body or the size of the package body.

[Brief description of drawings]

FIG. 1 is a diagram showing an embodiment of the present invention.

FIG. 2 is a diagram showing a modification of the electrode terminal.

FIG. 3 is a diagram showing a conventional example.

FIG. 4 is a diagram showing a conventional example.

FIG. 5 is a diagram showing another embodiment of the present invention.

[Explanation of symbols]

 11 ... Package body 12 ... Electrode terminal

Claims (4)

[Claims] 1. A semiconductor package in which a plurality of electrode terminals are provided in a package body containing a semiconductor chip, wherein the array pattern of the electrode terminals is a non-square grid or a regular triangle grid. Semiconductor package. 2. The semiconductor package according to claim 1, wherein the electrode terminal has a hemispherical shape. 3. The semiconductor package according to claim 1, wherein the electrode terminal has a pin shape. 4. The semiconductor package according to claim 1, wherein the electrode terminal has a flat plate shape.