JPH0897327A - Method for manufacturing multilayer wiring board - Google Patents

Method for manufacturing multilayer wiring board

Info

Publication number
JPH0897327A
JPH0897327A JP6232788A JP23278894A JPH0897327A JP H0897327 A JPH0897327 A JP H0897327A JP 6232788 A JP6232788 A JP 6232788A JP 23278894 A JP23278894 A JP 23278894A JP H0897327 A JPH0897327 A JP H0897327A
Authority
JP
Japan
Prior art keywords
hole
insulating material
insulating film
taper
angle
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6232788A
Other languages
Japanese (ja)
Inventor
Masakatsu Kuwabara
正勝 桑原
Akinari Kawai
亮成 河合
Hideki Tateishi
秀樹 立石
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6232788A priority Critical patent/JPH0897327A/en
Publication of JPH0897327A publication Critical patent/JPH0897327A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038Through-connections; Vertical interconnect access [VIA] connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

(57)【要約】 【目的】多層配線層基板に絶縁膜にコンタクトスルーホ
ールなどのスルーホールを開口するとき、パターン形成
したスルーホール上へさらに絶縁材料の塗布とエッチン
グを行い、安定したテーパ角のスルーホールを形成でき
る。 【構成】あらかじめ塗布した1回目の絶縁膜3に順テー
パスルーホール4または、逆テーパスルーホール5のよ
うなスルーホールを開口しておき、この上に、2回目の
絶縁材料6をやや薄めに塗布し、エッチングすることに
より、スルーホールのテーパ角が鋭角の逆テーパ部分と
下地との間にエッチング残りを発生し、テーパ角の鈍角
の順テーパ部分にはエッチング残りが発生しないため、
安定的に順テーパスルーホールを形成できる。 【効果】絶縁膜上面とのスルーホール側面の角度を鈍角
にし、上面に形成する金属配線との断線防止などに効果
がある。
(57) [Abstract] [Purpose] When a through hole such as a contact through hole is opened in an insulating film on a multilayer wiring layer substrate, an insulating material is further applied and etched on the patterned through hole to provide a stable taper angle. Through holes can be formed. [Structure] A through hole such as a forward tapered through hole 4 or an inverse tapered through hole 5 is opened in the first applied insulating film 3 and a second insulating material 6 is slightly thinned on the through hole. By applying and etching, since an etching residue is generated between the reverse taper portion where the through-hole taper angle is an acute angle and the base, no etching residue is generated in the forward taper portion where the taper angle is obtuse.
The forward tapered through hole can be stably formed. [Effect] The angle between the upper surface of the insulating film and the side surface of the through hole is made obtuse, which is effective in preventing disconnection from the metal wiring formed on the upper surface.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】基板上に絶縁膜や金属配線膜など
を有する多層配線電子部品の製造に利用できる。
INDUSTRIAL APPLICABILITY The present invention can be used for manufacturing a multilayer wiring electronic component having an insulating film, a metal wiring film, etc. on a substrate.

【0002】[0002]

【従来の技術】従来、半導体や多層配線基板の製造方法
は、基板上に絶縁膜や、金属配線を形成することにより
行われていた。絶縁膜に金属配線とのコンタクトスルー
ホールなどのスルーホールを開口する方法として一般に
は、金属配線上にポリイミド樹脂などの絶縁材料を塗布
し、フォトレジストでスルホールパターンを形成し、エ
ッチングを行いスルーホールを開口する方法や、感光性
の絶縁材料を利用して、露光と現像を行い、スルーホー
ルを開口する方法がある。その他に、特開平5−198
687号公報のように、スルーホールを開口する部位
に、オーバー露光によりフォトレジストでスルーホール
の形状のパターンを形成し、ポリイミド系樹脂で被覆
し、酸素プラズマなどでレジストパターンが露出するま
でエッチングした後、露出したレジストを除去すること
によりスルーホールを開口する方法などが有る。
2. Description of the Related Art Conventionally, a method of manufacturing a semiconductor or a multilayer wiring board has been performed by forming an insulating film or a metal wiring on the board. As a method of opening a through hole such as a contact through hole with a metal wiring in an insulating film, generally, an insulating material such as polyimide resin is applied on the metal wiring, a through hole pattern is formed with a photoresist, and etching is performed to form a through hole. There is a method of opening a through hole or a method of exposing and developing using a photosensitive insulating material to open a through hole. In addition, Japanese Patent Laid-Open No. 5-198
As in Japanese Patent No. 687, a through hole-shaped pattern is formed with photoresist by overexposure at a site where a through hole is opened, covered with a polyimide resin, and etched by oxygen plasma or the like until the resist pattern is exposed. After that, there is a method of opening the through hole by removing the exposed resist.

【0003】[0003]

【発明が解決しようとする課題】基板上に絶縁材料を塗
布し、フォトレジストでパターンを形成し、エッチング
する場合、絶縁材料のベーク条件やエッチング条件によ
り、スルーホールのテーパ角が変化し、場合によっては
テーパ角が逆方向に開口するなど、テーパ角の制御は困
難である。スルーホールの上面と側面との角度が小さく
なるにつれて、絶縁膜の上面に金属配線を形成したとき
の、段差被覆性は悪くなり、断線を起こす可能性が高く
なる。また、絶縁膜と下地金属配線との密着性が悪くな
り、剥がれを起こす可能性がある。さらに、フォトレジ
ストでスルーホール形状のパターンを形成する場合に、
オーバー露光でパターンを形成した場合には、下地金属
膜との接触面積が小さく密着性が低下するため、径の小
さなスルーホールや厚い絶縁膜にスルーホールを開ける
場合には剥がれを起こす可能性がある。本発明の目的
は、絶縁膜にスルーホールを形成する際に生じる、テー
パ角のばらつきなどで逆テーパが発生しても、逆テーパ
を順テーパにし、テーパ角のばらつきが少ないスルーホ
ールを形成する方法による、多層配線形成方法を提供す
ることを目的とする。
When an insulating material is applied on a substrate, a pattern is formed with a photoresist, and etching is performed, the taper angle of the through hole may change depending on the baking condition and the etching condition of the insulating material. In some cases, it is difficult to control the taper angle such that the taper angle opens in the opposite direction. As the angle between the upper surface and the side surface of the through hole becomes smaller, the step coverage when the metal wiring is formed on the upper surface of the insulating film deteriorates, and the possibility of disconnection increases. Further, the adhesion between the insulating film and the underlying metal wiring may be deteriorated and peeling may occur. Furthermore, when forming a through-hole pattern with photoresist,
When a pattern is formed by overexposure, the contact area with the underlying metal film is small and the adhesion is poor.Therefore, peeling may occur when forming a through hole with a small diameter or a thick insulating film. is there. An object of the present invention is to form a through hole having a small taper angle variation by making the reverse taper a forward taper even if an inverse taper occurs due to a variation in taper angle or the like that occurs when forming a through hole in an insulating film. An object of the present invention is to provide a method for forming a multilayer wiring by the method.

【0004】[0004]

【課題を解決するための手段】上記の目的を達成するた
めに、基板上または、基板上に形成した下地金属配線上
に絶縁材料を塗布しスルーホールを形成する従来の方法
に加えて、さらに絶縁材料を塗布し塗布した膜厚分のエ
ッチングを行う。これにより、テーパ角が逆テーパの部
分は1回目に開口したスルーホールの側面と下地と角度
が小さいほど2回目に塗布した絶縁材料が残り易くな
り、順テーパとなる。また、順テーパの部分にはスルー
ホールの側面と、下地との角度が大きくなるほど2回目
に塗布した絶縁材料は残りにくくなるので、テーパ角の
ばらつきが少ない順テーパのスルーホールが形成され
る。
In order to achieve the above object, in addition to a conventional method of forming an through hole by applying an insulating material on a substrate or a base metal wiring formed on the substrate, An insulating material is applied and etching is performed by the applied film thickness. As a result, in the portion where the taper angle is reverse taper, the smaller the angle between the side surface of the through hole opened at the first time and the base, the more easily the insulating material applied at the second time remains and the forward taper occurs. In addition, since the insulating material applied the second time is less likely to remain in the forward taper portion as the angle between the side surface of the through hole and the base becomes larger, the forward taper through hole with less variation in taper angle is formed.

【0005】[0005]

【作用】上記の手段により、開口したスルーホールに再
び絶縁材料を塗布し、塗布した絶縁材料の膜厚分だけエ
ッチングすると、1回目に開口したスルーホールのテー
パ角の大きさによりエッチング速度が変わり、テーパ角
が小さい逆テーパのものほど2回目に塗布した絶縁材料
が残り易いので、テーパ角のばらつきが少ない順テーパ
のスルーホールが形成でき、安定なスルーホールの形成
が可能となる。
By the above means, when the insulating material is applied again to the opened through hole and etching is performed by the film thickness of the applied insulating material, the etching rate changes depending on the taper angle of the first opened through hole. As the taper angle has a smaller inverse taper, the insulating material applied the second time is more likely to remain, so that a forward taper through hole with less variation in taper angle can be formed and a stable through hole can be formed.

【0006】[0006]

【実施例】以下に本発明の一実施例について、図面を参
照しながら説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

【0007】図1(a)〜(c)は本発明の一実施例に
おける多層配線基板の工程断面図である。図1におい
て、1は基板、2は金属配線、3は1回目の絶縁材料、
4は順テーパスルーホール、5は逆テーパスルーホー
ル、6は2回目の絶縁材料である。
FIGS. 1A to 1C are process sectional views of a multilayer wiring board according to an embodiment of the present invention. In FIG. 1, 1 is a substrate, 2 is metal wiring, 3 is a first insulating material,
Reference numeral 4 is a forward tapered through hole, 5 is a reverse tapered through hole, and 6 is a second insulating material.

【0008】まず、図1のように基板1の上に金属配線
2を形成し、その上に1回目の絶縁材料3を塗布形成
し、フォトレジストの塗布、露光、現像、エッチングを
して順テーパスルーホール4又は逆テーパスルーホール
5を開口する。その後、図1(b)のようにこの上に再
び2回目の絶縁材料6をやや薄めに塗布する。そしてこ
の絶縁材料にはフォトレジスト処理を行わずに、エッチ
ングを行う。このエッチングにより、スルーホール底面
の下地を露出させる。これにより、図1(c)のよう
に、逆テーパスルーホール5と下地の金属配線2との鋭
角の隙間に、2回目の絶縁材料6にエッチング残りが発
生する。また、順テーパスルーホール4と下地の金属配
線2との間は鈍角なので2回目の絶縁材料6は残りにく
い、よって1回目の絶縁膜スルーホール形成で、基板内
でばらついたテーパ角に形成されたスルーホールや、バ
ッチ毎でばらついたテーパ角に形成されたスルーホール
も一括して安定した角度に形成できる。
First, as shown in FIG. 1, a metal wiring 2 is formed on a substrate 1, an insulating material 3 is applied and formed on the metal wiring 2 for the first time, and a photoresist is applied, exposed, developed, and etched. The tapered through hole 4 or the reverse tapered through hole 5 is opened. After that, as shown in FIG. 1B, the insulating material 6 for the second time is applied again slightly thinly thereon. Then, the insulating material is etched without photoresist processing. By this etching, the base on the bottom surface of the through hole is exposed. As a result, as shown in FIG. 1C, etching residue is generated in the insulating material 6 for the second time in the gap between the reverse tapered through hole 5 and the underlying metal wiring 2 at an acute angle. Further, since the forward taper through hole 4 and the underlying metal wiring 2 have an obtuse angle, the second insulating material 6 is unlikely to remain. Therefore, in the first insulating film through hole formation, the taper angle is varied in the substrate. Also, through-holes and through-holes having tapered angles that vary from batch to batch can be collectively formed at a stable angle.

【0009】また、他の実施例では、絶縁膜に順テーパ
スルーホール4や逆テーパスルーホール5を形成し、塗
布する2回目の絶縁材料6にネガ型感光性有機絶縁膜を
使用し、感光を行わずに現像を行う。この現像により、
スルーホール底面の下地を露出させる。逆テーパスルー
ホール5と下地の金属配線2との隙間の鋭角部分に現像
残りが発生する。順テーパスルーホール4と下地の金属
配線2との間には現像残りが発生しにくい。
In another embodiment, the forward tapered through hole 4 and the reverse tapered through hole 5 are formed in the insulating film, and the negative type photosensitive organic insulating film is used as the second insulating material 6 to be applied. Development is performed without performing. By this development,
The base of the bottom of the through hole is exposed. Residual development occurs at the acute angle portion of the gap between the reverse taper through hole 5 and the underlying metal wiring 2. Residual development hardly occurs between the forward tapered through hole 4 and the underlying metal wiring 2.

【0010】[0010]

【発明の効果】従来、多層配線形成において、層間絶縁
膜にスルーホールを形成する場合、絶縁剤を塗布形成し
た後、フォトレジスト塗布、露光及び現像によるパター
ニング、絶縁膜のエッチング、レジスト剥離などの工程
を経て行っていた。しかし、露光や現像、エッチングな
どの条件により、スルーホールのテーパ角のばらつきを
制御することが困難であり、逆テーパスルーホールなど
が発生すると、絶縁膜上面とスルーホールの側面との角
度が鋭角となり、この上に形成する金属配線との段差被
覆性が悪くなり、鋭角部からクラックなどが発生し、断
線を起こす可能性を有していた。本発明では、前記工程
に加え、絶縁剤を塗布形成しエッチングすることによ
り、順テーパスルーホールを安定的に形成でき、加工精
度も上がる。
In the past, when forming a through hole in an interlayer insulating film in the formation of a multilayer wiring, after applying an insulating agent, patterning by photoresist coating, exposure and development, etching of an insulating film, resist stripping, etc. It went through the process. However, it is difficult to control the variation of the taper angle of the through hole depending on the conditions such as exposure, development, and etching. When an inverse tapered through hole occurs, the angle between the upper surface of the insulating film and the side surface of the through hole becomes an acute angle. Therefore, the step coverage with the metal wiring formed on this becomes poor, and there is a possibility that cracks and the like will occur from the acute-angled portions, causing disconnection. In the present invention, in addition to the steps described above, a forward tapered through hole can be stably formed by applying and forming an insulating agent and etching, and the processing accuracy is improved.

【図面の簡単な説明】[Brief description of drawings]

【図1】多層配線基板の工程断面図。FIG. 1 is a process sectional view of a multilayer wiring board.

【符号の説明】[Explanation of symbols]

1…基板、 2…金属配線、 3…1回目の絶
縁材料、4…順テーパスルーホール、 5…逆テー
パスルーホール、6…2回目の絶縁材料。
1 ... Substrate, 2 ... Metal wiring, 3 ... First insulating material, 4 ... Forward tapered through hole, 5 ... Reverse tapered through hole, 6 ... Second insulating material.

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】基板上に塗布された絶縁材料にスルーホー
ル形成した後に、絶縁材料を再び塗布しエッチングする
ことにより、スルーホールを順テーパに形成することを
特徴とした絶縁膜を有する多層配線基板の製造方法。
1. A multi-layer wiring having an insulating film, characterized in that a through hole is formed in a forward taper by forming a through hole in an insulating material applied on a substrate and then applying the insulating material again and etching. Substrate manufacturing method.
【請求項2】請求項1に記載の多層配線基板の製造方法
によって、絶縁材料に形成したスルーホール側面のテー
パ角度のばらつきを修正し、安定したテーパ角のスルー
ホールを形成することを特徴とした絶縁膜を有する多層
配線基板の製造方法。
2. The method for manufacturing a multilayer wiring board according to claim 1, wherein variations in the taper angle on the side surface of the through hole formed in the insulating material are corrected to form a through hole having a stable taper angle. Of manufacturing a multi-layer wiring board having the above insulating film.
【請求項3】請求項1において、再び塗布する絶縁材料
としてネガ型感光性ポリイミド系樹脂を用いて、塗布と
現像を行い、スルーホール側面のテーパ角のばらつきを
修正し、安定したテーパ角のスルーホールを形成するこ
とを特徴とした絶縁膜を有する多層配線基板の製造方
法。
3. The method according to claim 1, wherein a negative photosensitive polyimide resin is used as an insulating material to be applied again, application and development are performed to correct variations in taper angle on the side surface of the through hole, and to stabilize the taper angle. A method for manufacturing a multilayer wiring board having an insulating film, which is characterized by forming through holes.
JP6232788A 1994-09-28 1994-09-28 Method for manufacturing multilayer wiring board Pending JPH0897327A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6232788A JPH0897327A (en) 1994-09-28 1994-09-28 Method for manufacturing multilayer wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6232788A JPH0897327A (en) 1994-09-28 1994-09-28 Method for manufacturing multilayer wiring board

Publications (1)

Publication Number Publication Date
JPH0897327A true JPH0897327A (en) 1996-04-12

Family

ID=16944763

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6232788A Pending JPH0897327A (en) 1994-09-28 1994-09-28 Method for manufacturing multilayer wiring board

Country Status (1)

Country Link
JP (1) JPH0897327A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1032226A (en) * 1996-07-15 1998-02-03 Saitama Nippon Denki Kk Connection structure of electric parts and connection method

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1032226A (en) * 1996-07-15 1998-02-03 Saitama Nippon Denki Kk Connection structure of electric parts and connection method

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