JPH09148509A - Lead frame for semiconductor device and surface treatment method thereof - Google Patents
Lead frame for semiconductor device and surface treatment method thereofInfo
- Publication number
- JPH09148509A JPH09148509A JP7328006A JP32800695A JPH09148509A JP H09148509 A JPH09148509 A JP H09148509A JP 7328006 A JP7328006 A JP 7328006A JP 32800695 A JP32800695 A JP 32800695A JP H09148509 A JPH09148509 A JP H09148509A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- oxide film
- black oxide
- semiconductor device
- sealing resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
(57)【要約】
【課題】 リードフレームに、アルカリ金属残渣ほとん
どなく半導体装置の信頼性悪影響を及ぼさない黒色酸化
膜を形成し、封止樹脂との密着性を強化する。
【解決手段】 銅系の金属製リードフレーム１の封止樹
脂８との接合面に、アルカリ金属残渣が１ng/cm2以下で
ある黒色酸化膜９を形成する。黒色酸化膜９の形成に当
り、有機アルカリの１０〜１５％溶液中で、リードフレ
ーム１を陽極酸化させる表面処理方法を採用する。黒色
酸化膜９は微細な羽毛状を成すため、封止樹脂９が膜内
に進入して密着性が強固になる。有機アルカリは金属を
含まないので、洗浄後に黒色酸化膜９の上に金属が残留
することがない。
(57) [PROBLEMS] To form a black oxide film on a lead frame, which has almost no alkali metal residue and does not adversely affect the reliability of a semiconductor device, and enhances adhesion with a sealing resin. A black oxide film 9 having an alkali metal residue of 1 ng / cm 2 or less is formed on a bonding surface of a copper-based metal lead frame 1 with a sealing resin 8. In forming the black oxide film 9, a surface treatment method is adopted in which the lead frame 1 is anodized in a 10 to 15% organic alkali solution. Since the black oxide film 9 has a fine feather-like shape, the sealing resin 9 enters the film to strengthen the adhesion. Since the organic alkali does not contain a metal, no metal remains on the black oxide film 9 after cleaning.
Description
【０００１】[0001]
【発明の属する技術分野】樹脂封止型半導体装置用のリ
ードフレームとその表面処理方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame for a resin-sealed semiconductor device and a surface treatment method thereof.
【０００２】[0002]
【従来の技術】樹脂封止型半導体装置においては、封止
樹脂とリードフレームとの接合部に吸湿しやすく、リフ
ロー半田付け時に、内部の水分が気化膨張してパッケー
ジにクラックが生じる等の不都合が発生することがあ
る。このため、封止樹脂とリードフレームとの密着性を
向上させるための技術開発が待望されている。本出願人
は、半導体装置における銅系放熱板と封止樹脂との密着
性を向上させるため、放熱板の表面に黒色酸化膜を形成
することを提案した（特開平７−６６３２８号公報参
照）。リードフレームの表面に、同様の黒色酸化膜を形
成することにより、封止樹脂との密着性を向上させるこ
とができることがわかっている。黒色酸化膜の形成法と
して、一般に用いられる苛性アルカリ溶液中での陽極酸
化法を採用すると、入念に洗浄した後においても、黒色
酸化膜上にアルカリ金属残渣が存在し、これが半導体装
置の信頼性を損なう。これは、酸化被膜が微細な羽毛状
を呈し、被膜界面の洗浄性がきわめて悪いことに起因す
る。2. Description of the Related Art In a resin-encapsulated semiconductor device, moisture is easily absorbed by the joint between the encapsulating resin and the lead frame, and moisture inside is vaporized and expanded during reflow soldering, causing cracks in the package. May occur. For this reason, there is a long-awaited need for technical development for improving the adhesion between the sealing resin and the lead frame. The present applicant has proposed to form a black oxide film on the surface of the heat dissipation plate in order to improve the adhesion between the copper-based heat dissipation plate and the sealing resin in the semiconductor device (see Japanese Patent Laid-Open No. 7-66328). . It is known that the adhesion with the sealing resin can be improved by forming a similar black oxide film on the surface of the lead frame. When the anodic oxidation method in a commonly used caustic solution is adopted as a method for forming a black oxide film, even after careful cleaning, alkali metal residues remain on the black oxide film, and this is the reliability of the semiconductor device. Impair. This is due to the fact that the oxide film has a fine feather shape and the interface of the film has extremely poor cleaning properties.
【０００３】[0003]
【発明が解決しようとする課題】従って、本発明は、ア
ルカリ金属残渣が半導体装置の信頼性悪影響を及ぼすこ
とがない程度に微量な黒色酸化膜を有し、封止樹脂との
密着性が強固なリードフレームと、その表面処理方法を
提供することを目的としている。Therefore, the present invention has a small amount of black oxide film to the extent that an alkali metal residue does not adversely affect the reliability of the semiconductor device, and has strong adhesion to the sealing resin. The object of the present invention is to provide a lead frame and a surface treatment method thereof.
【０００４】[0004]
【課題を解決するための手段】本発明においては、上記
課題を解決するため、銅系の金属製リードフレームの封
止樹脂との接合面に、アルカリ金属残渣が１ng/cm2以下
である黒色酸化膜を形成した。また、黒色酸化膜の形成
に当り、有機アルカリの１０〜１５％溶液中で、銅系の
金属製リードフレームの封止樹脂との接合面を陽極酸化
させる表面処理方法を採用した。黒色酸化膜は羽毛状を
成すため、封止樹脂が膜内に進入して密着性が強固にな
る。有機アルカリは金属を含まないので、洗浄後に黒色
酸化膜の上に金属が残留することがない。According to the present invention, in order to solve the above-mentioned problems, a black metal having an alkali metal residue of 1 ng / cm 2 or less on the bonding surface of a copper-based metal lead frame with a sealing resin. An oxide film was formed. Further, in forming the black oxide film, a surface treatment method was adopted in which the bonding surface of the copper-based metal lead frame with the sealing resin was anodized in a 10 to 15% organic alkali solution. Since the black oxide film has a feather-like shape, the sealing resin penetrates into the film to strengthen the adhesion. Since the organic alkali does not contain a metal, no metal remains on the black oxide film after cleaning.
【０００５】[0005]
【発明の実施の形態】図面を参照して本発明の実施の形
態を説明する。図１はリードフレームの平面図、図２は
図１におけるII−II線による概略的断面図である。Embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a plan view of a lead frame, and FIG. 2 is a schematic sectional view taken along line II-II in FIG.
【０００６】図において、リードフレーム１は、銅又は
銅合金から成る薄板素材を、例えばプレス成型により打
ち抜いて所定のリードパターンを形成したものである。
リードフレーム１は、チップ搭載部２、内部リード部
３、外部リード部４及びワイヤボンディング部５を備え
ている。チップ搭載部２及びワイヤボンディング部５の
上面には、銀メッキ層２ａ，５ａが形成されている。チ
ップ搭載部２の上には、回路チップ６が、半田付け又は
エポキシ系接着剤等により固定して搭載され、回路チッ
プ６上の端子と内部リード部３の先端のワイヤボンディ
ング部５との間がワイヤ７で接続される。そして、チッ
プ搭載部２、内部リード部３が、回路チップ６及びワイ
ヤ７と共に封止樹脂８で封止される。In the figure, a lead frame 1 is formed by punching a thin plate material made of copper or copper alloy by, for example, press molding to form a predetermined lead pattern.
The lead frame 1 includes a chip mounting portion 2, an internal lead portion 3, an external lead portion 4 and a wire bonding portion 5. Silver plating layers 2 a and 5 a are formed on the upper surfaces of the chip mounting portion 2 and the wire bonding portion 5. A circuit chip 6 is mounted on the chip mounting portion 2 by being fixed by soldering or an epoxy-based adhesive, and is mounted between the terminal on the circuit chip 6 and the wire bonding portion 5 at the tip of the internal lead portion 3. Are connected by wire 7. Then, the chip mounting portion 2 and the inner lead portion 3 are sealed with the sealing resin 8 together with the circuit chip 6 and the wires 7.
【０００７】リードフレーム１の銀メッキ層２ａ，５ａ
が形成されていない部位の表面には、黒色酸化膜９（Ｃ
ｕＯ）が形成されている。黒色酸化膜９は、リードフレ
ーム１を有機アルカリの溶液中で陽極酸化させることに
より形成される。しかして、黒色酸化膜６の金属残渣
は、１ng/cm2以下になるよう調整されている。黒色酸化
膜９は羽毛状を成すため、モールディングの際に、溶融
した封止樹脂８が膜内に進入して強固に喰い付く。Silver plating layers 2a and 5a of the lead frame 1
Black oxide film 9 (C
uO) is formed. The black oxide film 9 is formed by anodizing the lead frame 1 in an organic alkali solution. Therefore, the metal residue of the black oxide film 6 is adjusted to 1 ng / cm 2 or less. Since the black oxide film 9 forms a feather shape, the molten sealing resin 8 enters into the film and bites firmly during molding.
【０００８】図３に示すリードフレーム１は、銀メッキ
層２ａ，５ａ以外の部位であって、封止樹脂８により封
止される部分（チップ搭載部２及び内部リード部３の部
分）のみに黒色酸化膜９が形成されている。このよう
な、局部的な黒色酸化膜９の形成は、例えば公知のマス
キング法により実施することができる。この場合、黒色
酸化膜９の領域が、封止樹脂８により封止される部分に
限定されるので、モールディングによる樹脂バリが発生
しても、黒色酸化膜９の領域外であるので、これを容易
に除去することができる。The lead frame 1 shown in FIG. 3 is a portion other than the silver-plated layers 2a and 5a, and is provided only in the portion sealed by the sealing resin 8 (the chip mounting portion 2 and the internal lead portion 3). A black oxide film 9 is formed. Such local formation of the black oxide film 9 can be carried out, for example, by a known masking method. In this case, since the area of the black oxide film 9 is limited to the portion sealed by the sealing resin 8, even if the resin burr due to the molding is generated, it is outside the area of the black oxide film 9. It can be easily removed.
【０００９】図４に示すリードフレーム１は、チップ搭
載部２上に銀メッキ層２ａが形成されておらず、その表
面には黒色酸化膜９が形成されている。回路チップ６
は、エポキシ系接着剤にてチップ搭載部２の黒色酸化膜
９上に接着される。In the lead frame 1 shown in FIG. 4, the silver plating layer 2a is not formed on the chip mounting portion 2 and the black oxide film 9 is formed on the surface thereof. Circuit chip 6
Are bonded onto the black oxide film 9 of the chip mounting portion 2 with an epoxy adhesive.
【００１０】図５に示すチップ搭載部を有しないリード
フレーム１においては、内部リード部３の部分のみに黒
色酸化膜９が形成される。In the lead frame 1 having no chip mounting portion shown in FIG. 5, the black oxide film 9 is formed only on the internal lead portion 3.
【００１１】図６には、有機アルカリ溶液による陽極酸
化方法の概略を示す。容器１１中には、有機アルカリ溶
液１２が満たされ、ヒータ１３により所定の温度に加熱
されている。有機アルカリ溶液１２中には、電極板１４
と、予め所要部位に銀メッキ及びマスクを施したリード
フレーム１が設置され、両者間に所定の直流電圧が印加
される。リードフレーム１側を陽極、電極板１４側を陰
極とする。リードフレーム１には、銀メッキ部２ａ，５
ａ及びマスク部以外の部分に黒色酸化膜９が形成され
る。印加電圧と、処理時間を調整することによって、黒
色酸化膜９の厚さを調整する。黒色酸化膜９は、リード
フレーム１の表面に積層するのではなく、内部に生成さ
れるため、剥離することがない。FIG. 6 shows an outline of an anodic oxidation method using an organic alkaline solution. The container 11 is filled with the organic alkaline solution 12 and heated to a predetermined temperature by the heater 13. In the organic alkaline solution 12, the electrode plate 14
Then, the lead frame 1 having silver plating and a mask applied in advance is provided at a required portion, and a predetermined DC voltage is applied between the two. The lead frame 1 side is the anode and the electrode plate 14 side is the cathode. The lead frame 1 has silver-plated parts 2a, 5
The black oxide film 9 is formed on a portion other than a and the mask portion. The thickness of the black oxide film 9 is adjusted by adjusting the applied voltage and the processing time. The black oxide film 9 is not laminated on the surface of the lead frame 1 but is formed inside thereof, and therefore is not peeled off.
【００１２】有機アルカリとしては、例えば〔（ＣＨ3)
3Ｎ（ＣＨ2ＣＨ2ＯＨ）〕+ＯＨ-あるいは〔（ＣＨ3)
4Ｎ〕+ＯＨ-を用いることができる。溶液１２の濃度
は、１０％〜１５％程度が適当である。濃度が１０％よ
り低いとリードフレーム１上にＣｕ2Ｏの赤色酸化膜が
生成される。この赤色酸化膜によってはリードフレーム
１と封止樹脂との強固な結合が得られない。また、濃度
が１５％より高いと銀メッキ部分が浸蝕される。有機ア
ルカリは、金属を含有しないから、通常の洗滌の後に黒
色酸化膜９上に金属が残留することがない。従って、残
留金属が半導体装置の信頼性に影響を及ぼすおそれがな
い。Examples of the organic alkali include [(CH 3 ).
3 N (CH 2 CH 2 OH)] + OH - or [(CH 3 )
4 N] + OH − can be used. A suitable concentration of the solution 12 is about 10% to 15%. If the concentration is lower than 10%, a red oxide film of Cu 2 O is formed on the lead frame 1. With this red oxide film, a strong bond between the lead frame 1 and the sealing resin cannot be obtained. On the other hand, if the concentration is higher than 15%, the silver-plated portion is eroded. Since the organic alkali does not contain a metal, the metal does not remain on the black oxide film 9 after the usual washing. Therefore, the residual metal does not affect the reliability of the semiconductor device.
【００１３】[0013]
【発明の効果】以上のように、本発明においては、銅系
の金属製リードフレーム１の封止樹脂８との接合面に、
アルカリ金属残渣が１ng/cm2以下である黒色酸化膜９を
形成したので、リードフレーム１と封止樹脂８との結合
が強固であり、両者間への吸湿が阻止され、従って、リ
フロー半田付け時のパッケージのクラックの発生を防止
することができる。また、黒色酸化膜９上にアルカリ金
属残渣がほとんどないので、半導体装置の信頼性を損な
うおそれもない。さらに、黒色酸化膜９の形成に当り、
有機アルカリの１０〜１５％溶液中で、リードフレーム
１の封止樹脂８との接合面を陽極酸化させる表面処理方
法を採用したため、アルカリ金属残渣がほとんどない黒
色酸化膜９を容易に形成することができるという効果を
有する。As described above, in the present invention, the bonding surface of the copper-based metal lead frame 1 with the sealing resin 8 is
Since the black oxide film 9 having an alkali metal residue of 1 ng / cm 2 or less is formed, the bond between the lead frame 1 and the sealing resin 8 is strong and moisture absorption between them is prevented, and therefore reflow soldering is performed. It is possible to prevent the occurrence of cracks in the package. Further, since almost no alkali metal residue is left on the black oxide film 9, there is no fear of degrading the reliability of the semiconductor device. Furthermore, in forming the black oxide film 9,
Since the surface treatment method of anodizing the bonding surface of the lead frame 1 with the sealing resin 8 in a 10 to 15% solution of organic alkali is adopted, the black oxide film 9 having almost no alkali metal residue can be easily formed. It has the effect that
【図１】リードフレームの平面図である。FIG. 1 is a plan view of a lead frame.
【図２】図１におけるII−II線による概略的断面図であ
る。FIG. 2 is a schematic sectional view taken along line II-II in FIG.
【図３】他の実施形態のリードフレームの概略的断面図
である。FIG. 3 is a schematic sectional view of a lead frame according to another embodiment.
【図４】他の実施形態のリードフレームの概略的断面図
である。FIG. 4 is a schematic sectional view of a lead frame according to another embodiment.
【図５】他の実施形態のリードフレームの概略的断面図
である。FIG. 5 is a schematic cross-sectional view of a lead frame according to another embodiment.
【図６】有機アルカリ溶液による陽極酸化方法の概略を
示す説明図である。FIG. 6 is an explanatory diagram showing an outline of an anodic oxidation method using an organic alkaline solution.
１ リードフレーム ２ チップ搭載部 ２ａ 銀メッキ層 ３ 内部リード部 ４ 外部リード部 ５ ワイヤボンディング部 ５ａ 銀メッキ層 ６ 回路チップ ７ ワイヤ ８ 封止樹脂 ９ 黒色酸化膜 1 lead frame 2 chip mounting part 2a silver plated layer 3 internal lead part 4 external lead part 5 wire bonding part 5a silver plated layer 6 circuit chip 7 wire 8 sealing resin 9 black oxide film
Claims (6)
少なくとも封止樹脂との接合面に、アルカリ金属残渣が
１ng/cm2以下である黒色酸化膜（ＣｕＯ）が形成されて
いることを特徴とする半導体装置用リードフレーム。1. A copper-based metal lead frame, comprising:
A lead frame for a semiconductor device, wherein a black oxide film (CuO) having an alkali metal residue of 1 ng / cm 2 or less is formed on at least a bonding surface with a sealing resin.
フレームであって、封止樹脂との接合面を含む非銀メッ
キ面に、アルカリ金属残渣が１ng/cm2以下である黒色酸
化膜が形成されていることを特徴とする半導体装置用リ
ードフレーム。2. A partially silver-plated copper-based metal lead frame in which a non-silver-plated surface including a joint surface with a sealing resin has an alkali metal residue of 1 ng / cm 2 or less. A lead frame for a semiconductor device, wherein the lead frame is formed.
リードフレームの少なくとも封止樹脂との接合面を陽極
酸化させ、黒色酸化膜を形成することを特徴とする半導
体装置用リードフレームの表面処理方法。3. A lead frame for a semiconductor device, characterized in that a black oxide film is formed by anodizing at least a bonding surface of a copper-based metal lead frame with an encapsulating resin in an organic alkali solution. Surface treatment method.
〜１５％であることを特徴とする請求項３に記載の半導
体装置用リードフレームの表面処理方法。4. The concentration of organic alkali in the solution is 10
The surface treatment method for a lead frame for a semiconductor device according to claim 3, wherein the surface treatment method is about 15%.
（ＣＨ2ＣＨ2ＯＨ）〕+ＯＨ-を用いることを特徴とする
請求項３又は４に記載の半導体装置用リードフレームの
表面処理方法。5. ([CH 3 ) 3 N as the organic alkali
(CH 2 CH 2 OH)] + OH - surface treatment method of a lead frame for a semiconductor device according to claim 3 or 4, characterized in that use.
ＯＨ-を用いることを特徴とする請求項３又は４に記載
の半導体装置用リードフレームの表面処理方法。6. An organic alkali as [(CH 3 ) 4 N] +
The surface treatment method for a lead frame for a semiconductor device according to claim 3, wherein OH − is used.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7328006A JPH09148509A (en) | 1995-11-22 | 1995-11-22 | Lead frame for semiconductor device and surface treatment method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7328006A JPH09148509A (en) | 1995-11-22 | 1995-11-22 | Lead frame for semiconductor device and surface treatment method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH09148509A true JPH09148509A (en) | 1997-06-06 |
Family
ID=18205464
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7328006A Pending JPH09148509A (en) | 1995-11-22 | 1995-11-22 | Lead frame for semiconductor device and surface treatment method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH09148509A (en) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1999043032A3 (en) * | 1998-02-20 | 1999-11-25 | Siemens Ag | sEMICONDUCTOR COMPONENT WITH A STRUCTURED LEADFRAME AND METHOD FOR PRODUCING THE SAME |
| US6376905B2 (en) * | 2000-01-28 | 2002-04-23 | Hitachi, Ltd. | Semiconductor package |
| DE10124047A1 (en) * | 2001-05-16 | 2002-11-21 | Infineon Technologies Ag | Electronic component comprises a semiconductor chip arranged a system support with inner flat conductor sections having a metal alloy plating on the contact connecting surfaces |
| EP1469514A3 (en) * | 2003-04-16 | 2005-07-13 | Shinko Electric Industries Co., Ltd. | Conductor substrate, semiconductor device and production method thereof |
| US7190057B2 (en) | 2003-05-22 | 2007-03-13 | Shinko Electric Industries Co., Ltd. | Packaging component and semiconductor package |
| JP2008045119A (en) * | 2006-07-18 | 2008-02-28 | Sanyo Chem Ind Ltd | Chemical agent for electronic material manufacturing process |
| US8106493B2 (en) | 2008-04-04 | 2012-01-31 | Gem Services, Inc. | Semiconductor device package having features formed by stamping |
| DE112006001048B4 (en) * | 2005-04-26 | 2012-08-30 | Dai Nippon Printing Co., Ltd. | Manufacturing process for circuit parts |
| IT201900009585A1 (en) * | 2019-06-20 | 2020-12-20 | St Microelectronics Srl | PROCEDURE FOR MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE |
| TWI796386B (en) * | 2017-11-21 | 2023-03-21 | 日商新光電氣工業股份有限公司 | Lead frame, semiconductor device, and method for manufacturing lead frame |
-
1995
- 1995-11-22 JP JP7328006A patent/JPH09148509A/en active Pending
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1999043032A3 (en) * | 1998-02-20 | 1999-11-25 | Siemens Ag | sEMICONDUCTOR COMPONENT WITH A STRUCTURED LEADFRAME AND METHOD FOR PRODUCING THE SAME |
| US6376905B2 (en) * | 2000-01-28 | 2002-04-23 | Hitachi, Ltd. | Semiconductor package |
| DE10124047B4 (en) * | 2001-05-16 | 2006-12-14 | Infineon Technologies Ag | Method for producing electronic components with semiconductor chips and system carriers |
| DE10124047A1 (en) * | 2001-05-16 | 2002-11-21 | Infineon Technologies Ag | Electronic component comprises a semiconductor chip arranged a system support with inner flat conductor sections having a metal alloy plating on the contact connecting surfaces |
| US7524702B2 (en) | 2003-04-16 | 2009-04-28 | Shinko Electric Industries Co., Ltd. | Conductor substrate, semiconductor device and production method thereof |
| US7301226B2 (en) | 2003-04-16 | 2007-11-27 | Shinko Electric Industries Co., Ltd. | Conductor substrate, semiconductor device and production method thereof |
| EP1469514A3 (en) * | 2003-04-16 | 2005-07-13 | Shinko Electric Industries Co., Ltd. | Conductor substrate, semiconductor device and production method thereof |
| EP1833089A3 (en) * | 2003-04-16 | 2010-04-14 | Shinko Electric Industries Co., Ltd. | Method of producing a conductor substrate for mounting a semiconductor element |
| US7190057B2 (en) | 2003-05-22 | 2007-03-13 | Shinko Electric Industries Co., Ltd. | Packaging component and semiconductor package |
| DE112006001048B4 (en) * | 2005-04-26 | 2012-08-30 | Dai Nippon Printing Co., Ltd. | Manufacturing process for circuit parts |
| US8739401B2 (en) | 2005-04-26 | 2014-06-03 | Dai Nippon Printing Co., Ltd. | Circuit member, manufacturing method for circuit members, semiconductor device, and surface lamination structure for circuit member |
| US8742554B2 (en) | 2005-04-26 | 2014-06-03 | Dai Nippon Printing Co., Ltd. | Circuit member, manufacturing method for circuit members, semiconductor device, and surface lamination structure for circuit member |
| JP2008045119A (en) * | 2006-07-18 | 2008-02-28 | Sanyo Chem Ind Ltd | Chemical agent for electronic material manufacturing process |
| US8106493B2 (en) | 2008-04-04 | 2012-01-31 | Gem Services, Inc. | Semiconductor device package having features formed by stamping |
| TWI796386B (en) * | 2017-11-21 | 2023-03-21 | 日商新光電氣工業股份有限公司 | Lead frame, semiconductor device, and method for manufacturing lead frame |
| IT201900009585A1 (en) * | 2019-06-20 | 2020-12-20 | St Microelectronics Srl | PROCEDURE FOR MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE |
| US11437309B2 (en) | 2019-06-20 | 2022-09-06 | Stmicroelectronics S.R.L. | Method of manufacturing semiconductor devices and corresponding semiconductor device |
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