JPH0917870A - Electrical Characteristics of Semiconductor Devices with Redundant Fuse Overcoat Removal Method for Breakdown - Google Patents

Abstract

PURPOSE: To remove an overcoat of a semiconductor device surface layer for an analysis of an electric characteristic without giving a change to a redundancy fuse and losing data of redundancy. CONSTITUTION: In a method for removing an overcoat for an analysis of an electric characteristic of a semiconductor device having a redundancy fuse 5, under conditions that a portion of the redundancy fuse 5 of the semiconductor device is coated with a protection film 23 having etching-resistance, and that the redundancy fuse 5 is coated with the protection film 23, an overcoat 19 of a semiconductor device surface layer is removed by etching.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of removing an overcoat on a surface layer of a semiconductor device for analyzing electrical characteristics of a semiconductor device having a redundant fuse.

[0002]

2. Description of the Related Art For example, in a semiconductor device for memory, a redundant memory is mounted in addition to a product memory, and the product memory and the redundant memory are connected to each other by a redundant fuse such as polysilicon. It is known that the redundant fuse is blown out and the redundant memory is replaced with the product memory. In addition, the surface of such a semiconductor device is formed of silicon oxide called a passivation film,
It is overcoated with silicon nitride or the like.

Conventionally, as a method of analyzing the electrical characteristics of such a semiconductor device, there is a method of observing a signal waveform using an electron beam (EB) tester or a simple memory tester. When observing a signal waveform using an electron beam tester, the presence of an overcoat is affected by the coupling of signals in the vicinity of the electron beam, making it difficult to observe the signal waveform accurately. In addition, when performing IFA analysis, a charge-up phenomenon occurs and it becomes difficult to acquire an image. In addition, when observing the signal waveform using a simple memory tester, a focused ion beam (FIB) is used to access the wiring, and a pinhole (fine window) is locally applied to the required portion of the overcoat. Since it is necessary to open the pinhole, it takes time to process the pinhole, and the failure analysis of the semiconductor device is inefficient. Therefore, conventionally,
A method has been proposed in which the entire overcoat called a passivation film on the surface layer of a semiconductor device is removed by etching to expose the wiring in the upper layer portion of the semiconductor device.

[0004]

However, when the entire overcoat of the surface layer of the semiconductor device is removed by etching, the redundant fuse of the semiconductor device is also etched, and as a result, a change occurs in the fail bit map, resulting in an appropriate electrical conductivity. There is a problem that the analysis of the characteristics is not performed. The present invention has been made in view of the above-mentioned problems, and does not change the redundant fuse and does not lose the redundant information, and therefore the overcoat of the surface layer of the semiconductor device is analyzed for electrical characteristics analysis. It is intended to provide a method of removal.

[0005]

In order to achieve the above-mentioned object, the present invention provides an overcoat removing method for analyzing electrical characteristics of a semiconductor device having a redundant fuse, wherein a redundant fuse portion of the semiconductor device is provided. Is covered with a protective film having etching resistance, and the overcoat of the surface layer of the semiconductor device except the redundant fuse portion covered with the protective screen is removed by etching. Further, according to the present invention, the protective film covering the redundant fuse portion is formed by applying a PIX solution to the redundant fuse portion and then thermally curing the PIX solution.
Further, according to the present invention, the protective film of the redundant fuse portion is formed during a process step of a semiconductor device.

[0006]

When the overcoat of the surface layer of the semiconductor device is etched in a state where the redundant fuse portion is covered with the protective film having the etching resistance, the redundant fuse portion is not etched and the redundant information remains and the upper layer portion of the semiconductor device is left. The wiring can be exposed. As a result, signal waveform observation using an EB tester, a simple memory tester, etc. can be performed accurately.

[0007]

Embodiments of the present invention will now be described in detail with reference to the accompanying drawings. FIG. 1 shows an embodiment of a semiconductor memory device to which an overcoat removing method according to the present invention is applied. A semiconductor memory device is a semiconductor substrate 1.
It has a plurality of memory cells 3 including redundant memory cells and a redundant fuse 5 on top. 2 is a cross-sectional view of the semiconductor memory device shown in FIG. This semiconductor memory device includes a semiconductor substrate 1, an element isolation layer 7, a first polysilicon wiring layer 9, a second polysilicon wiring layer 11, a surface aluminum wiring portion 13, a first interlayer film 15, and a second interlayer film 1.
7. A memory cell 3 is composed of the first polysilicon wiring layer 9, the second polysilicon wiring layer 11 and the aluminum wiring portion 13 and has a multilayer structure of the overcoat layer 19.

The redundant fuse 5 is formed on the element isolation layer 7 as a part of the wiring by the first polysilicon wiring layer 9.
This redundant fuse 5 is exposed to the surface layer portion by the fuse window 21 so that it can be burnt out by no irradiation of heat rays from the outside. When removing the overcoat 19 for analyzing the electrical characteristics of the semiconductor memory device, first, as a pretreatment, a PIX solution of polyimide resin is dropped into the fuse window 21 using a syringe or the like, and this is cured by heating. . As a result, the redundant fuse 5 is covered with the protective film 23 made of polyimide resin, as shown in FIG.

After the completion of this pretreatment, the entire overcoat layer 19 is removed by etching. As a result, the entire aluminum wiring portion 13 on the surface layer is exposed to the outside without the redundant fuse 5 being etched, and the FIB processing is required while the redundant bit information remains unchanged and the fail bit map is not changed. Therefore, signal waveform observation using a simple memory tester or the like can be efficiently performed.

When observing a signal waveform using an EB tester, since the overcoat layer 19 does not exist on the aluminum wiring portion 13, the influence of coupling with a nearby signal that is capacitively coupled via the overcoat layer. Accurate signal waveform can be easily observed without receiving
When the analysis is performed, the charge-up phenomenon does not occur, and the IFA analysis can be easily and accurately performed. The material of the protective film 23 of the redundant fuse 5 is not limited to the polyimide resin, but the overcoat layer 19 may be used.
Any material may be used as long as it has etching resistance to the above etching.

FIG. 3 shows another embodiment of a semiconductor memory device to which the overcoat removing method according to the present invention is applied. In this semiconductor memory device, the redundant fuse 5 is covered with the polysilicon thin film 25 during the device manufacturing process. The polysilicon thin film 25 acts as an etching stopper when removing the overcoat. As a result, even if the overcoat layer, here the interlayer film 27 is removed by etching, the redundant fuse 5 is not cut. Therefore, in this other embodiment, in addition to the same operation and effect as the above-mentioned embodiment,
The protective film can be formed during the manufacturing process of the semiconductor device.

The overcoat removing method according to the present invention is not limited to the semiconductor memory device as described above, but is similarly applied to other semiconductor devices having a redundant circuit and a redundant fuse.

[0013]

As can be understood from the above description, according to the overcoat removing method of the present invention, since the redundant fuse portion is covered with the protective film having etching resistance, the electrical characteristics of the semiconductor device are analyzed. In this case, even if the wiring portion is exposed by etching the overcoat of the surface layer of the semiconductor device, the redundant fuse portion is not etched, and the wiring portion of the semiconductor device can be exposed to the outside while leaving redundant information. it can. As a result, when observing a signal waveform using a simple memory tester or the like, it is possible to efficiently and accurately observe the signal waveform without FIB processing. Also, when observing the signal waveform using the EB tester, the signal waveform can be accurately and easily observed without being affected by the coupling of signals in the vicinity due to the absence of the overcoat. Moreover, since the charge-up peculiar to the EB tester can be reduced, the IFA analysis can be easily and accurately performed.

[Brief description of the drawings]

FIG. 1 is a plan view conceptually showing one embodiment of a semiconductor memory device to which an overcoat removing method according to the present invention is applied.

FIG. 2 is a cross-sectional view showing an example of a semiconductor memory device to which an overcoat removing method according to the present invention is applied.

FIG. 3 is a sectional view showing another embodiment of a semiconductor memory device to which the overcoat removing method according to the present invention is applied.

[Explanation of symbols]

 1 Semiconductor Substrate 3 Memory Cell 5 Redundant Fuse 7 Element Isolation Layer 9 First Polysilicon Wiring Layer 11 Second Polysilicon Wiring Layer 13 Aluminum Wiring Part 15 First Interlayer Film 17 Second Interlayer Film 19 Overcoat Layer 21 Fuse Window 23 Protective film 25 Polysilicon thin film 27 Interlayer film

Claims (3)

[Claims] 1. An overcoat removing method for analyzing electrical characteristics of a semiconductor device having a redundant fuse, wherein the redundant fuse portion of the semiconductor device is covered with a protective film having etching resistance, and is covered with the protective curtain. An overcoat removing method, characterized in that the overcoat on the surface layer of the semiconductor device excluding the redundant fuse portion is removed by etching. 2. The overcoat removing method according to claim 1, wherein the protective film covering the redundant fuse portion is formed by applying a PIX solution to the redundant fuse portion and then thermally curing the PIX solution. 3. The overcoat removing method according to claim 1, wherein the protective film of the redundant fuse portion is formed during a process step of a semiconductor device.