JPH09199517A - Semiconductor device - Google Patents

Abstract

(57) [Abstract] [PROBLEMS] In a semiconductor device in which a semiconductor chip is mounted on a mount portion of a lead frame via a mounting material and resin-sealed, a heat dissipation property is ensured while an intermittent operation test or a temperature cycle is performed. Relieves thermal stress. SOLUTION: A semiconductor chip 1 is orthogonal, radial, to a lead frame 2 melted and fixed by a mount material 3.
Grooves with a grid shape are provided. As a result, the mount material 3 can be thickened, and the thermal stress generated during the evaluation and test can be relaxed. Further, since the groove is partially provided, it is possible to improve reliability while ensuring heat dissipation. Further, since the groove is partially formed, regardless of the size of the semiconductor chip 1,
One type of lead frame 2 can be used.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a semiconductor device having improved withstand capability in intermittent operation tests and temperature cycle tests.

[0002]

2. Description of the Related Art In recent years, the semiconductor chip size relative to the mount island has been increasing year by year as the semiconductor device has a lower on-resistance and a smaller outer shape. Along with this, in the evaluation and testing of the semiconductor device, the stress that the semiconductor device receives is increasing. As a measure against these problems, there is one shown in the sectional view of FIG.

In this semiconductor device, the semiconductor chip 1 is provided on the lead frame 2 via the bonding material 3, and the high thermal conductive plate 4 is put in the bonding material 3. Some of the high thermal conductive plates 4 are provided with a groove, but the number of steps for inserting the plate 4 and the plate cost are added to these, so that the cost ratio of the semiconductor device is deteriorated.

As another measure, by thickening the mount material 3 by simulation or experiment,
Although it is possible to improve the intermittent operation test resistance and the temperature cycle resistance in the evaluation and test of the semiconductor device, the heat dissipation property deteriorates and the thermal resistance characteristics are not satisfied, so that there is a limit in making the mount material thick.

[0005]

In the conventional semiconductor device in which the high thermal conductive plate 4 is placed in the mount material (bonding material) 3, the number of steps for inserting the high thermal conductive plate 4 and the cost of the plate 4 are added. High thermal conductivity plate 4
Need to establish a method that does not use.

Further, in the semiconductor device in which the semiconductor chip 1 is mounted on the mount portion of the lead frame 1 via the mount material 3 and resin-sealed, in the semiconductor device in which the mount material 3 is thick, heat dissipation becomes poor. In some cases, the thermal resistance characteristics may not be satisfied.

An object of the present invention is to improve continuous operation test resistance and temperature cycle resistance in semiconductor device evaluation and testing without changing the manufacturing process of this type of semiconductor device and while maintaining heat dissipation. It is to provide a semiconductor device capable of performing.

[0008]

According to the structure of the present invention, in a semiconductor device in which a semiconductor chip is mounted on a mount portion of a lead frame via a mount material and resin-sealed, the mount material is bonded. A groove for joining the central portion and the corner portion of the semiconductor chip is provided on the surface of the lead frame.

In the present invention, the mounting material is partially thickened due to the groove provided in the lead frame, so that a large portion absorbs thermal stress in evaluation and testing, and reliability is ensured while ensuring heat dissipation. Can be improved.

[0010]

1 (a) and 1 (b) are a plan view and a sectional view of a main portion of a semiconductor device according to an embodiment of the present invention, and FIGS. FIG. 3C is a plan view showing an example of each groove formed in the semiconductor device. In the semiconductor device of this embodiment, the semiconductor chip 1 is melted and fixed to the lead frame 2 having the groove 5 by the mount material 3. The mounting surface of the lead frame 2 on which the semiconductor chip 1 is mounted is covered with the resin 6 and the opposite side of the lead frame 2 is exposed.

The cross-sectional shape of the groove 5 is generally quadrangular, but a semi-circular shape is desirable in consideration of the filling property of the mount material. Further, regarding the size of the groove 5, considering the thermal stress and heat dissipation, the width is 1 to 2 m.
m, the length is longer than that of the semiconductor chip 1 mounted on the lead frame 2, and the depth is 10 to 80 μm.
It is effective to set m.

FIG. 2 shows a groove 5 formed in the lead frame 2.
Shows different shapes of. The optimum groove can be selected from FIGS. 2A, 2B, and 2C depending on the size of the semiconductor device. FIG. 2A shows the groove 5 of FIG. 1 rotated by 45 °, which has a relatively excellent heat dissipation property. FIG.
(B) and (c) show the grooves 5 formed in a radial shape or a grid shape, and it is easy to absorb the thermal stress in the evaluation and test of the semiconductor device.

FIG. 3 is a sectional view of a main portion of a semiconductor device according to another embodiment of the present invention. This semiconductor device is the same semiconductor device as in FIG. 1, but the lead frame 2 is entirely covered with resin 6.

[0014]

As described above, according to the present invention, in the semiconductor device in which the semiconductor chip is mounted on the mount portion of the lead frame via the mount and resin sealing is performed, the groove is formed on the mount surface of the lead frame. By applying
The mount material can be made thicker, and the thermal stress generated during the evaluation and test of the semiconductor device can be relaxed by 5 to 10%.
Moreover, since the groove is partially provided, it is possible to improve reliability while ensuring heat dissipation. Furthermore, since the groove is partially formed, it can be mounted regardless of the size of the semiconductor chip, so that one type of lead frame can be used and the mass productivity is excellent.

[Brief description of drawings]

FIG. 1 is a plan view and a sectional view of a main part of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a plan view of each example of a groove formed in the semiconductor device of FIG.

FIG. 3 is a cross-sectional view of a main part of a semiconductor device according to another embodiment of the present invention.

FIG. 4 is a sectional view of a main part of a conventional semiconductor device.

[Explanation of symbols]

 1 Semiconductor Chip 2 Lead Frame 3 Mounting Material (Joining Material) 4 High Thermal Conductive Plate 5 Groove 6 Resin

Claims (3)

[Claims] 1. In a semiconductor device in which a semiconductor chip is mounted on a mount portion of a lead frame via a mount material and resin-sealed, the semiconductor chip is attached to a surface of the lead frame to which the mount material is adhered. A semiconductor device having a groove for joining a central portion and a corner portion. 2. The semiconductor device according to claim 1, wherein the grooves are X-shaped, cross-shaped, radial or lattice-shaped. 3. The semiconductor device according to claim 1, wherein resin encapsulation is performed on the upper surface or the entire surface of the lead frame.