JPH09247066A - Combined diversity wireless communication device - Google Patents

Abstract

Kind Code: A1 Abstract: An effective combining diversity is performed by sufficiently following high-speed fading, thereby reducing code errors and improving communication quality. SOLUTION: The digital reception intermediate frequency signals output from receiving circuits 21a to 21d are respectively delayed by the delay correction circuit 2.
Demodulation circuits 23a to 23d after delay processing in 2a to 22d
demodulated at d to obtain baseband digital demodulation signal BSa
.About.BSd, and the baseband digital demodulated signals BSa to BSd are input to the multiplication circuits 24a to 24d.
Then, in the multiplication circuits 24a to 24d, the weighting factor generation circuit 50 is based on the C / N detection signals CNSa to CNSd on the baseband digital demodulated signals BSa to BSd.
The weighting factors WKa to WKd generated in step 1 are multiplied and weighted, and the weighted digital demodulated signals are added and synthesized by the digital adder circuit 30.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
Mobile phone system and PHS (Personal handyphone syst)
The present invention relates to a wireless communication device used in a mobile communication system such as em), and more particularly to a combining diversity wireless communication device for weighting and combining wireless signals received by a plurality of antennas.

[0002]

2. Description of the Related Art Generally, a mobile communication system adopts a diversity reception system in order to reduce the influence of fading. For example, a PHS base station includes a plurality of antennas arranged apart from each other, weights radio signals respectively received by these antennas with a weighting factor set according to the received electric field strength, and then performs addition synthesis. ,
The composite signal is demodulated and then subjected to decoding processing by a codec.

FIG. 5 is a circuit block diagram showing an example of the configuration of a radio circuit section of a PHS base station which has been conventionally used. In the figure, radio signals transmitted from a PHS mobile station (not shown) are respectively received by the four antennas 1a to 1d and then input to the frequency converters 2a to 2d. Then, in these frequency converters 2a to 2d, after being mixed with the local oscillation signals generated from the local oscillators (LO) 3a to 3d and down-converted to an intermediate frequency, operational amplifiers 4a to 4 for weighting.
is input to d.

The radio signals received by the antennas 1a to 1d are input to the reception field strength detectors 5a to 5d, respectively, where the reception field strengths (RSSI; Recieved).
signal strength indicator) is detected. And
These RSSI detection signals are respectively output from the operational amplifiers 4a to 4a.
4d, where the received intermediate frequency signal is multiplied. That is, in the operational amplifiers 4a to 4d, the RS
The received intermediate frequency signal is weighted based on the SI detection signal. The weighted 4-series reception intermediate-frequency signals are added to each other in the adder circuit 6 to form a 1-series combined reception intermediate-frequency signal, which is supplied to the demodulation circuit 7 for demodulation processing. To be done.

In such a device, since the received signals received by the four antennas are weighted and combined and then demodulated, the influence of fading can be reduced and high quality mobile communication can be performed. .

[0006]

However, in such a conventional device, the weighting synthesis is performed by using the operational amplifiers 4a to 4d and the adding circuit 6 in the intermediate frequency stage. Therefore, when high-speed fading occurs,
The operation of the operational amplifiers 4a to 4d cannot follow the change, and when the reception quality is detected, the response speed of the reception quality detecting comparator or the like cannot follow the deterioration of the reception quality due to fast fading. For this reason, stable weighting and synthesis cannot be performed, which may cause the received signal level to fluctuate and cause demodulation errors.

The present invention has been made in view of the above circumstances. An object of the present invention is to make it possible to sufficiently follow high-speed fading and to achieve effective synthetic diversity. It is an object of the present invention to provide a combining diversity wireless communication device capable of reducing the occurrence of code errors and improving the communication quality.

[0008]

In order to achieve the above object, the combined diversity radio communication apparatus of the present invention converts a radio signal received by a plurality of antennas into a signal having a frequency lower than that frequency and then demodulates the signal. In the reception demodulation system, the weighting calculation means is provided at the baseband signal stage in the reception demodulation system. Then, the weighting calculation means performs weighting processing on the signals of the respective basebands based on the respective weighting information generated by the weighting control means, and the respective weighted baseband signals are combined with each other. It is a thing.

Therefore, according to the present invention, since the weighting process is performed on the baseband signal whose frequency has become sufficiently low, the weighting synthesis is efficiently performed in terms of power consumption even for fast fading. As a result, it is possible to reduce code errors and improve communication quality.

Further, according to the present invention, since the weighting combining processing is performed in the baseband stage, when not using all the antennas but selectively using only some of the antennas to perform the combining diversity, The baseband signal level of the series of unused antennas, that is, the noise level can be set to almost zero, and the S / N of the signal after the weighted combination can be increased. This effect is that when the C / N signal can be received by one of the plurality of antennas and the reception levels of the other antennas are below the detection level and cannot be detected, the reception signal level of the series is zeroed by weighting. Also demonstrated when trying to.

By the way, when weighted synthesis is performed in the high frequency stage or the intermediate frequency stage, the noise of the receiver does not become zero due to the noise of the receiver and the like flowing into the signal series of the unused antenna, so that the deterioration of the S / N can be avoided. Absent.

Further, according to the present invention, when the receiving / demodulating means is configured to convert a radio signal received by an antenna into an intermediate frequency signal and then demodulate it to output a baseband demodulated signal, the weighting is performed. It is characterized in that the weighting processing by the arithmetic means is performed on the baseband demodulated signal output from the reception demodulation means.

Further, according to the present invention, when the reception demodulation means is configured to convert a radio signal received by an antenna into a signal of a baseband frequency and then demodulate it, the weighting processing by the weighting calculation means is performed. It is characterized in that the baseband signals before the demodulation are performed, then the baseband signals are combined with each other, and the combined output is demodulated.

With this configuration, it is possible to supply the received signal of one system after weighted synthesis to the demodulation circuit, so that only one system of demodulation circuit needs to be provided, which simplifies the circuit configuration. Can be miniaturized.

Further, the present invention provides the weighting control means,
It is also characterized in that it is provided with a normalizing means for keeping the sum of coefficient values of each weighting information constant. This makes it possible to always perform standardized weighting processing, and as a result, the dynamic range will not be exceeded during weighting calculation, and overflow will not occur in digital calculation processing. By this, by standardizing, that is, by making the signal amplitude constant, it is possible to reduce the deviation of the clock phase reproduced by the clock reproducing circuit, so that it is possible to perform highly accurate combining diversity.

Further, according to the present invention, in the weighting control means, the time required from the reception of the radio signal by the antenna to the output of the corresponding baseband demodulation signal from the reception demodulation circuit, and the radio signal by the antenna are The feature is that the timing adjustment is performed to absorb the difference from the time required from the reception to the generation of the corresponding weighting information.

In this way, even if there is a processing delay in the demodulation means or the like, it is possible to absorb this and perform weighting processing for each symbol of the baseband demodulated signal at accurate timing at all times. It is possible to perform reception with high precision combining diversity.

Furthermore, the present invention is characterized in that the reception demodulation means absorbs the phase difference between the respective baseband signals before weighting processing is performed by the weighting calculation means. With this configuration, the phase shift between the baseband signals caused by the shift of the reproduction clock phase between the receiving and demodulating means and the like is corrected, and thereby it is possible to perform the combining diversity with higher accuracy.

Further, the present invention is characterized in that the information indicating the reception quality is detected for each symbol. As a result, it becomes possible to perform the weighting process sufficiently following the change of the fast fading.

[0020]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) FIG. 1 is a circuit block diagram showing a main configuration of a combining diversity radio communication apparatus according to a first embodiment of the present invention.

The radio communication apparatus of this embodiment has four antennas 10a to 10d arranged at a predetermined distance.
And four reception demodulators 20a to 20d provided corresponding to the antennas 10a to 10d, and a digital adder circuit 30, a clock generator 40, and a weighting coefficient generation circuit 50. .

Each of the reception demodulators 20a to 20d has a reception circuit 21a to 21d and a delay correction circuit 22a to 2d.
2d, demodulation circuits 23a to 23d, and multiplication circuits 24a to 24a.
24d and C / N detection circuits 25a to 25d are provided.

In the receiving circuits 21a to 21d, the radio signals received by the antennas 10a to 10d are subjected to high frequency amplification and then down-converted to intermediate frequency signals, and then analog / digital converters (hereinafter referred to as A / D converters). ) Is performed to convert into a digital signal.

The delay correction circuits 22a to 22d are for absorbing variations in the signal delay generated from the antennas 10a to 10d to the reception circuits 21a to 21d, and are synchronized with the reference clock CK1 generated from the clock generator 40. Then, the digital reception intermediate frequency signals output from the receiving circuits 21a to 21d are delayed by a correction delay amount set in advance according to the signal delay.

The demodulation circuits 23a to 23d digitally demodulate the digital received intermediate frequency signals output from the delay correction circuits 22a to 22d, respectively, according to a predetermined digital modulation / demodulation method, and obtain the baseband digital demodulated signal BSa. .About.BSd are output in synchronization with the clock CK2 generated from the clock generator 40. The cycle of the clock CK2 is set to one symbol cycle of the digital demodulated signals BSa to BSd. As the digital modulation / demodulation method, for example, the π / 4 shift QPSK method is used.

The multiplication circuits 24a to 24d are digital demodulation signals BS output from the demodulation circuits 23a to 23d.
a to BSd are multiplied by weighting factors WKa to WKd output from a weighting factor generation circuit 50 described later. Then, the weighted digital demodulated signal is supplied to the digital addition circuit 30. The digital adding circuit 30 is
The weighted digital demodulated signals output from the multiplication circuits 24a to 24d are added to each other, and the added digital demodulated signal RD is output to a signal processing circuit such as a TDMA circuit or a codec not shown.

The C / N detection circuits 25a to 25d detect the instantaneous reception power-to-noise power ratio (hereinafter, abbreviated as C / N) of the radio signals received by the antennas 10a to 10d, respectively, and the detected value is A. A digital signal is converted by the / D converter, and this is converted into C / N detection signals CNSa to CNSd.
Is supplied to the weighting factor generation circuit 50.

The weighting coefficient generating circuit 50 has a C / N detection signal CN output from the C / N detection circuits 25a to 25d.
Based on Sa to CNSd, each of the digital demodulated signals BS
The weighting factors WKa to WKd corresponding to a to BSd are generated.

FIG. 2 is a circuit block diagram showing the configuration of the weighting coefficient generation circuit 50. This weight coefficient generation circuit 5
0 has four sets of circuits each composed of a delay circuit and a normalization circuit corresponding to the above-mentioned four series of digital demodulated signals.

The delay circuits 51a to 51d delay the C / N detection signals CNSa to CNSd by a preset delay amount in synchronization with the clock CK2 generated by the clock generator 40. This delay amount is obtained by outputting digital reception intermediate frequency signals from the receiving circuits 21a to 21d, passing through the delay correction circuits 22a to 22d, and then demodulated by the demodulating circuits 23a to 23d to obtain the baseband digital demodulated signal BSa. .About.BSd, the processing delay time required for output and C / N detection signals CNSa to CNS from the C / N detection circuits 25a to 25d.
After d is output, the weighting factor WKa-
The difference from the processing delay time required until WKd is generated and output is set to zero.

Each time the C / N detection signals CNSa to CNSd corresponding to one symbol are input from the delay circuits 51a to 51d, the normalization circuits 52a to 52d perform an operation according to a predetermined algorithm based on the values. Then, the weighting factors WKa to WKd are calculated. Then, the calculated weighting factors WKa to WKd are output to the multiplication circuits 24a to 24d. In the above calculation, the weighting factors WKa to W
The value of Kd is standardized so that the sum of the values of these four series always becomes a predetermined value.

Next, the operation of the apparatus configured as described above will be described. Radio signals transmitted from a PHS mobile station (not shown) are respectively received by the four antennas 10a to 10d. The radio signals received by the antennas 10a to 10d are down-converted into intermediate frequency signals by the receiving circuits 21a to 21d, further digitized, and then input to the delay correction circuits 22a to 22d. In each of these delay correction circuits 22a to 22d, the digitized received intermediate frequency signal is delayed by a correction delay amount set in advance for each series, whereby each series generated in each reception circuit 21a to 21d. The phase difference is absorbed.

Then, the respective digital reception intermediate frequency signals whose phase differences between the sequences are delayed and corrected are next demodulated by the demodulation circuit 23a.
~ 23d. These demodulation circuits 23a-23
In d, the digital demodulation processing of each digital reception intermediate frequency signal is performed. Then, the digital demodulated signals BSa to BSd thus obtained are supplied to the multipliers 24a to 24d for each symbol in synchronization with the symbol clock CK2 generated from the clock generator 40.

On the other hand, in parallel with the reception demodulation operation as described above, the C / N of the received radio signal is detected in each of the C / N detection circuits 25a to 25d, the detected signal is digitized, and then the weight coefficient generation circuit is produced. 50 is input.

In the weighting coefficient generation circuit 50, first, in the delay circuits 51a to 51d, the digital C / N detection signals C supplied to the C / N detection circuits 25a to 25d, respectively.
NSa to CNSd are delayed by a certain amount. By this delay processing, after the digital reception intermediate frequency signal is output from the reception circuits 21a to 21d, this signal is delayed by the delay correction circuit 2
2a to 22d and then demodulated by demodulation circuits 23a to 23d to obtain baseband digital demodulation signals BSa to BS.
The processing delay time required for the output as d and the C / N detection signals C from the C / N detection circuits 25a to 25d.
The difference from the processing delay time required from the output of NSa to CNSd to the generation and output of the weighting factors WKa to WKd based on this signal is absorbed. Therefore, the digital demodulated signal B input to the multiplication circuits 24a to 24d is
The input timings of Sa to BSd and the weighting factors WKa to WKd match.

Then, in the normalization circuits 52a to 52d, the digital C / N detection signals CNSa to CNS are respectively received.
Calculation is performed according to a predetermined algorithm based on d,
As a result, the weighting factors WKa to WKd are obtained. An example of the algorithm will be described below. Here, for simplification, a case will be described as an example where the weighting coefficients WKa and WKb of two series out of the weighting coefficients WKa to WKd of four series are obtained.

That is, it is assumed that ΔRSSIa = xdBμV ΔRSSIb = ydBμV is obtained as the digital C / N detection signal.

When x> y, W'a = ΔRSSIa−ΔRSSIa = x−x = 0 dB W′b = ΔRSSIa−ΔRSSIb = x−y = z dB

Here, if the weighting coefficient W'1 of 0 dB is 1, the value of W'b can be obtained from the logarithmic ratio of voltage or power, and each is given by the following equation. W'a1 = 1 (1) W'b1 = Z '(2) Then, from these equations (1) and (2), the standardized weighting factors WKa and WKb can be obtained as follows. WKa = W'a1 / W'a1 + W'b1 = 1/1 + z 'WKb = W'b1 / W'a1 + W'b1 = z' / 1 +
z ′ That is, WKa + WKb = 1, and the sum of the weighting factors is standardized to be a constant value.

The weighting factors WKa to WKd calculated by the normalizing circuits 52a to 52d are multiplied by the multiplying circuits 24a to 24a.
In 4d, the digital demodulated signals BSa to BSd are multiplied for each symbol as shown in FIG. 3, and the weighted digital demodulated signal is output. Then, these digital demodulated signals are added to each other in the digital adder circuit 30, and the weighted addition-synthesized digital demodulated signal RD is thereby added.
Is obtained.

As described above, in the present embodiment, the receiving circuit 21
The digital reception intermediate frequency signals output from a to 21d are delayed by delay correction circuits 22a to 22d, respectively, and then demodulated in demodulation circuits 23a to 23d, and the baseband digital demodulated signals BSa to BSd thus obtained are demodulated.
Is input to the weighting multiplication circuits 24a to 24d. Then, in the multiplication circuits 24a to 24d, the baseband digital demodulated signals BSa to BSd are
The C / N detection signals CNSa to CNSd are weighted by multiplying the weighting factors WKa to WKd generated by the weighting factor generation circuit 50 on the basis of the C / N detection signals CNSa to CNSd, and the weighted digital demodulation signals are mutually added by the digital addition circuit 30. I am trying to add and synthesize and output.

Therefore, according to this embodiment, the weighting calculation for the digital demodulated signals BSa to BSd can be performed for each symbol in the multiplication circuits 24a to 24d in the baseband stage. For this reason, even if high-speed fading occurs, it is possible to follow the change in reception level due to the high-speed fading at high speed on a symbol-by-symbol basis for weighted synthesis. That is, it is possible to perform high-precision combining diversity that can sufficiently follow high-speed fading.

Further, delay correction circuits 22a to 22d are provided in front of the demodulation circuits 23a to 23d so that the reception circuits 21a to 21d.
Since the phase difference between each series generated due to the variation of 21d is absorbed, the demodulation circuits 22a to 22d
It is possible to match the signal phases of the respective digital reception intermediate frequency signals that are input to, and thereby highly accurate demodulation processing can be performed.

Further, in the present embodiment, the weight coefficient generating circuit 50 is provided with delay circuits 51a to 51d, and the delay circuits 51a to 51d respectively have C / N detection signals CN.
Sa to CNSd are delayed by a predetermined amount. Therefore, the weighting coefficient WK for the multiplication circuits 24a to 24d
a to WKd as input timing of digital demodulation signal B
It is possible to match the input timings of Sa to BSd, thereby absorbing the difference between the signal delay generated in the reception demodulation process and the signal delay generated in the weight coefficient generation process, and always performing accurate weighting processing. You can

By the way, assuming that a signal delay corresponding to, for example, 3.5 symbols occurs between the input and output ends of the demodulation circuits 23a to 23d, if the weighting process is performed without considering this, a simple comparison is made. Then, the symbol positions to be weighted are displaced by the above 3.5 symbols,
It becomes impossible to perform accurate weighting. This poses a problem especially in the determination error after demodulation. On the other hand, when the output timing of the weighting factors WKa to WKd is delayed in consideration of the delay of 3.5 symbols as in the present embodiment, the digital demodulation signal BSa to the multiplying circuits 24a to 24d is, as described above. ~ BSd input timing and weighting factor WKa ~
The input timing of WKd can be made to coincide with each other, whereby accurate weighting processing can always be performed.

Further, according to the first embodiment, the weighting coefficient generation circuit 50 is provided with the normalization circuits 52a to 52d, and the weighting coefficient WK is used in these normalization circuits 52a to 52d.
Since the weighting factors WKa to WKd are standardized so that the total sum of a to WKd is always a predetermined constant value, an overflow may occur when the multiplication circuits 24a to 24d perform multiplication. Therefore, it is possible to perform arithmetic processing with less error.

Further, in the first embodiment, each of the antennas 10a ...
The reception C / N of the radio signal received in 10d is detected, and the weighting factor generation circuit 50 generates the weighting factors WKa to WKd based on these reception C / Ns. It is possible to detect not only the change of the above but also the change of the phase, and thereby more appropriate weighting can be performed as compared with the case where only the RSSI is detected and the weighting coefficient is generated.

(Second Embodiment) In the second embodiment, in a radio communication device adopting a dyne direct conversion system for directly frequency-converting a radio signal into a baseband signal in the reception circuit, Each output baseband received signal is weighted individually, these weighted baseband received signals are added together, and the added baseband received signal is input to the demodulation circuit for demodulation processing. It is something that is done.

FIG. 4 is a circuit block diagram showing the configuration of the main part of the combining diversity radio communication apparatus according to the second embodiment. In the figure, the same parts as those in FIG. 1 are designated by the same reference numerals and detailed description thereof will be omitted.

That is, the four antennas 10a to 10d
The radio signals received by the respective reception units 20
It is input to a'to 20d '. These receivers 20a '
20d ', each of the radio signals is first received by the receiving circuit 2
After being frequency-converted into baseband digital reception signals at 1a 'to 21d', delay correction circuits 22a to 22d are provided.
Thus, the phase difference between each series is corrected, and then input to the multiplication circuits 24a to 24d for weighting.

Then, these multiplication circuits 24a to 24d
In the baseband digital received signals output from the delay correction circuits 22a to 22d, the weighting factors WKa to WKa to be output from the weighting factor generation circuit 50 '.
A process for multiplying WKd is performed. Then, the weighted digital reception signals are input to the digital addition circuit 30, where they are mutually added and then input to the demodulation circuit 23. The demodulation circuit 23 demodulates the weighted-synthesized one-series digital received signal, and the digital demodulated signal is not shown in the figure.
It is supplied to a signal processing circuit such as a DMA circuit or a codec.

Thus, also in the second embodiment,
The digital reception signals converted into the base band are weighted by the multiplication circuits 24a to 24d, and the digital addition circuit 30 performs addition synthesis. Therefore, it becomes possible to perform the weighting calculation for each received signal and the addition and synthesis thereof in correspondence with the symbol of the received signal, whereby the weighted synthesis can be performed by reliably following the change of the receiving level due to the occurrence of the fast fading. .

Further, since the digital reception signal which has been subjected to weighted synthesis and has become one series is inputted to the demodulation circuit 23 and demodulation processing is performed there, only one demodulation circuit can be provided, and a circuit corresponding to that is provided. The configuration can be simplified and downsized. This is extremely useful in a wireless communication device for mobile communication in which the reduction in size and weight is one of the important issues.

Further, in the second embodiment, since the weighting operation is performed in the multiplication circuits 24a to 24d before demodulation, the delay of the digital received signal (3.
(Corresponding to 5 symbols) need not be considered.
However, when the wireless circuits 21a to 21d are performing direct conversion, it is necessary to consider the processing delay.

The present invention is not limited to the above embodiments. For example, in each of the above embodiments, the demodulation processing of the received signal, the generation of the weighting coefficient, the weighting multiplication processing and the addition processing, and the delay processing in the delay correction circuits 22a to 22d and the delay circuits 51a to 51d are performed by digital signal processing. Alternatively, it may be configured to be performed by an analog circuit.

In each of the above embodiments, the delay correction circuit 2
The case where the delay amounts in 2a to 22d and the delay circuits 51a to 51d are fixedly set in advance has been described.
The phase difference between each series of received signals and the delay amount in each reception demodulation system are monitored by a synchronizing circuit or the like, and the delay amounts in the delay correction circuits 22a to 22d and the delay circuits 51a to 51d are adapted based on the monitoring results. It may be configured to be variably set. By doing so, accurate delay control can be performed even with respect to changes in circuit characteristics due to temperature, changes over time, and the like.

Further, in the first embodiment, the digital demodulation signals BSa to BS to the multiplication circuits 24a to 24d are provided.
Although the delay circuits 51a to 51d for matching the input timings of d and the weighting factors WKa to WKd are provided in the weighting factor generation circuit 50, the delay circuits having the same functions are standardized circuits 52a to 52d and the multiplication circuits 24a to 24a. Between 24d,
Alternatively, it may be provided between the C / N detection circuits 25a to 25d and the weighting factor generation circuit 50.

Further, in the second embodiment, the case where the receiving circuit using the direct conversion system is provided has been described. However, in the case where the receiving circuit using the heterodyne, superheterodyne or double superheterodyne system is also provided. Similarly, the present invention can be applied. That is, also in the case of a heterodyne, superheterodyne, or double superheterodyne type receiving circuit, the digital receiving signal down-converted to the baseband frequency by this receiving circuit is multiplied by the multiplying circuits 24a ...
24d, weighting calculation is performed, each output is added and combined, and then input to the demodulation circuit 23.

Furthermore, the present invention is not limited to the PHS base station, but may be applied to any type of system as long as it is a radio communication apparatus to which the combined diversity receiving system can be applied, and the number of other antennas, reception demodulation. The configurations of the means, the weight control means, and the weight calculation means can be modified in various ways without departing from the scope of the present invention.

[0060]

As described above in detail, in the present invention, the weighting calculation means is provided in the baseband signal stage in the reception demodulation system, and the weighting calculation means generates the weighting control means for each baseband signal. Weighting processing is performed based on each weighting information, and the weighted baseband signals are combined with each other.

Therefore, according to the present invention, it is possible to sufficiently follow high speed fading and perform effective combining diversity, thereby reducing the occurrence of code errors and improving communication quality. A possible combined diversity wireless communication device can be provided.

[Brief description of drawings]

FIG. 1 is a circuit block diagram showing a main configuration of a combining diversity wireless communication device according to a first embodiment of the present invention.

FIG. 2 is a circuit block diagram showing a configuration of a weighting factor generation circuit of the device shown in FIG.

FIG. 3 is a timing diagram used to explain the operation of the device shown in FIG.

FIG. 4 is a circuit block diagram showing a main configuration of a combining diversity wireless communication device according to a second embodiment of the present invention.

FIG. 5 is a circuit block diagram showing a main configuration of a conventional combining diversity wireless communication device.

[Explanation of symbols]

 10a to 10d ... Antennas 20a to 20d ... Reception and demodulation section 21a to 21d, 21a 'to 21d' ... Reception circuit 22a to 22d ... Delay correction circuit 23a to 23d, 23 ... Demodulation circuit 24a to 24d ... Multiplication circuit 25a to 25d ... C / N detection circuit 30 ... Digital addition circuit 40 ... Clock generator 50, 50 '... Weighting coefficient generation circuit 51a-51d ... Delay circuit 52a-52d ... Normalization circuit WKa-WKd ... Weighting coefficient BSa-BSd ... Baseband digital Demodulation signal CNSa to CNSd ... C / N detection signal CK1, CK2 ... Clock signal

Claims (10)

[Claims] 1. A plurality of antennas for respectively receiving radio signals transmitted from the same transmission source, and radio signals respectively received by these antennas are converted into signals of frequencies lower than that frequency and then demodulated. A plurality of reception demodulation means for detecting each of the pieces of information indicating the reception quality of the radio signals received by the plurality of antennas, and weighting for generating weighting information based on the pieces of information indicating the reception qualities. Based on the control means and the weighting information generated by the weighting control means, weighting processing is performed on the signals of the baseband frequencies obtained in the respective reception demodulation means,
A combining diversity wireless communication device, comprising: a weighting calculation means for mutually combining the weighted signals of the respective baseband frequencies. 2. The weighting calculation means comprises: when the reception demodulation means is configured to convert the radio signal received by the antenna into an intermediate frequency signal, demodulate the demodulated signal and output a demodulation signal of a baseband frequency. 2. The combination diversity wireless communication apparatus according to claim 1, wherein the demodulated signals of the baseband frequency outputted from the reception demodulation means are weighted and then combined with each other. 3. The weighting control means includes the time required from the reception of the radio signal by the antenna to the output of the demodulation signal of the corresponding baseband frequency from the reception demodulation circuit, and the reception of the radio signal by the antenna. 3. The combined diversity wireless communication apparatus according to claim 2, further comprising a timing adjusting means for absorbing a difference between a time required to generate the weighting information and a time required to generate the corresponding weighting information. 4. The weighting calculation means is provided by the reception demodulation means when the reception demodulation means is configured to convert a radio signal received by an antenna into a signal of a baseband frequency and then demodulate the signal. 2. The combination diversity wireless communication apparatus according to claim 1, wherein the baseband frequency signals are weighted and then combined, and the combined output is used for demodulation by the reception demodulation means. 5. The combination diversity wireless communication apparatus according to claim 1, wherein the weighting control means includes a normalization means for keeping the sum of coefficient values of each weighting information constant. 6. The reception demodulation means comprises phase difference correction means for absorbing a phase difference between the baseband signals before weighting processing by the weighting calculation means. Diversity wireless communication device. 7. The processing excluding frequency conversion in the reception demodulation means, the processing excluding the detection processing of information representing the reception quality in the weighting control means, and each processing in the weighting calculation means are performed by digital signal processing. 7. The combined diversity wireless communication device according to claim 1. 8. The combined diversity wireless communication apparatus according to claim 1, wherein the information indicating the reception quality is an instantaneous reception power to noise power ratio. 9. The combined diversity wireless communication apparatus according to claim 8, wherein the instantaneous received power to noise power ratio is received field strength information. 10. The combined diversity wireless communication apparatus according to claim 8, wherein the information indicating the reception quality is detected at a rate at which detection can be performed for each symbol.