JPH09283697A - スタックモジュール - Google Patents

スタックモジュール

Info

Publication number
JPH09283697A
JPH09283697A JP8096410A JP9641096A JPH09283697A JP H09283697 A JPH09283697 A JP H09283697A JP 8096410 A JP8096410 A JP 8096410A JP 9641096 A JP9641096 A JP 9641096A JP H09283697 A JPH09283697 A JP H09283697A
Authority
JP
Japan
Prior art keywords
stack module
semiconductor chip
stacked
heat
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8096410A
Other languages
English (en)
Other versions
JP2806357B2 (ja
Inventor
Kenichi Tokuno
健市 得能
Ikuyuki Morizaki
郁志 森崎
Akihiro Dotani
明裕 銅谷
Manabu Bonshihara
學 盆子原
Naoharu Senba
直治 仙波
Yuzo Shimada
勇三 嶋田
Kazuaki Uchiumi
和明 内海
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP8096410A priority Critical patent/JP2806357B2/ja
Priority to TW86105003A priority patent/TW369708B/zh
Priority to KR1019970014542A priority patent/KR100225659B1/ko
Priority to US08/844,320 priority patent/US5883426A/en
Publication of JPH09283697A publication Critical patent/JPH09283697A/ja
Application granted granted Critical
Publication of JP2806357B2 publication Critical patent/JP2806357B2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/20—Arrangements for cooling
    • H10W40/22—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections
    • H10W40/226—Arrangements for cooling characterised by their shape, e.g. having conical or cylindrical projections characterised by projecting parts, e.g. fins to increase surface area
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/40—Arrangements for thermal protection or thermal control involving heat exchange by flowing fluids
    • H10W40/43—Arrangements for thermal protection or thermal control involving heat exchange by flowing fluids by flowing gases, e.g. forced air cooling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/70—Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
    • H10W40/73—Fillings or auxiliary members in containers or in encapsulations for thermal protection or control for cooling by change of state
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/877—Bump connectors and die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/288—Configurations of stacked chips characterised by arrangements for thermal management of the stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

(57)【要約】 【課題】 放熱部材のところで発生する熱応力を緩和さ
せ、冷却効率を向上させる。 【解決手段】 半導体チップ１が実装された実装基板２
ａ〜２ｄを基板接続用バンプ６を用いて４段にスタック
し、実装基板２ｂ〜２ｄの半導体チップ１と実装基板２
ａ〜２ｃの裏面との間に波形状の銅製の放熱部材５ａ〜
５ｃが熱的に、その弾力で接触するように設置する。

Description

【発明の詳細な説明】
【０００１】
【発明の属する技術分野】本発明はスタックモジュー
ル、特に、半導体チップを搭載した基板を複数枚積み重
ねたスタックモジュールに関する。
【０００２】
【従来の技術】従来のスタックモジュールについて図面
を参照して詳細に説明する。
【０００３】図３は従来の一例を示す断面図である。図
３に示すスタックモジュールは、基板２に搭載された半
導体チップ１（または基板２）の上（または下）に放熱
板８が接着固定されたものが、基板接続用バンプ６を用
いて４段にスタックされている。（例えば、特開平５−
１９０７１２号公報参照）
【発明が解決しようとする課題】上述した従来のスタッ
クモジュールは、半導体チップ（または基板）と熱膨張
係数の異なる放熱板をするので、前述の接着固定された
部分に熱応力が生じ、熱サイクル寿命が短かいという欠
点があった。また、放熱板が平板であり放熱面積が少な
いので、冷却効率を高めるためには、基板の外部まで放
熱板を広げなければならないから、スタックモジュール
を小型にすることが困難であるという欠点があった。
【０００４】
【課題を解決するための手段】第１の発明のスタックモ
ジュールは、半導体チップをフリップチップ実装した基
板を積層したモジュールの前記半導体チップと隣接する
前記基板との間に波形状の放熱部材を有する。
【０００５】第２の発明のスタックモジュールは、半導
体チップをフリップチップ実装した基板を積層したモジ
ュールの前記半導体チップと隣接する前記基板との間に
ヒートパイプを有する。
【０００６】
【発明の実施の形態】次に、本発明について図面を参照
して詳細に説明する。
【０００７】図１は本発明の第１の実施形態を示す断面
図である。図１に示すスタックモジュールは、半導体チ
ップ１が実装された実装基板２ａ〜２ｄを基板接続用バ
ンプ６を用いて４段にスタックし、実装基板２ｂ〜２ｄ
の半導体チップ１と実装基板２ａ〜２ｃの裏面との間に
波形状の銅製の放熱部材５ａ〜５ｃが熱的に、その弾力
で接触するように設置する。
【０００８】放熱部材５ａ〜５ｃは放熱面積が広いので
冷却効果が大であり、放熱部材５ａ〜５ｃはどこにも接
着されていないので、熱応力が発生しない。
【０００９】図２は本発明の第２の実施形態を示す断面
図である。図２に示すスタックモジュールは、図１に示
した放熱部材５ａ〜５ｃの代りにヒートパイプ７ａ〜７
ｃを利用している。半導体チップ１から生じた熱は、ヒ
ートパイプ７ａ〜７ｃ中の溶剤を気化させ、この気化熱
によって冷却を行なうので、空冷が困難な環境，例えば
真空中においても効率よく冷却できる。
【００１０】
【発明の効果】本発明のスタックモジュールは、平板の
放熱板を接着する代りに、波形状の放熱部材または、ヒ
ートパイプを用い、発熱部分に接触させるようにしたの
で、熱応力が発生せず、熱サイクル寿命を長くできると
いう効果がある。
【図面の簡単な説明】
【図１】本発明の第１の実施形態を示す断面図である。
【図２】本発明の第２の実施形態を示す断面図である。
【図３】従来の一例を示す断面図である。
【符号の説明】
１ 半導体チップ ２ 実装基板 ５ 放熱部材 ６ 基板接続用バンプ
───────────────────────────────────────────────────── フロントページの続き (72)発明者 盆子原 學 東京都港区芝五丁目７番１号 日本電気株 式会社内 (72)発明者 仙波 直治 東京都港区芝五丁目７番１号 日本電気株 式会社内 (72)発明者 嶋田 勇三 東京都港区芝五丁目７番１号 日本電気株 式会社内 (72)発明者 内海 和明 東京都港区芝五丁目７番１号 日本電気株 式会社内

Claims (6)

    【特許請求の範囲】
  1. 【請求項１】 半導体チップをフリップチップ実装した
    基板を積層したモジュールの前記半導体チップと隣接す
    る前記基板との間に波形状の放熱部材を有することを特
    徴とするスタックモジュール。
  2. 【請求項２】 半導体チップをフリップチップ実装した
    基板を積層したモジュールの前記半導体チップと隣接す
    る前記基板との間にヒートパイプを有することを特徴と
    するスタックモジュール。
  3. 【請求項３】 半導体チップが実装された実装基板を基
    板接続用バンプを用いて複数段にスタックし、前記実装
    基板の半導体チップと前記実装基板の裏面との間に放熱
    部材を熱的にその弾力で接触するように設置することを
    特徴とするスタックモジュール。
  4. 【請求項４】 前記放熱部材が波形状である請求項３記
    載のスタックモジュール。
  5. 【請求項５】 前記放熱部材の材質が銅である請求項３
    記載のスタックモジュール。
  6. 【請求項６】 前記放熱部材がヒートパイプである請求
    項３記載のスタックモジュール。
JP8096410A 1996-04-18 1996-04-18 スタックモジュール Expired - Lifetime JP2806357B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP8096410A JP2806357B2 (ja) 1996-04-18 1996-04-18 スタックモジュール
TW86105003A TW369708B (en) 1996-04-18 1997-04-17 Stack module
KR1019970014542A KR100225659B1 (ko) 1996-04-18 1997-04-18 스택 모듈
US08/844,320 US5883426A (en) 1996-04-18 1997-04-18 Stack module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8096410A JP2806357B2 (ja) 1996-04-18 1996-04-18 スタックモジュール

Publications (2)

Publication Number Publication Date
JPH09283697A true JPH09283697A (ja) 1997-10-31
JP2806357B2 JP2806357B2 (ja) 1998-09-30

Family

ID=14164208

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8096410A Expired - Lifetime JP2806357B2 (ja) 1996-04-18 1996-04-18 スタックモジュール

Country Status (4)

Country Link
US (1) US5883426A (ja)
JP (1) JP2806357B2 (ja)
KR (1) KR100225659B1 (ja)
TW (1) TW369708B (ja)

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US7091619B2 (en) 2003-03-24 2006-08-15 Seiko Epson Corporation Semiconductor device, semiconductor package, electronic device, electronic apparatus, and manufacturing methods of semiconductor device and electronic device
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JP2013128149A (ja) * 2013-03-25 2013-06-27 J Devices:Kk 半導体装置及び積層型半導体装置

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KR970072372A (ko) 1997-11-07

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