JPH09284804A - Video data reproducing device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a video image displayed on a television monitor from being unsmoothed because interleaved video data are not displayed when a transfer rate of a video signal to be outputted is adjusted while being matched with a television system by interleaving the video data subjected to decode processing. SOLUTION: A decode period changeover circuit 8 selects a period for a video decoder 3 receiving video data to be processed for 2-field period and video data to be processed for 1-field period in mixture to decode-process same video data so as to allow the decoder 3 to conduct decode processing for video data corresponding to the television system different from that of a television monitor. In this case, in response to the data amount of in a buffer memory 6 storing once video data for decoding processing, the period of the same video data for decoding processing is selected to easily and surely select the decoding period.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video data reproducing apparatus for reproducing video data encoded in conformity with a moving image compression standard such as MPEG, and more particularly to converting a television system from an NTSC system to a PAL system. The present invention relates to a video data reproducing device suitable for the.

[0002]

2. Description of the Related Art When video data is recorded as a digital signal on a package medium such as a disc, a data compression technique is used because of the amount of data. As this data compression technique, MPEG of moving image compression standard is known. There is. Video CDs and CD-I discs exist as package media for recording video data by the MPEG, and disc reproducing devices for reproducing these discs have been commercialized.

By the way, a disc reproducing apparatus for handling such video data is provided with a circuit for converting the television system of a video signal to be output according to the television system of the television monitor used, and selectively NTSC system and PAL. There are models that can output the video signal of the system.

Here, the NTSC system is composed of 30 frames per second of video, while the PAL system is composed of 25 frames of video per second, so that the television system of the video data recorded on the disc to be reproduced is used. If the TV system of the video signal to be output is different, the video data transfer rate does not reach the intended data transfer rate. Therefore, when the TV system of the video data recorded on the disc to be played back and the TV system of the video signal to be output are different, output by thinning out the video data to be decoded or vice versa. Adjustments were made to match the video signal transfer rate to the TV system.

[0005]

By the way, when adjusting the transfer rate of the video signal to be output by thinning out the video data to be decoded in accordance with the television system, since the thinned-out video data exists, the television monitor displays it. There was a problem that the projected image was not smooth. For example, when playing back a disc on which NTSC video data is recorded to obtain a PAL video output, 30 frames per second is set to 25 frames per second, and therefore there is a video that is not displayed every 6 frames. However, about 16.7% of the images are not displayed.

[0006]

According to the present invention, a period for decoding the same video data can be selectively switched between a one-field period and a two-field period, and a period for decoding the same video data is one field. By combining the case of setting the period and the case of setting the two-field period, the transfer rate of the video data is adjusted to match the television system having the smaller number of frames per second.

Further, the video decoder is constructed so that it is temporarily stored in the buffer memory and then decoded, and the period for decoding the same video data is switched according to the data amount of the video data stored in the buffer memory. In a state where the data amount of the buffer memory is larger than a preset set data amount, the decoding processing period is switched to a short period side so that the data amount of the buffer memory decreases and the buffer memory When the data amount of the buffer memory is smaller than the set data amount, the decoding process period is not switched to the short period side, and the data amount of the buffer memory is increased to set the data amount of the buffer memory to the set data amount. Video decoder It is converted into transfer rate transfer rate different from the video data to be written to the transfer rate of the video data in the buffer memory with an average constant which is more decoding.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a circuit block diagram showing an embodiment of the present invention. FIG.
1 shows a video data reproducing device of a disc player corresponding to a video CD in which video data is recorded by the EG1 system.

In FIG. 1, reference numeral 1 is a CD dedicated to audio.
-CD-ROM data that has been decoded to the same extent as the DA disc format is input, and its CD-RO
A CD-ROM decoder 2 for performing a decoding process peculiar to the CD-ROM data format on the M data is denoted by C.
While decoding various additional data included in the CD-ROM data output from the D-ROM decoder 1,
A separation circuit 3 for separating the video data in the D-ROM data is a video decoder for decoding the video data separated by the separation circuit 2 for each frame.

The video decoder 3 can selectively output the output video data to the television system of NTSC system and PAL system, and the vertical video data is inserted into the video data at the timing corresponding to the selected television system. V sync generation circuit 4 for generating a synchronization signal (V sync)
It has.

A buffer RA 6 temporarily stores video data decoded by the video decoder 3.
M and 7 are RAM management circuits for controlling writing and reading of video data in the buffer RAM 6.

Reference numeral 8 is a decoding period switching circuit for selectively switching the period for decoding the same video data by the video decoder 3 between the 1-field period and the 2-field period, and 9 is the V generated by the V sync generation circuit 4.
A V sync counter 10 for counting the number of syncs is a television system switching circuit for selectively switching the television system of the decoded video data output from the video decoder 3 between the NTSC system and the PAL system.

The operation of the disc player thus constructed will be described below. CD-ROM decoder 1
The CD-ROM data output from the device is separated into video data, audio data and various additional data by the separation circuit 2, and the video data and additional data necessary for decoding the video data are supplied to the video decoder 3. The video data is once stored in the buffer RAM 6 and then decoded by the video decoder 3.

By the way, in the video decoder 3, the television system of the decoded video data to be output is switched depending on the switching state by the television system switching circuit 10.
The timing of the V sync generated from the V sync generation circuit 4 is switched according to the selected television system, and the decoded video data in which the V sync is inserted is output from the video decoder 3 at the timing according to the selected television system. Is output.

It is now assumed that the television system of the television monitor used is the PAL system. In this case, the television system switching circuit 10 switches the video decoder 3 to the PAL system. In this state, the video data is NTS
When the disc recorded in the C system is reproduced, the video data supplied to the video decoder 3 is subjected to a decoding process corresponding to the processing procedure shown in the flowchart of FIG.

The decoding process of the video data in this case will be described with reference to FIG. As for the video data stored in the buffer RAM 6, the video data decoded by the video decoder 3 under the control of the RAM management circuit 7 is read for each frame (step a).

On the other hand, the V sync counter 9 is reset at the same time when the video data is read out, and the count value N is initialized to "0" (step b).
Next, the decoding process of the read video data is started (step c). When the decoding process of the video data is started, the V sync generation circuit 4 generates the V sync, and when the V sync is generated, the V sync counter 9 increments the count value N by 1. (Steps d and e).

In this case, the time taken for the decoding process by the video decoder 3 differs for each video data due to the difference in the data amount of the video data. Therefore, the number of times the V sync is generated by the V sync generation circuit 4 during the period in which one video data is decoded is not constant for each video data.

When the decoding process of the video data is started, the completion of the decoding process is detected (step f). When the completion of the decoding process is detected, the V sync counter 9 at that time is detected. It is determined whether the count value N is "2" or more (step g). V
When the count value N of the sync counter 9 is “2” or more, the V sync counter 9 is reset and new video data is read from the buffer RAM 6,
The decoding process of the next video data is started.

On the other hand, the count value N of the V sync counter 9
Does not reach "2", that is, when the count value N is "1" (N = 0 does not exist because the completion of the decoding process of the video data is detected), the buffer RA
It is determined whether or not the data amount of the video data stored in M6 is equal to or larger than the preset setting data amount (step h), and the data amount of the video data stored in the buffer RAM 6 has reached the setting data amount. If not, the same video data is repeatedly displayed during the 1V sync period (step i).

Therefore, if the data amount of the video data stored in the buffer RAM 6 at the time when the completion of the decoding process is detected has not reached the set data amount, the same video data is stored until the V sync is generated twice. The decoding process is performed, that is, the decoded video data is output from the video decoder 3 so that the video data for one picture is displayed over the two-field period.

Here, the set data amount is the buffer RA.
The memory capacity of the buffer RAM 6 is set in consideration of the memory capacity that can be used most effectively within the range in which the overflow of the M6 data can be avoided, and the memory capacity of the RAM to be used and one picture The setting data amount changes according to the number of bits of video data, but MP
When a 4-Mbit RAM is used for the video data of EG1, it is set to 80% of the memory capacity, for example.

By the way, the count value N of the V sync counter 9 has not reached 2 at the time when the completion of the decoding process of the video data is detected, and the data amount of the video data stored in the buffer RAM 6 is set in advance. If it is equal to or larger than the set data amount, V sync counter 9
Is reset, new video data is read from the buffer RAM 6, and the decoding process of the next video data is started.

On the other hand, when the data amount of the video data stored in the buffer RAM 6 has not reached the preset set data amount, the same decoded video data is generated from the video decoder 3 by V sync twice. The video data for one picture will be displayed over the two-field period.

Therefore, even if the V sync is not generated twice at the time when the completion of the decoding process is detected, if the data amount of the video data stored in the buffer RAM 6 is equal to or larger than the set data amount, a new data amount is newly set. The video data transferred from the buffer RAM 6 is decoded, that is, in this case, if it is a B picture, the video data for one picture is decoded by the video decoder 3 so as to be displayed only for one field period. The state in which the completed video data is output selectively occurs.

By the way, when the video data recorded on the video CD is displayed on the television monitor, one frame of the moving image is formed by repeatedly displaying the video data of one picture for two field periods. When the video data for one frame is displayed for only one field period, the transfer rate of the decoded video data output from the video decoder 3 is increased.

On the other hand, in the state where the video decoder 3 is switched to the PAL system and the disc on which the video data is recorded in the NTSC system is being reproduced,
The NTSC system makes a moving image at 30 frames per second, whereas the PAL system makes a moving image at 25 frames per second. Therefore, video data for one picture is repeatedly displayed for two field periods to form one frame. By doing so, the buffer RAM 6 can be used according to the transfer rate of the video data decoded by the video decoder 3.
The transfer rate of the video data written to is high. Therefore, it is not possible to repeatedly display the video data read from the disc for one picture per 2 field periods, but the video data for one picture is repeatedly displayed for 2 field periods during the decoding process. By mixing the decoding process for displaying the minute video data for only one field period, the transfer rate of the decoded video data output from the video decoder 3 can be reduced as compared with the transfer rate of the video data read from the disc.

Here, when the video data for one picture is decoded so as to be displayed only for one field period and then the decoding process of the next video data is started, the data is transferred from the buffer RAM 6 from the buffer RAM 6 according to the data transfer rate for writing to the buffer RAM 6. The read data transfer rate is increased, and the amount of video data stored in the buffer RAM 6 is reduced. Then, the decoding process for displaying the video data of one picture only for one field period is performed when the amount of data stored in the buffer RAM 6 is equal to or larger than the set amount of data, and the buffer RAM 6
When the amount of data stored in (1) is smaller than the set amount of data, the process proceeds to a decoding process in which video data for one picture is repeatedly displayed for two field periods. Therefore, the amount of data stored in the buffer RAM 6 repeatedly increases and decreases based on the set amount of data, and the transfer rate of the video data read from the buffer RAM 6 becomes an average speed corresponding to the PAL system.

As a result, all the video data read from the disk is decoded by the video decoder 3 without being thinned, and the transfer rate of the decoded video data to be output from the video decoder 3 is held in a state corresponding to the PAL system. You can

Therefore, although there is video data which is displayed only for one field period mixed with video data which is displayed for two field periods of the appropriate period, NTSC
All of the video data recorded on the disc compatible with the system can be displayed on the PAL system television monitor.

In this case, the result is an average of 2 per second.
By providing 20 frames of video data to be displayed in the field period and 10 frames of video data to be displayed in the 1 field period, if the NTSC system is supported, 30 frames of video data displayed in the 60 field period will be in the PAL system. It will be displayed in the corresponding 50 field period.

By the way, the number of V sync occurrences at the time when the decoding process is completed by the video decoder 3 is V
Since the field period for displaying the video data is set by counting with the sync counter, the decoding process is performed by reliably switching the video data between the two-field period and the one-field period with a simple configuration.

[0033]

As described above, according to the present invention, the period for decoding the same video data is switched so that the video data processed in the two-field period and the video data processed in the one-field period are mixed. NTS
When all of the video data compatible with the C system can be displayed on the PAL system television monitor, and the data transfer rate is adjusted according to the television system of the television monitor by thinning out the video data to be decoded as in the conventional case. Compared with, it can display a much smoother image.

Further, according to the present invention, the video decoder is temporarily stored in the buffer memory and then decoded, and the same video data is decoded according to the amount of video data stored in the buffer memory. Since the data amount of the buffer memory is increased / decreased with reference to the preset data amount, the transfer rate of the video data decoded by the video decoder varies and remains constant on average. In addition, it is possible to convert the transfer rate of the video data written in the buffer memory to a transfer rate different from that of the TV monitor, and when performing the decoding process of the video data compatible with the TV system different from that of the TV monitor, the TV can be controlled easily and reliably. According to the TV system of the monitor It can be adjusted to the data transfer rate.

Further, the buffer memory has an effect of absorbing the difference between the clock for decoding the video data by the video decoder and the clock for demodulating the recording signal read from the signal recording medium.

Further, since the V sync counter counts the number of V sync occurrences at the time when the decoding process is completed by the video decoder, and the field period for displaying the video data is set, the video is surely structured with a simple structure. The data can be decoded by switching between the 2-field period and the 1-field period.

[Brief description of drawings]

FIG. 1 is a circuit block diagram showing one embodiment of the present invention.

FIG. 2 is a flowchart showing a decoding process of video data according to the present invention.

[Explanation of symbols]

 1 CD-ROM Decoder 3 Video Decoder 4 V Sync Generation Circuit 6 Buffer RAM 7 RAM Management Circuit 8 Decoding Period Switching Circuit 9 V Sync Counter

Claims (3)

[Claims] 1. A video data reproducing apparatus for reproducing video data encoded according to a moving image compression standard such as MPEG, wherein a video decoder for decoding the video data and the same video data by the video decoder. And a decoding period switching circuit for selectively switching the period for decoding the data into one field period and two field period, and a period for processing video data in one field period and a period for processing video data in two field period. A video data reproducing device characterized in that the video data of the NTSC system is converted to the PAL system by mixing the above. 2. A video data reproducing device for reproducing video data encoded according to a moving image compression standard such as MPEG, which comprises a video decoder for decoding the video data and a decoding process by the video decoder. Buffer memory for temporarily storing the video data to be stored, and a decoding period switching circuit for selectively switching a period for decoding the same video data by the video decoder between a 1-field period and a 2-field period. The decoding period switching circuit switches the period during which the video decoder decodes the same video data to one field period on condition that the amount of video data stored in the video data reaches a preset data amount. Characteristic video data playback apparatus. 3. The video decoder generates a vertical synchronizing signal at a timing set according to a television system, counts the number of times the vertical synchronizing signal is input, and decodes video data for each frame by the video decoder. A counter that is reset each time the processing is completed is provided, and the decoding period switching circuit switches the decoding processing period of the video decoder according to the count value of the counter and the data amount of the video data stored in the buffer memory. The video data reproducing apparatus according to claim 1 or 2, wherein