JPH09331145A - Wiring board pad structure - Google Patents
Wiring board pad structureInfo
- Publication number
- JPH09331145A JPH09331145A JP8149551A JP14955196A JPH09331145A JP H09331145 A JPH09331145 A JP H09331145A JP 8149551 A JP8149551 A JP 8149551A JP 14955196 A JP14955196 A JP 14955196A JP H09331145 A JPH09331145 A JP H09331145A
- Authority
- JP
- Japan
- Prior art keywords
- photosensitive resin
- wiring board
- layer
- conductive material
- pad structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
(57)【要約】
【課題】 積層した感光性樹脂を露光して内部配線との
接続用のビアを形成する配線基板において、表層にある
部品実装用パッド位置にビアが形成される場合でも、ハ
ンダ接続不良の無い確実な部品実装を行うことができる
ようにする。
【解決手段】 基板1上に内部配線2が形成されてい
る。内部配線2上には感光性樹脂層3が形成され、その
一部にビア4が形成されている。ビア4の内面及び感光
性樹脂層3の上面近傍には、導電性に優れた金属からな
る層間接続用導電材料層5が形成されており、層間接続
用導電材料層5の内部には感光性樹脂からなる充填層6
が充填されている。感光樹脂層3の上面の他の箇所に
は、感光性樹脂からなる平坦層7が層間接続用導電材料
層5の上面と一致して平坦になるように形成されてお
り、これら平坦層7、層間接続用導電材料層5及び充填
層6の上面に、部品実装用パッド8が形成されている。
(57) Abstract: In a wiring board in which laminated photosensitive resins are exposed to form vias for connection with internal wiring, even when the vias are formed at the component mounting pad positions on the surface layer, To enable reliable component mounting without solder connection failure. Internal wiring 2 is formed on a substrate 1. A photosensitive resin layer 3 is formed on the internal wiring 2, and a via 4 is formed in a part thereof. A conductive material layer 5 for interlayer connection made of a metal having excellent conductivity is formed on the inner surface of the via 4 and in the vicinity of the upper surface of the photosensitive resin layer 3. Filling layer 6 made of resin
Is filled. At other places on the upper surface of the photosensitive resin layer 3, a flat layer 7 made of a photosensitive resin is formed so as to be flat in conformity with the upper surface of the conductive material layer 5 for interlayer connection. Component mounting pads 8 are formed on the upper surfaces of the interlayer-connecting conductive material layer 5 and the filling layer 6.
Description
【0001】[0001]
【発明の属する技術分野】本発明は、感光性樹脂を積層
し、露光により各層間の接続用ビアを形成するプリント
配線基板のパッド構造に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a pad structure of a printed wiring board in which a photosensitive resin is laminated and connection vias between layers are formed by exposure.
【0002】[0002]
【従来の技術】近年、電子機器の高性能、小型化が進
み、プリント配線基板は最小限の面積で多くの信号配線
を引き回さなければならなくなった。従来、この種のプ
リント配線基板では、多層構造化することにより信号線
の増加に対応してきた。また、各層間の接続には、一般
に、「日経エレクトロニクス 第633号」(1995
年4月10日発行)101頁 図2(a)に示されるよ
うに、多層基板全体を貫通する穴(スルーホール)が用
いられている。2. Description of the Related Art In recent years, the performance and miniaturization of electronic devices have advanced, and it has become necessary to route a large number of signal wirings on a printed wiring board with a minimum area. Conventionally, this type of printed wiring board has dealt with an increase in the number of signal lines by forming a multilayer structure. In general, the connection between the layers is described in “Nikkei Electronics No. 633” (1995).
As shown in FIG. 2A, a hole (through hole) penetrating the entire multilayer substrate is used.
【0003】しかし、このスルーホールは、ドリルで穴
を開けるため直径が約300μmと大きくなり、多くの
配線を引き回そうとした場合の配線用スペースに影響を
与えている。そこで、より多くの配線を引き回せるよう
にするため、「日経エレクトロニクス 第633号」
(1995年4月10日発行)101頁 図2(c)に
示されるように、感光性樹脂を積層し、露光によって各
層間の接続用の穴(ビア)を形成する配線基板が用いら
れるようになってきた。この方式では、感光性樹脂を露
光することによりビアを形成するため、ビア径を100
〜150μmと小さくすることができる。そのため、同
じサイズの従来のプリント配線基板と比べて、より多く
の配線を引き出すことが可能である。[0003] However, the diameter of this through hole is as large as about 300 µm because a hole is formed by a drill, and this has an effect on a wiring space when many wires are to be routed. Therefore, in order to be able to route more wiring, "Nikkei Electronics No. 633"
(Published April 10, 1995) Page 101 As shown in FIG. 2C, a wiring board is used in which a photosensitive resin is laminated and a hole (via) for connection between layers is formed by exposure. It has become In this method, a via diameter is set to 100 because a via is formed by exposing a photosensitive resin.
150150 μm. Therefore, more wiring can be drawn out as compared with a conventional printed wiring board of the same size.
【0004】このような配線基板としては、図27に示
すようなものがあった。図27は配線基板の最表層部分
の部分断面図であり、この図において、基板41の上面
に内部配線42が形成され、この内部配線42上に感光
性樹脂層43がさらに塗布されている。この感光性樹脂
層43は露光によりビア44が形成され、このビア44
及びその近傍には、内部配線42からの信号を表層に引
き出すために導電性材料がメッキされており、感光性樹
脂層43にメッキされた導電性材料は部品実装用パッド
45となっている。この部品実装用パッド45は表層の
メッキの余分な部分をエッチングにより削除して形成さ
れたものである。As such a wiring board, there is one as shown in FIG. FIG. 27 is a partial sectional view of the outermost layer portion of the wiring board. In this figure, an internal wiring 42 is formed on the upper surface of a substrate 41, and a photosensitive resin layer 43 is further applied on the internal wiring 42. Vias 44 are formed in the photosensitive resin layer 43 by light exposure.
The conductive material plated on the photosensitive resin layer 43 serves as a component mounting pad 45. The conductive material plated on the photosensitive resin layer 43 serves as a component mounting pad. The component mounting pad 45 is formed by removing an unnecessary portion of the surface plating by etching.
【0005】ところで、プリント配線基板では、一般
に、図28に示すように、スルーホール46から離れた
位置に部品実装用パッド47を引き出している。また、
感光性樹脂を積層して露光によりビアを形成する方式の
配線基板の場合も、同様の配置で部品実装用パッドを形
成する。しかし、積層した感光性樹脂を露光してビアを
形成する配線基板の場合は、ビアの径が100〜150
μmと小さいため、図29に示すように、部品実装用パ
ッド45の内側にビア44を形成することが可能であ
り、配線を引き回すスペースに余裕が無い場合には効果
的である。By the way, in a printed wiring board, generally, a component mounting pad 47 is drawn at a position away from a through hole 46 as shown in FIG. Also,
Also in the case of a wiring board in which a photosensitive resin is laminated to form a via by exposure, component mounting pads are formed in the same arrangement. However, in the case of a wiring board in which a via is formed by exposing the laminated photosensitive resin, the diameter of the via is 100 to 150.
Since it is as small as μm, it is possible to form the via 44 inside the component mounting pad 45 as shown in FIG. 29, and it is effective when there is no space in which to route the wiring.
【0006】[0006]
【発明が解決しようとする課題】しかしながら、上述し
た従来の配線基板では、表層にある部品実装用パッド位
置にビアが形成される場合、部品実装用パッド上にビア
の凹部ができてしまうので、接続不良が発生する場合が
あるという問題点があった。すなわち、ハンダペースト
を用いて部品実装を行うとき、溶融したハンダが凹部に
取られて接続不良が発生する場合があり、また、部品実
装前に予めハンダを部品実装用パッドにコーティングす
るとき、ハンダがビアの凹部に取られるため、ハンダコ
ートした部分に薄い部分ができ、ハンダ表面が極端に酸
化してしまい、その後の部品実装時に接続不良を発生さ
せる場合がある。However, in the above-described conventional wiring board, when a via is formed at a component mounting pad position on the surface layer, a recess of the via is formed on the component mounting pad. There is a problem that a connection failure may occur. That is, when component mounting is performed using a solder paste, molten solder may be caught in the concave portion and a connection failure may occur.Also, when solder is coated on component mounting pads in advance before component mounting, soldering may occur. Is formed in the concave portion of the via, so that a thin portion is formed in the solder-coated portion, and the solder surface is extremely oxidized, which may cause a connection failure at the time of subsequent component mounting.
【0007】なお、配線基板の上下に貫通したスルーホ
ールの凹部をなくす方法として、特開平4−11689
1号公報に示されるように、導体金属で埋めたスルーホ
ールの上下両端の凹部にメッキを析出させてスルーホー
ルを埋めて平坦にする方式があるが、実際にはメッキ金
属を凹部が無くなるまで析出させ、スルーホール上を平
坦にすることは困難である。また、メッキによる析出で
はメッキ金属が下地である導体金属上をならうように形
成されるため、凹部が完全に埋まるまで析出させること
が困難で、コスト及び時間がかかるものである。Japanese Patent Laid-Open No. Hei 4-11689 discloses a method of eliminating a concave portion of a through-hole penetrating vertically above and below a wiring board.
As shown in Japanese Patent Publication No. 1 (1993), there is a method in which plating is deposited on the upper and lower ends of a through hole filled with a conductive metal to fill the through hole and flatten it. It is difficult to deposit and flatten the top of the through hole. Further, in the case of deposition by plating, since the plating metal is formed so as to follow the conductive metal as the base, it is difficult to deposit until the concave portion is completely filled, which is costly and time consuming.
【0008】本発明は上記問題点にかんがみてなされた
ものであり、積層した感光性樹脂を露光して内部配線と
の接続用のビアを形成する配線基板において、表層にあ
る部品実装用パッド位置にビアが形成される場合でも、
ハンダ接続不良の無い確実な部品実装を行うことができ
る配線基板のパッド構造の提供を目的とする。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems, and has been made in consideration of the above-described problem, and is directed to a wiring board for exposing a laminated photosensitive resin to form a via for connection with an internal wiring, and a position of a component mounting pad located on a surface layer. Even if a via is formed in
An object of the present invention is to provide a pad structure of a wiring board that can perform reliable component mounting without solder connection failure.
【0009】[0009]
【課題を解決するための手段】上記目的を達成するため
に本発明の配線基板のパッド構造は、基板と、基板上に
形成された内部配線と、基板及び内部配線上に形成され
た感光性樹脂層と、感光性樹脂層に形成され内部配線を
露出させるビアと、ビア及び感光性樹脂層に形成された
層間接続用導電材料層と、層間接続用導電材料層の内部
に充填された充填層と、充填層及び層間接続用導電材料
層上に形成された部品実装用パッドとを有する構成とし
てある。また、好ましくは、充填層が導電性樹脂で形成
されている構成としてある。In order to achieve the above object, a pad structure of a wiring board of the present invention has a substrate, an internal wiring formed on the substrate, and a photosensitive layer formed on the substrate and the internal wiring. A resin layer, a via formed in the photosensitive resin layer to expose the internal wiring, a conductive material layer for interlayer connection formed in the via and the photosensitive resin layer, and a filling filled inside the conductive material layer for interlayer connection And a component mounting pad formed on the filling layer and the conductive material layer for interlayer connection. Preferably, the filling layer is formed of a conductive resin.
【0010】また、本発明の配線基板のパッド構造は、
基板と、基板上に形成された内部配線と、基板及び内部
配線上に形成された感光性樹脂層と、感光性樹脂層に形
成され内部配線を露出させるビアと、ビア及び感光性樹
脂層に形成された層間接続用導電材料層と、層間接続用
導電材料層の凹部の周囲に形成されたソルダレジストと
を有し、感光性樹脂層上の層間接続用導電材料層の部分
が部品実装用パッドとなっている構成としてある。ま
た、好ましくは、部品実装用パッドがソルダレジストで
細分化されている構成としてある。Further, the pad structure of the wiring board of the present invention comprises:
The substrate, the internal wiring formed on the substrate, the photosensitive resin layer formed on the substrate and the internal wiring, the via formed in the photosensitive resin layer to expose the internal wiring, the via and the photosensitive resin layer It has a formed conductive material layer for interlayer connection and a solder resist formed around the recess of the conductive material layer for interlayer connection, and the portion of the conductive material layer for interlayer connection on the photosensitive resin layer is for mounting components. It is configured as a pad. Further, preferably, the component mounting pad is subdivided by a solder resist.
【0011】上記構成からなる本発明の配線基板のパッ
ド構造によれば、部品実装用パッドに存在するビアの凹
部に充填層が充填されており、ハンダが凹部に入る込む
ことが無く、また、ビアの周囲に形成されたソルダレジ
ストがハンダがビアの凹部に入り込むのを防止する。According to the pad structure of the wiring board of the present invention having the above structure, the filling layer is filled in the concave portion of the via existing in the component mounting pad, so that the solder does not enter the concave portion. The solder resist formed around the via prevents the solder from entering the recess of the via.
【0012】[0012]
【発明の実施の形態】本発明の配線基板のパッド構造の
第1実施形態を図1〜図10を参照して説明する。図1
は配線基板のパッド構造の断面図、図2〜図10は配線
基板のパッド構造の製造工程の断面図を示す。図1にお
いて、1は感光性樹脂からなる基板で、この基板1上に
内部配線2が形成されている。この内部配線2上には感
光性樹脂層3が形成され、その一部にビア4が形成され
ている。このビア4の内面及び感光性樹脂層3の上面近
傍には、銅、銀、金等の導電性に優れた金属からなる層
間接続用導電材料層5が形成されており、この層間接続
用導電材料層5の内部には感光性樹脂からなる充填層6
が充填されている。また、感光樹脂層3の上面の他の箇
所には、感光性樹脂からなる平坦層7が層間接続用導電
材料層5の上面と一致して平坦になるように形成されて
おり、これら平坦層7、層間接続用導電材料層5及び充
填層6の上面に、部品実装用パッド8が形成されてい
る。DESCRIPTION OF THE PREFERRED EMBODIMENTS A first embodiment of the pad structure of a wiring board according to the present invention will be described with reference to FIGS. FIG.
2 is a sectional view of a pad structure of a wiring board, and FIGS. 2 to 10 are sectional views of a manufacturing process of the pad structure of the wiring board. In FIG. 1, reference numeral 1 denotes a substrate made of a photosensitive resin, on which an internal wiring 2 is formed. A photosensitive resin layer 3 is formed on the internal wiring 2, and a via 4 is formed in a part thereof. In the inner surface of the via 4 and in the vicinity of the upper surface of the photosensitive resin layer 3, a conductive material layer 5 for interlayer connection made of a metal having excellent conductivity such as copper, silver, and gold is formed. A filling layer 6 made of a photosensitive resin is provided inside the material layer 5.
Is filled. In other places on the upper surface of the photosensitive resin layer 3, a flat layer 7 made of a photosensitive resin is formed so as to be flat with the upper surface of the conductive material layer 5 for interlayer connection. 7, component mounting pads 8 are formed on the upper surfaces of the conductive material layer 5 for interlayer connection and the filling layer 6.
【0013】次に、製造方法について説明する。まず、
図2に示したように、表層の基板1上に導電材料を用い
て内部配線3を形成する。この内部配線3の形成方法と
しては、銅、銀、金等の導電性に優れた金属をメッキす
る方法、これらの金属箔を貼り付け、内部配線3に必要
な部分だけを残して化学的又は機械的研磨を行い余分な
部分を削除する方法等がある。Next, the manufacturing method will be described. First,
As shown in FIG. 2, the internal wiring 3 is formed on the surface substrate 1 using a conductive material. As a method of forming the internal wiring 3, a method of plating a metal having excellent conductivity such as copper, silver, or gold, attaching these metal foils, and leaving only a necessary portion of the internal wiring 3 chemically or There is a method of removing unnecessary portions by mechanical polishing.
【0014】次に、図3に示すように、内部配線3の上
から感光性樹脂を一定厚塗布して感光性樹脂層3を形成
した後、図4に示すように、感光性樹脂層3を露光、現
像して、内部配線3を表面に引き出すための下地となる
ビア4を形成する。Next, as shown in FIG. 3, a photosensitive resin layer 3 is formed by applying a photosensitive resin over the internal wiring 3 to a predetermined thickness, and then, as shown in FIG. Is exposed and developed to form a via 4 serving as a base for drawing out the internal wiring 3 to the surface.
【0015】次に、図5に示すように、表面から銅、銀
金等の導電性に優れた金属をメッキして層間接続用導電
材料層5を形成した後、図6に示すように、層間接続用
導電材料5に必要な部分だけ残してエッチングにより削
除する。そして、図7に示すように、上から感光性樹脂
を塗布して露光、現像を行い樹脂層を形成し、その後、
図8に示すように、層間接続用導電材料層5が露出する
まで表面の硬化した感光性樹脂を研磨して平坦にし、充
填層6及び平坦層7を形成する。Next, as shown in FIG. 5, a conductive material such as copper or silver gold is plated from the surface to form a conductive material layer 5 for interlayer connection, and as shown in FIG. Etching is removed while leaving only necessary portions of the conductive material 5 for interlayer connection. Then, as shown in FIG. 7, a photosensitive resin is applied from above, exposed and developed to form a resin layer, and thereafter,
As shown in FIG. 8, the cured photosensitive resin on the surface is polished and flattened until the conductive material layer 5 for interlayer connection is exposed, so that the filling layer 6 and the flat layer 7 are formed.
【0016】次に、図9に示すように、感光性樹脂層3
の上から銅、銀、金等の導電性に優れた金属をメッキ又
は金属箔として貼り付けた後、図10に示すように、表
面の金属部分を部品実装用パッドのサイズにエッチング
することで、表面にビアのない平坦な部品実装用パッド
8を形成する。Next, as shown in FIG. 9, the photosensitive resin layer 3
After plating a metal having excellent conductivity such as copper, silver, and gold as a metal or a metal foil from above, as shown in FIG. 10, the metal part on the surface is etched to the size of the component mounting pad. Then, a flat component mounting pad 8 having no via on the surface is formed.
【0017】本発明の配線基板のパッド構造の第2実施
形態を図11〜図23を参照して説明する。図11は配
線基板のパッド構造の断面図、図12〜図23は配線基
板のパッド構造の製造工程の断面図を示す。図11にお
いて、11は感光性樹脂からなる基板で、この基板1上
に内部配線12が形成されている。この内部配線12上
には感光性樹脂層13が形成され、その一部にビア14
が形成されている。このビア14の内面及び感光性樹脂
層13の上面近傍には、銅、銀、金等の導電性に優れた
金属からなる層間接続用導電材料層15が形成されてお
り、この層間接続用導電材料層15の内部には、樹脂中
に銅、銀、金等の導電性に優れた金属粒子を混練した導
電性樹脂からなる導電性充填層6が充填されている。A second embodiment of the pad structure of the wiring board according to the present invention will be described with reference to FIGS. FIG. 11 is a cross-sectional view of the pad structure of the wiring board, and FIGS. 12 to 23 are cross-sectional views of the manufacturing process of the pad structure of the wiring board. In FIG. 11, reference numeral 11 denotes a substrate made of a photosensitive resin, on which an internal wiring 12 is formed. A photosensitive resin layer 13 is formed on the internal wiring 12, and a via 14
Are formed. In the inner surface of the via 14 and in the vicinity of the upper surface of the photosensitive resin layer 13, a conductive material layer 15 for interlayer connection made of a metal having excellent conductivity such as copper, silver, or gold is formed. The inside of the material layer 15 is filled with a conductive filling layer 6 made of a conductive resin in which metal particles having excellent conductivity such as copper, silver, and gold are kneaded in a resin.
【0018】また、感光樹脂層13の上面の他の箇所に
は、感光性樹脂からなる平坦層17が層間接続用導電材
料層15の上面と一致して平坦になるように形成されて
おり、これら平坦層17、層間接続用導電材料層15及
び導電性充填層16の上面に、部品実装用パッド18が
形成されている。Further, a flat layer 17 made of a photosensitive resin is formed at another portion of the upper surface of the photosensitive resin layer 13 so as to be flat in conformity with the upper surface of the conductive material layer 15 for interlayer connection, Component mounting pads 18 are formed on the upper surfaces of the flat layer 17, the interlayer-connecting conductive material layer 15, and the conductive filling layer 16.
【0019】次に、製造方法について説明する。まず、
図12に示したように、表層の基板11上に導電材料を
用いて内部配線12を形成する。この内部配線12の形
成方法としては、銅、銀、金等の導電性に優れた金属を
メッキする方法、これらの金属箔を貼り付け、内部配線
12に必要な部分だけを残して化学的又は機械的研磨を
行い余分な部分を削除する方法等がある。Next, the manufacturing method will be described. First,
As shown in FIG. 12, an internal wiring 12 is formed on a surface substrate 11 using a conductive material. As a method of forming the internal wiring 12, a method of plating a metal having excellent conductivity such as copper, silver, and gold, attaching these metal foils, and leaving only necessary portions for the internal wiring 12 chemically or There is a method of removing unnecessary portions by mechanical polishing.
【0020】次に、図13に示すように、内部配線12
の上から感光性樹脂を一定厚塗布して感光性樹脂層13
を形成した後、図14に示すように、感光性樹脂層13
を露光、現像して、内部配線12を表面に引き出すため
の下地となるビア14を形成する。Next, as shown in FIG.
The photosensitive resin layer 13 is formed by applying a photosensitive resin to a certain thickness from above.
After the formation of the photosensitive resin layer 13 as shown in FIG.
Is exposed and developed to form a via 14 serving as a base for drawing out the internal wiring 12 to the surface.
【0021】次に、図15に示すように、表面から銅、
銀金等の導電性に優れた金属をメッキして層間接続用導
電材料層15を形成した後、図16に示すように、層間
接続用導電材料15を必要な部分だけ残してエッチング
により削除する。そして、図17に示すように、上から
感光性樹脂を塗布して露光、現像を行い樹脂層を形成
し、その後、図18に示すように、露光、現像を行い、
ビア14の層間接続用導電材料層15を露出させる。そ
して、図19に示すように、表面の層間接続用導電材料
層15が露出するまで研磨して平坦にする。さらに、図
20に示すように、その上から導電性樹脂を塗布して凸
状になるくらいまでビア14を埋め込んだ後、硬化を行
う。Next, as shown in FIG.
After forming a conductive material layer 15 for interlayer connection by plating a metal having excellent conductivity such as silver or gold, as shown in FIG. 16, the conductive material 15 for interlayer connection is removed by etching while leaving only necessary portions. . Then, as shown in FIG. 17, a photosensitive resin is applied from above to perform exposure and development to form a resin layer, and then, as shown in FIG. 18, exposure and development are performed.
The conductive material layer 15 for interlayer connection of the via 14 is exposed. Then, as shown in FIG. 19, the surface is polished and flattened until the conductive material layer 15 for interlayer connection on the surface is exposed. Further, as shown in FIG. 20, a conductive resin is applied from above, the vias 14 are buried until the conductive resin becomes convex, and then curing is performed.
【0022】そして、図21に示すように、導電性樹脂
の表面が平坦になるまで研磨し導電性充填層16を形成
する。さらに、図22に示すように、その上から導電性
に優れた銅、金、銀等の金属材料をメッキ又は金属箔を
貼り付けて部品実装用パッド用の金属を形成した後、図
23に示すように、表面の金属部分を部品実装用パッド
のサイズにエッチングを行い表面状態の平坦な部品実装
用パッド18を形成する。Then, as shown in FIG. 21, the conductive resin is polished until the surface thereof is flat to form a conductive filling layer 16. Further, as shown in FIG. 22, a metal material having excellent conductivity, such as copper, gold, or silver, is plated or a metal foil is applied thereon to form a metal for a component mounting pad. As shown, the metal portion on the surface is etched to the size of the component mounting pad to form a flat component mounting pad 18 in a surface state.
【0023】本発明の配線基板のパッド構造の第3実施
形態を図24及び図25を参照して説明する。図24は
配線基板のパッド構造の断面図、図25は配線基板のパ
ッド構造の平面図を示す。図24において、21は感光
性樹脂からなる基板で、この基板21上に内部配線22
が形成されている。この内部配線22上には感光性樹脂
層23が形成され、その一部にビア24が形成されてい
る。このビア24の内面及び感光性樹脂層23の上面近
傍には、銅、銀、金等の導電性に優れた金属からなる層
間接続用導電材料層25が形成されている。そして、層
間接続用電動材料層25の凹部の周囲及び周縁部にソル
ダレジスト26の壁が形成されて、このソルダレジスト
26で挟まれた部分が部品実装用パッド27となってい
る。A third embodiment of the pad structure of the wiring board according to the present invention will be described with reference to FIGS. FIG. 24 is a sectional view of the pad structure of the wiring board, and FIG. 25 is a plan view of the pad structure of the wiring board. In FIG. 24, reference numeral 21 denotes a substrate made of a photosensitive resin.
Are formed. A photosensitive resin layer 23 is formed on the internal wiring 22, and a via 24 is formed in a part thereof. On the inner surface of the via 24 and near the upper surface of the photosensitive resin layer 23, a conductive material layer 25 for interlayer connection made of a metal having excellent conductivity such as copper, silver, or gold is formed. A wall of the solder resist 26 is formed around and around the concave portion of the electric material layer 25 for interlayer connection, and a portion sandwiched between the solder resists 26 is a component mounting pad 27.
【0024】このような配線基板のパッド構造では、部
品実装用パッド27上に印刷されたハンダペーストを溶
融する場合、ハンダが層間接続用導電材料層25の凹部
に流れ込まないようになっている。In such a pad structure of the wiring board, when the solder paste printed on the component mounting pads 27 is melted, the solder is prevented from flowing into the concave portions of the conductive material layer 25 for interlayer connection.
【0025】本発明の配線基板のパッド構造の第4実施
形態を図26を参照して説明する。図26は配線基板の
パッド構造の平面図を示す。この図に示す実施形態は、
基板、内部配線、感光性樹脂層及び層間接続用導電材料
層は、前記第3実施形態と同様である。この実施形態
は、ソルダレジスト31が層間接続用導電材料層32の
凹部を囲んで網目状に形成され、部品実装用パッド33
がほぼ正方形に細分化されている。A fourth embodiment of the pad structure of the wiring board according to the present invention will be described with reference to FIG. FIG. 26 is a plan view of the pad structure of the wiring board. The embodiment shown in this figure
The substrate, internal wiring, photosensitive resin layer, and conductive material layer for interlayer connection are the same as in the third embodiment. In this embodiment, a solder resist 31 is formed in a mesh shape surrounding a concave portion of a conductive material layer 32 for interlayer connection, and a pad 33 for component mounting is formed.
Is subdivided into almost squares.
【0026】[0026]
【発明の効果】以上説明したように本発明の配線基板の
パッド構造は、ビアのある位置に部品実装用パッドを形
成する場合であっても、ビアの凹部にハンダが流れ込む
ことが無く、ハンダの接続不良の無い信頼性の高い部品
実装が可能となる。As described above, according to the pad structure of the wiring board of the present invention, even when a component mounting pad is formed at a position where a via is present, the solder does not flow into the concave portion of the via and the solder does not flow. This allows highly reliable component mounting without connection failure.
【図1】本発明の配線基板のパッド構造の第1実施形態
の断面図を示す。FIG. 1 is a sectional view of a first embodiment of a pad structure of a wiring board according to the present invention.
【図2】本発明の配線基板のパッド構造の第1実施形態
の製造工程の断面図を示す。FIG. 2 is a sectional view showing a manufacturing process of the first embodiment of the pad structure of the wiring board according to the present invention.
【図3】本発明の配線基板のパッド構造の第1実施形態
の製造工程の断面図を示す。FIG. 3 is a sectional view showing a manufacturing step of the first embodiment of the pad structure of the wiring board according to the present invention;
【図4】本発明の配線基板のパッド構造の第1実施形態
の製造工程の断面図を示す。FIG. 4 is a sectional view showing a manufacturing process of the first embodiment of the pad structure of the wiring board according to the present invention;
【図5】本発明の配線基板のパッド構造の第1実施形態
の製造工程の断面図を示す。FIG. 5 is a sectional view showing a manufacturing step of the first embodiment of the pad structure of the wiring board according to the present invention;
【図6】本発明の配線基板のパッド構造の第1実施形態
の製造工程の断面図を示す。FIG. 6 is a sectional view showing a manufacturing process of the first embodiment of the pad structure of the wiring board of the present invention.
【図7】本発明の配線基板のパッド構造の第1実施形態
の製造工程の断面図を示す。FIG. 7 is a sectional view showing a manufacturing step of the first embodiment of the pad structure of the wiring board according to the present invention.
【図8】本発明の配線基板のパッド構造の第1実施形態
の製造工程の断面図を示す。FIG. 8 is a sectional view showing a manufacturing step of the first embodiment of the pad structure of the wiring board of the present invention.
【図9】本発明の配線基板のパッド構造の第1実施形態
の製造工程の断面図を示す。FIG. 9 is a sectional view showing a manufacturing step of the first embodiment of the pad structure of the wiring board of the present invention.
【図10】本発明の配線基板のパッド構造の第1実施形
態の製造工程の断面図を示す。FIG. 10 is a sectional view showing a manufacturing step of the first embodiment of the pad structure of the wiring board of the present invention.
【図11】本発明の配線基板のパッド構造の第2実施形
態の断面図を示す。FIG. 11 is a sectional view of a second embodiment of the pad structure of the wiring board according to the present invention.
【図12】本発明の配線基板のパッド構造の第2実施形
態の製造工程の断面図を示す。FIG. 12 is a sectional view showing a manufacturing step of the second embodiment of the pad structure of the wiring board according to the present invention.
【図13】本発明の配線基板のパッド構造の第2実施形
態の製造工程の断面図を示す。FIG. 13 is a sectional view showing a manufacturing step of the second embodiment of the pad structure of the wiring board of the present invention.
【図14】本発明の配線基板のパッド構造の第2実施形
態の製造工程の断面図を示す。FIG. 14 is a sectional view showing a manufacturing step of the second embodiment of the pad structure of the wiring board according to the present invention.
【図15】本発明の配線基板のパッド構造の第2実施形
態の製造工程の断面図を示す。FIG. 15 is a sectional view showing a manufacturing step of the second embodiment of the pad structure of the wiring board according to the present invention.
【図16】本発明の配線基板のパッド構造の第2実施形
態の製造工程の断面図を示す。FIG. 16 is a sectional view showing a manufacturing step of the second embodiment of the pad structure of the wiring board according to the present invention.
【図17】本発明の配線基板のパッド構造の第2実施形
態の製造工程の断面図を示す。FIG. 17 is a sectional view showing a manufacturing step of the second embodiment of the pad structure of the wiring board of the present invention.
【図18】本発明の配線基板のパッド構造の第2実施形
態の製造工程の断面図を示す。FIG. 18 is a sectional view showing a manufacturing step of the second embodiment of the pad structure of the wiring board of the present invention.
【図19】本発明の配線基板のパッド構造の第2実施形
態の製造工程の断面図を示す。FIG. 19 is a sectional view showing a manufacturing step of the second embodiment of the pad structure of the wiring board according to the present invention.
【図20】本発明の配線基板のパッド構造の第2実施形
態の製造工程の断面図を示す。FIG. 20 is a sectional view showing a manufacturing step of the second embodiment of the pad structure of the wiring board of the present invention.
【図21】本発明の配線基板のパッド構造の第2実施形
態の製造工程の断面図を示す。FIG. 21 is a sectional view showing a manufacturing step of the second embodiment of the pad structure of the wiring board according to the present invention.
【図22】本発明の配線基板のパッド構造の第2実施形
態の製造工程の断面図を示す。FIG. 22 is a sectional view showing a manufacturing step of the second embodiment of the pad structure of the wiring board of the present invention.
【図23】本発明の配線基板のパッド構造の第2実施形
態の製造工程の断面図を示す。FIG. 23 is a sectional view showing a manufacturing step of the second embodiment of the pad structure of the wiring board of the present invention.
【図24】本発明の配線基板のパッド構造の第3実施形
態の断面図を示す。FIG. 24 is a sectional view showing a third embodiment of the pad structure of the wiring board according to the present invention;
【図25】本発明の配線基板のパッド構造の第3実施形
態の平面図を示す。FIG. 25 shows a plan view of a third embodiment of the pad structure of the wiring board of the present invention.
【図26】本発明の配線基板のパッド構造の第4実施形
態の平面図を示す。FIG. 26 is a plan view of a fourth embodiment of the pad structure of the wiring board according to the present invention;
【図27】従来の配線基板の部分断面図を示す。FIG. 27 is a partial cross-sectional view of a conventional wiring board.
【図28】従来の配線基板の部分断面図を示す。FIG. 28 shows a partial cross-sectional view of a conventional wiring board.
【図29】従来の配線基板の部分断面図を示す。FIG. 29 shows a partial cross-sectional view of a conventional wiring board.
1,11,21 基板 2,12,22 内部配線 3,13,23 感光性樹脂層 4,14,24 ビア 5,15,25 層間接続用導電材料層 6 充填層 7,17 平坦層 8,18,27,33 部品実装用パッド 26,31 ソルダレジスト 1,11,21 substrate 2,12,22 internal wiring 3,13,23 photosensitive resin layer 4,14,24 via 5,15,25 interlayer connection conductive material layer 6 filling layer 7,17 flat layer 8,18 , 27,33 Component mounting pad 26,31 Solder resist
Claims (4)
層と、 層間接続用導電材料層の内部に充填された充填層と、 充填層及び層間接続用導電材料層上に形成された部品実
装用パッドとを有することを特徴とする配線基板のパッ
ド構造。1. A substrate, an internal wiring formed on the substrate, a photosensitive resin layer formed on the substrate and the internal wiring, a via formed in the photosensitive resin layer to expose the internal wiring, a via, and Interlayer connection conductive material layer formed on the photosensitive resin layer, filling layer filled inside the interlayer connection conductive material layer, and component mounting pad formed on the filling layer and the interlayer connection conductive material layer A pad structure for a wiring board, comprising:
請求項1記載の配線基板のパッド構造。2. The pad structure for a wiring board according to claim 1, wherein the filling layer is formed of a conductive resin.
層と、 層間接続用導電材料層の凹部の周囲に形成されたソルダ
レジストとを有し、感光性樹脂層上の層間接続用導電材
料層の部分が部品実装用パッドとなっていることを特徴
とする配線基板のパッド構造。3. A substrate, an internal wiring formed on the substrate, a photosensitive resin layer formed on the substrate and the internal wiring, a via formed in the photosensitive resin layer to expose the internal wiring, a via, The conductive material layer for interlayer connection formed on the photosensitive resin layer and the solder resist formed around the recess of the conductive material layer for interlayer connection have a conductive material layer for interlayer connection on the photosensitive resin layer. A pad structure for a wiring board, characterized in that parts are used as component mounting pads.
細分化されている請求項3記載の配線基板のパッド構
造。4. The wiring board pad structure according to claim 3, wherein the component mounting pad is subdivided by a solder resist.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8149551A JP2790124B2 (en) | 1996-06-11 | 1996-06-11 | Wiring board pad structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8149551A JP2790124B2 (en) | 1996-06-11 | 1996-06-11 | Wiring board pad structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH09331145A true JPH09331145A (en) | 1997-12-22 |
| JP2790124B2 JP2790124B2 (en) | 1998-08-27 |
Family
ID=15477642
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8149551A Expired - Lifetime JP2790124B2 (en) | 1996-06-11 | 1996-06-11 | Wiring board pad structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2790124B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20000036301A (en) * | 1999-11-17 | 2000-07-05 | 배영하 | Hole Pluging Land PCB and fabrcation method |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60130194A (en) * | 1983-12-16 | 1985-07-11 | 日立化成工業株式会社 | Method of producing circuit board |
| JPS63133695A (en) * | 1986-11-26 | 1988-06-06 | 三菱電機株式会社 | Printed wiring board |
| JPH0444293A (en) * | 1990-06-07 | 1992-02-14 | Matsushita Electric Ind Co Ltd | Printed circuit board |
| JPH0436271U (en) * | 1990-07-24 | 1992-03-26 | ||
| JPH066042A (en) * | 1992-06-22 | 1994-01-14 | Nec Corp | Manufacture of printed wiring board |
| JPH0878850A (en) * | 1994-09-08 | 1996-03-22 | Ibiden Co Ltd | Printed wiring board |
-
1996
- 1996-06-11 JP JP8149551A patent/JP2790124B2/en not_active Expired - Lifetime
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60130194A (en) * | 1983-12-16 | 1985-07-11 | 日立化成工業株式会社 | Method of producing circuit board |
| JPS63133695A (en) * | 1986-11-26 | 1988-06-06 | 三菱電機株式会社 | Printed wiring board |
| JPH0444293A (en) * | 1990-06-07 | 1992-02-14 | Matsushita Electric Ind Co Ltd | Printed circuit board |
| JPH0436271U (en) * | 1990-07-24 | 1992-03-26 | ||
| JPH066042A (en) * | 1992-06-22 | 1994-01-14 | Nec Corp | Manufacture of printed wiring board |
| JPH0878850A (en) * | 1994-09-08 | 1996-03-22 | Ibiden Co Ltd | Printed wiring board |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20000036301A (en) * | 1999-11-17 | 2000-07-05 | 배영하 | Hole Pluging Land PCB and fabrcation method |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2790124B2 (en) | 1998-08-27 |
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