JPH0936494A - Method for manufacturing compound semiconductor device - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To provide a means for realizing a favorable AlInAs / InP hetero interface in a method for manufacturing a compound semiconductor device. When a compound semiconductor device is manufactured by laminating an InAlAs layer and another compound semiconductor layer on an InP substrate or an InP layer by a metal organic vapor phase epitaxy (MOVPE) method, the InP substrate or the InP layer is formed on the InP substrate or the InP layer. I
An InAlAs layer is grown through an intermediate layer made of a compound semiconductor having a composition different from that of nP and InAlAs.
This intermediate layer is formed of InP whose lattice constant is substantially equal to InP.
InGaAs having a lattice constant different from that of GaAs crystal layer or GaAs having a film thickness equal to or less than a critical film thickness for occurrence of lattice mismatch dislocation due to difference in lattice constant, or InP
As crystal layer, or InGaAs layer having substantially the same lattice constant as InP, or In and Ga mainly III /
An InAlGaAs crystal layer containing a group V element is used.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a compound semiconductor device in which an InAlAs layer and another compound semiconductor layer are laminated on an InP substrate by a metal organic chemical vapor deposition method. In a conventional compound semiconductor device used for optical communication in the 1 μm band, an InP / InGaAsP / InP-DH (double hetero) structure has been used as a standard structure.

Here, the InP layer acts as a clad layer, and the InGaAsP layer acts as a light emitting layer or a light confining layer. However, because of the possibility of stronger confinement of injected carriers and light in the vicinity of the light emitting layer, InAlAs / InAlGaAs on the InP substrate using InAlAs for the cladding layer and the InAlGaAs layer for the light emitting layer and the light confining layer is used.
/ InAlAs basic structure has been tried in recent years. This structure has historically been formed by the molecular beam epitaxy method (MBE), but it is desirable to form it by the metal organic vapor phase epitaxy method (MOVPE) because of the mass productivity of the device.

The most important part in the crystal growth of this structure is how to form the InAlAs / InP hetero interface having the largest composition discontinuity.
It is an object of the present invention to provide a means for forming a good InAlAs / InP heterostructure by the E method.

[0004]

2. Description of the Related Art FIG. 4 is a schematic sectional view of a conventional compound semiconductor device. In this figure, 21 is n-type InP
(100) substrate, 22 n-type InP clad layer, 23 n-type AlInAs clad layer, 24 InAlGaAs
Light confinement layer, 25 is a multiple quantum well light emitting layer, and 26 is In
An AlGaAs optical confinement layer, 27 is a p-type AlInAs clad layer, 28 is a p-type InP clad layer, and 29 is a p-type contact layer.

In a conventional compound semiconductor device, an n-type InP (100) substrate 21, an n-type InP clad layer 22 that also functions as a buffer layer, and an n-type AlInAs are used.
Cladding layer 23, InAlGaAs optical confinement layer 24,
InAlGaAs / InAlGaA with different compositions
s multiple quantum well light emitting layer 25, InAlGaAs optical confinement layer 26, p-type AlInAs cladding layer 27, p-type In
P clad layer 28, p-type InGaAs contact layer 29
To grow.

In the structure of this conventional compound semiconductor device, the hetero interface having the largest composition discontinuity is n-type AlI.
These are the interfaces of the nAs clad layer 23 / n-type InP clad layer 22 and the p-type InP clad layer 28 / p-type AlInAs clad layer 27, and it is important to form these interfaces well in order to improve the crystallinity of the device.

[0007]

SUMMARY OF THE INVENTION The inventors of the present invention
It was found that MOVPE growth is difficult to grow AlInAs on the n-type AlInAs clad layer 23 / n-type InP clad layer 22 interface, that is, InP.

FIG. 5, FIG. 6, and FIG.
It is a microscope picture of the crystal structure of the surface of the AlInAs layer grown on the nP layer. In this case, the thickness of the InP buffer layer was 0.5 μm and the thickness of the AlInAs layer was 1 μm.

When the growth temperature is about 650 ° C., Al
The surface of the InAs layer is extremely rough, and
This means that it is difficult to grow lInAs / InP (see FIG. 5).

When the growth temperature was lowered to about 620 ° C. and the growth was performed, this state was improved to some extent, but many surface defects were still observed (see FIG. 6).

Further, when the growth temperature was lowered and the growth was carried out at about 590 ° C., a new kind of surface roughness was observed.
This means that it is difficult to grow a crystal containing a large amount of Al by low temperature growth (see FIG. 7). Thus, it is difficult to realize a good AlInAs / InP hetero interface by optimizing the growth temperature. An object of the present invention is to provide a means for realizing a good AlInAs / InP hetero interface.

[0012]

In order to solve the above-mentioned problems in the method of manufacturing a compound semiconductor device of the present invention, an InAlAs layer and another compound semiconductor are formed on an InP substrate or an InP layer by a metal organic chemical vapor deposition method. When a compound semiconductor device is manufactured by stacking layers, InAl is formed on the InP substrate or InP layer with an intermediate layer made of a compound semiconductor having a composition different from that of InP and InAlAs.
The step of growing the As layer was adopted.

In this case, an InGaAs crystal layer having substantially the same lattice constant as InP can be used as the intermediate layer.

Further, in this case, as the intermediate layer, GaAs having a film thickness equal to or less than the critical film thickness for occurrence of lattice mismatch dislocation due to difference in lattice constant, or InGaAs crystal layer having a lattice constant different from InP is used. You can

Further, in this case, as the intermediate layer, an InGaAsP crystal layer having a lattice constant substantially equal to that of InP, or InAlGa containing In and Ga as main group III elements.
An As crystal layer can be used.

Further, in the method of manufacturing a compound semiconductor device according to the present invention, In is formed by metalorganic vapor phase epitaxy.
When a compound semiconductor device is manufactured by laminating an InAlAs layer and another compound semiconductor layer on a P substrate, an InAlAs layer is used as a clad layer on the InP substrate or the InP layer, and a light emitting layer is formed on the InAlAs layer. In manufacturing a compound semiconductor light emitting device having the same, an InGaAs crystal layer having a lattice constant substantially equal to that of InP, GaAs having a film thickness equal to or less than a critical film thickness for occurrence of lattice mismatch dislocation due to a difference in lattice constant, or InAlAs via an InGaAs crystal layer having a lattice constant different from that of InP, an InGaAsP crystal layer having a lattice constant substantially the same as InP, or an intermediate layer made of an InAlGaAs crystal layer containing In and Ga as main III-V group elements. When the layer is grown, the absorption short wavelength of the intermediate layer is adjusted so that it becomes shorter than the emission wavelength of the light emitting layer. The step of changing the film thickness of the interlayer to a thin film quantum well was adopted.

[0017]

FIG. 1 is a diagram illustrating the principle of the method of manufacturing a compound semiconductor device according to the present invention. In this figure, 1 is an InP layer,
Reference numeral 2 is an intermediate layer such as InGaAs, and 3 is an AlInAs layer. In the method of manufacturing a compound semiconductor device of the present invention,
AlInAs layer 3 is grown on InP layer 1 to form AlIn
When the As / InP hetero interface is formed by the MOVPE method, AlInAs and InP are formed on the InP layer 1.
Through an intermediate layer 2 of InGaAs or the like having a composition different from
The lInAs layer 3 is grown.

As described above, by inserting a compound semiconductor layer having a composition different from that of AlInAs and InP as an intermediate layer at the AlInAs / InP hetero interface, the problem that the surface roughness occurs in the prior art is solved. It was experimentally found that the MOVPE method can be completely avoided.

FIG. 2 is a photomicrograph of the crystal structure of the surface of the AlInAs layer grown on the InP layer according to the present invention. This figure shows the AlInAs / InP hetero interface
The results of surface observation when an InGaAs thin film having a film thickness of 10 nm is inserted are shown. The growth temperature is 650 ° C., which is the maximum temperature in FIG. As seen in the figure, InGaA
By inserting the s thin film, the surface roughness seen in FIG. 5 disappeared completely, and good growth of the AlInAs layer on the InP layer 1 could be realized. The hillock pattern in the figure relates to threading dislocations of the InP substrate.
It has nothing to do with the growth of the nAs layer.

In the growth of the InP layer on the AlInAs layer, good crystal growth was possible without problems in the experimental temperature range (590 ° C. to 650 ° C.). In this way, AlI
Inserting an intermediate layer at the nAs / InP heterointerface
It has a great effect on improving the crystallinity, but the cause is unknown. However, the inventors have experimentally confirmed that the insertion layer is not limited to InGaAs and it is effective to insert a compound semiconductor layer having a small Al composition in the III-V group element. That is, the insertion layer is not limited to InGaAs, but may be InGaAsP or InAlG having a small Al composition.
It may be aAs. Further, if the film is sufficiently thin, a semiconductor layer such as GaAs having a lattice constant different from that of the substrate may be inserted.

[0021]

EXAMPLES Specific examples of the present invention will be described below with reference to the manufacture of a semiconductor laser for optical communication. (First Embodiment) FIG. 3 is an explanatory view of a method of manufacturing a compound semiconductor device of the first embodiment. In this figure, 11 is n
Type InP (001) plane oriented substrate, 12 n-type InP clad layer, 13 n-type AlInAs clad layer, and 14 I
nAlGaAs optical confinement layer, 15 InAlGaAs / InAlGaAs multiple quantum well light emitting layers having different compositions, 16 InAlGaAs optical confinement layer, 17 p
Is a p-type InP clad layer, 18 is a p-type InGaAs contact layer, and 20 is an n-type InGaAs intermediate layer.

In a semiconductor laser for optical communication which is a compound semiconductor device of one embodiment of the present invention, as shown in this figure, 0.5 μm is formed on an n-type InP (001) plane oriented substrate 11. N-type InP clad layer 12, n-type In
GaAs intermediate layer 20, 0.5 μm n-type AlInAs cladding layer 13, 0.1 μm InAlGaAs optical confinement layer 14, InAlGaAs / In having different compositions.
AlGaAs multiple quantum well emission layer 15, 0.1 μm I
nAlGaAs optical confinement layer 16, 0.5 μm p-type A
An lInAs clad layer 17, a 0.5 μm p-type InP clad layer 18, and a 0.3 μm p-type InGaAs contact layer 19 are formed.

In this case, the n-type InGaAs intermediate layer 20
Is preferably a thin film for reducing absorption loss of light emitted from a light emitting layer having a wavelength of 1.55 μm, for example. Especially, the thickness of the n-type InGaAs intermediate layer 20 is set to 1 nm.
If a thin film quantum well is formed to some extent, absorption loss can be eliminated by the quantum shift. That is, it is desirable to quantize the film thickness of the intermediate layer so that the absorption edge wavelength of the intermediate layer is shorter than the emission wavelength of the light emitting layer.

(Second Embodiment) In this embodiment, the intermediate layer is made of GaAs or In having a lattice constant different from that of InP.
GaAs. In this case, it is desirable to set the film thickness of the intermediate layer to a film thickness equal to or less than the critical film thickness for the occurrence of lattice mismatch dislocation due to the difference in lattice constant. When GaAs is used as the intermediate layer, it is necessary to reduce the thickness to about 1 or 2 molecular layers.

(Third Embodiment) In this embodiment, the intermediate layer is made of InP and G having substantially the same lattice constant as InP.
InAlGaAs containing a as a main group III element is used. In this case, as a result of an experiment in which (Al + Ga) of InAlGaAs was made constant and the content thereof was changed, it was found that the InP / InAlGaAs junction becomes difficult when Al exceeds several tens%.

In the method of manufacturing the compound semiconductor device of each of the above-mentioned embodiments, each semiconductor layer can be easily grown by the usual MOVPE method, and the raw material is, for example,
Trimethylindium (TMIn), triethylgallium (TEGa), trimethylaluminum (TMA)
l), phosphine (PH ₃ ), arsine (AsH ₃ ).
Is generally used, and hydrogen is generally used as a carrier gas.

In order to improve the crystallinity of the crystal containing Al, the growth temperature is raised to about 650 ° C., and the growth rate of each layer is set to about 1 μm per hour. V / III ratio is InP
About 100, about 50 for InAlAs,
For InAlGaAs, depending on the Al composition, 20 to
Adjust appropriately in the range of 50 and 20 for InGaAs
It is better to lower it.

When a GaAs crystal is used as the intermediate layer, the growth rate of the GaAs layer is set to 0.
It is preferable to reduce the speed to about 1 μm / h. By this setting, one molecular layer is grown in about 10 seconds, and the film thickness can be controlled sufficiently. In actual growth, the surface of the crystal substrate is washed with sulfuric acid, etc., treated with running water, and the substrate is placed in the growth chamber by vacuum transfer so that air is not mixed into the growth chamber. After the stabilization of, crystal growth is performed. This vacuum transfer is important, and good crystal growth is difficult even with the present invention when the atmosphere is mixed in the growth chamber.

[0029]

As described above, according to the present invention,
The MOVPE growth makes it possible to easily grow the InAlAs crystal on the InP crystal and improve the quality of the compound semiconductor device containing the AlInAs crystal.

[Brief description of drawings]

FIG. 1 is a diagram illustrating the principle of a method for manufacturing a compound semiconductor device according to the present invention.

FIG. 2 AlI grown on InP layer according to the present invention
It is a microscope picture of the crystal structure of the surface of an nAs layer.

FIG. 3 is an explanatory view of the method for manufacturing the compound semiconductor device of the first embodiment.

FIG. 4 is a schematic cross-sectional view of a conventional compound semiconductor device.

FIG. 5: Al grown on an InP layer by a conventional technique
It is a micrograph (1) of the crystal structure of the surface of an InAs layer.

FIG. 6 Al grown on an InP layer by a conventional technique.
It is a micrograph (2) of the crystal structure of the surface of an InAs layer.

FIG. 7: Al grown on an InP layer by a conventional technique
It is a micrograph (3) of the crystal structure of the surface of an InAs layer.

[Explanation of symbols]

1 InP layer 2 Intermediate layer such as InGaAs 3 AlInAs layer 11 n-type InP (001) plane oriented substrate 12 n-type InP clad layer 13 n-type AlInAs clad layer 14 InAlGaAs optical confinement layer 15 InAlGaAs / InAlGaAs multiple quantum well light emitting layer 16 InAlGaAs Optical confinement layer 17 p-type AlInAs clad layer 18 p-type InP clad layer 19 p-type InGaAs contact layer 20 n-type InGaAs intermediate layer 21 n-type InP (100) substrate 22 n-type InP clad layer 23 n-type AlInAs clad layer 24 InAlGaAs light Confinement layer 25 Multiple quantum well light emitting layer 26 InAlGaAs optical confinement layer 27 p-type AlInAs clad layer 28 p-type InP clad layer 29 p-type InGaAs contact layer

Claims (5)

[Claims] 1. When manufacturing a compound semiconductor device by laminating an InAlAs layer and another compound semiconductor layer on an InP substrate or an InP layer by a metal organic chemical vapor deposition method, the compound semiconductor device is manufactured on the InP substrate or the InP layer. InP and InA
A method of manufacturing a compound semiconductor device, which comprises a step of growing an InAlAs layer through an intermediate layer made of a compound semiconductor having a composition different from that of lAs. 2. The method of manufacturing a compound semiconductor device according to claim 1, wherein an InGaAs crystal layer having a lattice constant substantially equal to that of InP is used as the intermediate layer. 3. An intermediate layer having a lattice constant different from that of GaAs or InP having a film thickness equal to or less than a critical film thickness for occurrence of lattice mismatch dislocation due to a difference in lattice constant.
The method of manufacturing a compound semiconductor device according to claim 1, wherein a GaAs crystal layer is used. 4. An InGaAsP crystal layer having a lattice constant substantially equal to that of InP, or In and G as the intermediate layer.
The method of manufacturing a compound semiconductor device according to claim 1, wherein an InAlGaAs crystal layer containing a as a main group III element is used. 5. When a compound semiconductor device is manufactured by laminating an InAlAs layer and another compound semiconductor layer on an InP substrate by a metal organic chemical vapor deposition method, an InAlAs layer is clad on the InP substrate or the InP layer. In the case of manufacturing a compound semiconductor light emitting device having a light emitting layer on the InAlAs layer as a layer, an InGaAs crystal layer having a lattice constant substantially equal to that of InP, and a lattice mismatch dislocation caused by a difference in lattice constant are generated. InG having a lattice constant different from that of GaAs or InP having a thickness less than the critical thickness
When an InAlAs layer is grown through an intermediate layer composed of an aAs crystal layer, an InGaAsP crystal layer whose lattice constant is substantially equal to InP, or an InAlGaAs crystal layer containing In and Ga as a main group III element, A method for manufacturing a compound semiconductor device, comprising forming the thickness of the intermediate layer into a thin film quantum well so that the absorption short wavelength of the intermediate layer is shorter than the emission wavelength of the light emitting layer.