JPH0945864A - Resistance and hybrid integrated circuit device - Google Patents

Resistance and hybrid integrated circuit device

Info

Publication number
JPH0945864A
JPH0945864A JP7195085A JP19508595A JPH0945864A JP H0945864 A JPH0945864 A JP H0945864A JP 7195085 A JP7195085 A JP 7195085A JP 19508595 A JP19508595 A JP 19508595A JP H0945864 A JPH0945864 A JP H0945864A
Authority
JP
Japan
Prior art keywords
resistor
resistance element
diode
current
resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7195085A
Other languages
Japanese (ja)
Inventor
Ryoichi Takahashi
良一 高橋
Katsumi Okawa
克実 大川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP7195085A priority Critical patent/JPH0945864A/en
Publication of JPH0945864A publication Critical patent/JPH0945864A/en
Pending legal-status Critical Current

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  • Semiconductor Integrated Circuits (AREA)

Abstract

PROBLEM TO BE SOLVED: To lessen a resistor in area and power consumption protecting it against damage when a high voltage is applied to a hybrid integrated circuit device by a method wherein the resistor and a diode are connected in parallel between a first and a second electrode. SOLUTION: A diode D is composed of a P-type impurity diffusion layer 22 and an N-type silicon substrate 21, and the equivalent circuit of a resistance element is composed of a resistor 26 and the diode D connected in parallel between a first electrode 24 and a second electrode 25. When a current is made to flow through the above resistance element, a potential difference is induced between the electrodes 24 and 25, and when a potential difference is smaller than a conduction voltage of 0.6V, a current flows through the resistor 26, and when a potential difference is above 0.6V, a current flows through the diode D. Therefore, when the resistor 26 is so designed as to be capable of standing Q voltage of 0.6V or so, a current flows through the diode D but the resistor 26 when a potential difference is above 0.6V, so that the resistor 26 is protected against damage caused by an excess current or an excess voltage.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は抵抗素子及び混成集
積回路装置に関し、更に詳しく言えば、電流検出などに
用いられ、シリコン基体上に抵抗体が形成されてなる抵
抗素子と、その抵抗素子を搭載した混成集積回路装置の
改善に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a resistance element and a hybrid integrated circuit device. More specifically, the present invention relates to a resistance element used for current detection or the like, in which a resistance element is formed on a silicon substrate, and the resistance element. The present invention relates to improvement of a mounted integrated circuit device.

【0002】[0002]

【従来の技術】以下で、従来例に係る抵抗素子について
説明する。この抵抗素子は、混成集積回路装置に搭載さ
れる電流検出用の抵抗素子(以下これを電流検出抵抗と
称する)である。例えばモータの駆動回路を搭載した混
成集積回路装置の場合、モータに過電流が流れた場合に
はモータを保護するために回路の駆動を停止してしまう
などというように、モータに流れる電流を検出しつつ、
駆動制御を行うことが多い。
2. Description of the Related Art A resistance element according to a conventional example will be described below. The resistance element is a current detection resistance element (hereinafter referred to as a current detection resistance) mounted on the hybrid integrated circuit device. For example, in the case of a hybrid integrated circuit device equipped with a motor drive circuit, if the overcurrent flows in the motor, the circuit drive is stopped to protect the motor. While
Drive control is often performed.

【0003】その際、モータの接続端子に電流検出抵抗
を接続し、モータに流れる電流を電流検出抵抗で電圧変
換して、この電圧を制御回路に帰還させてモータに流れ
る電流の検出をしていた。特にモータに流れる電流を検
出する電流検出抵抗には、数Aから数十A程度と比較的
大きな電流が流れるので、図6に示すように、母体とな
る銅板(1)上に、接着樹脂(2)を用いて、銅とマン
ガンの合金である銅マンガリン材(3)を形成した抵抗
素子が用いられていた(以下でこれを銅基体の抵抗素子
と称する)。
At this time, a current detection resistor is connected to the connection terminal of the motor, the current flowing through the motor is converted into a voltage by the current detection resistor, and this voltage is fed back to the control circuit to detect the current flowing through the motor. It was In particular, a relatively large current of several A to several tens of A flows through a current detection resistor that detects a current flowing through the motor. Therefore, as shown in FIG. 6, an adhesive resin ( A resistance element in which a copper mangaline material (3) which is an alloy of copper and manganese is formed by using 2) has been used (hereinafter, this is referred to as a copper-based resistance element).

【0004】この銅マンガリン材(3)は、温度上昇に
よる抵抗素子値の変動が少なく、抵抗素子値のばらつき
も少なく、かつ低抵抗素子なので、高精度が要求される
電流検出抵抗の抵抗素子として用いるには非常に適した
材質であるが、図3に示すような銅基体の抵抗素子で
は、接着樹脂(2)を用いて銅板(1)上に銅マンガリ
ン材(3)を接着しており、コスト的に高価である問題
があった。
This copper mangaline material (3) is a resistance element of a current detection resistance which requires a high accuracy because the resistance element value does not fluctuate due to a temperature rise and the resistance element value does not vary much. It is a very suitable material to be used as, but in a copper-based resistance element as shown in FIG. 3, an adhesive resin (2) is used to bond a copper mangaline material (3) onto a copper plate (1). However, there is a problem that the cost is high.

【0005】そこで、図7に示すようにシリコン基体
(24)の上に、シリコン酸化膜(25)を形成し、そ
の上に抵抗素子である銅マンガリン材(26)をスパッ
タで形成し、所定のパターンにパターニングすることに
よって形成される抵抗素子が提案されている(以下でこ
れをシリコン基体の抵抗素子と称する)。これは銅板を
抵抗素子の基体として用いたものと異なり、接着樹脂を
要しないので熱劣化のおそれがなく、同じ形成面積の抵
抗素子でも大電流に対応することができ、また半導体デ
バイスの製造プロセスで製造することができるので、製
造が容易で量産にむき、コストも安く出来るなどという
利点があるので、今後の抵抗素子として注目されてい
る。
Therefore, as shown in FIG. 7, a silicon oxide film (25) is formed on a silicon substrate (24), and a copper mangaline material (26) which is a resistance element is formed thereon by sputtering. A resistance element formed by patterning into a predetermined pattern has been proposed (hereinafter referred to as a silicon-based resistance element). This is different from the one using a copper plate as the base of the resistance element, because it does not require adhesive resin, so there is no risk of thermal deterioration, and even resistance elements of the same formation area can handle large currents, and the manufacturing process of semiconductor devices Since it can be manufactured by, it has advantages such as easy manufacturing, suitable for mass production, and low cost.

【0006】図8に、このようなシリコン基体の抵抗素
子を電流検出抵抗として用いた混成集積回路装置の一部
を示す。この混成集積回路装置は、アルミ基板(12)
上に酸化アルミニウム膜(13),接着樹脂(14)が
順次形成された厚膜基板上に、銅箔からなる回路配線
(9A,9B,9C)が形成されている。回路配線(9
A)上には、半田(7B)で銅板(8)が接着され、そ
の上に半田(7A)で図7に示す構成を有する抵抗素子
(RB)のシリコン(6)が接着されている。銅板
(8)は、抵抗素子(RB)の放熱用に設けられてい
る。
FIG. 8 shows a part of a hybrid integrated circuit device using such a silicon-based resistance element as a current detection resistance. This hybrid integrated circuit device has an aluminum substrate (12).
Circuit wiring (9A, 9B, 9C) made of copper foil is formed on a thick film substrate on which an aluminum oxide film (13) and an adhesive resin (14) are sequentially formed. Circuit wiring (9
A copper plate (8) is adhered on A) by solder (7B), and silicon (6) of a resistance element (RB) having the configuration shown in FIG. 7 is adhered on it by solder (7A). The copper plate (8) is provided for heat dissipation of the resistance element (RB).

【0007】回路配線(9B,9C)は、この抵抗素子
(RB)への電流供給用の端子であって、抵抗素子(R
B)の抵抗素子である銅マンガリン材(26)の一端と
回路配線(9B)とはボンディングワイヤ(10A)で
ボンディングされ、銅マンガリン材(26)の他端と回
路配線(9C)とはボンディングワイヤ(10B)でボ
ンディングされている。また、銅マンガリン材(6)の
両端と不図示の制御回路とはボンディングワイヤ(11
C)でボンディングされている。
The circuit wirings (9B, 9C) are terminals for supplying a current to the resistance element (RB), and are connected to the resistance element (R).
B) One end of the copper mangaline material (26), which is a resistance element, and the circuit wiring (9B) are bonded with a bonding wire (10A), and the other end of the copper mangaline material (26) and the circuit wiring (9C). Are bonded by a bonding wire (10B). Further, both ends of the copper mangaline material (6) and the control circuit (not shown) are bonded to each other by a bonding wire (11
Bonded in C).

【0008】抵抗素子(RB)に電流を供給すると、そ
の電流は回路配線(9B)→銅マンガリン材(26)→
回路配線(9C)といった経路で流れ、銅マンガリン材
(26)の両端にかかる電位差が電圧変換された電流と
してボンディングワイヤ(11C)で不図示の制御回路
に伝達されて検出される。
When a current is supplied to the resistance element (RB), the current is circuit wiring (9B) → copper mangaline material (26) →
A potential difference across both ends of the copper mangaline material (26) flows through a path such as a circuit wiring (9C) and is transmitted to a control circuit (not shown) as a voltage-converted current by a bonding wire (11C) and detected.

【0009】[0009]

【発明が解決しようとする課題】しかしながら、実際に
上記の図7に示す抵抗素子を電流検出抵抗として用いた
場合、以下に示すような問題が生じる。すなわち、モー
タの電流検出などに用いる抵抗素子には、大電流が流
れ、面積のわりには高い電圧が印加される。
However, when the resistance element shown in FIG. 7 is actually used as the current detection resistance, the following problems occur. That is, a large current flows through the resistance element used for detecting the motor current, and a high voltage is applied instead of the area.

【0010】特に混成集積回路装置においては、縮小
化、集積化のために抵抗の面積はできるだけ小さく設計
したいという要求があるが、大電流が流れる抵抗の面積
を小さくすると過電流で素子破壊が生じるおそれがある
ので、ある程度抵抗の形成面積を大きめにとることが必
要になる。これが原因で集積化の妨げになり、また抵抗
が大きくなることで消費電力もまた必要以上に大きくな
ってしまうという問題が生じていた。
Particularly in a hybrid integrated circuit device, there is a demand to design the area of the resistance as small as possible for the purpose of miniaturization and integration. However, if the area of the resistance through which a large current flows is made small, the element is destroyed by an overcurrent. Therefore, it is necessary to increase the resistance forming area to some extent. This has hindered integration, and increased resistance increased power consumption more than necessary.

【0011】[0011]

【課題を解決するための手段】本発明は上記従来の欠点
に鑑み成されたもので、例えば図1に示すように、一導
電型の半導体基板と、前記半導体基板の表層に形成され
た逆導電型の不純物拡散層と、前記不純物拡散層上に形
成された第1の電極と、前記不純物拡散層の形成領域以
外の領域の前記半導体基板上に形成された第2の電極
と、前記第1の電極と第2の電極とに接続し、かつ絶縁
膜を介して前記半導体基板上に形成された抵抗体を有す
ることにより、チップ抵抗体の基板内にダイオードを設
けることで、高電圧が印加されたときに、抵抗体の破壊
を抑止しつつ、抵抗の形成面積の縮小化、消費電力の低
減が可能になる抵抗素子及びそれを搭載した混成集積回
路装置の提供を目的とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks of the prior art. For example, as shown in FIG. 1, a semiconductor substrate of one conductivity type and a reverse substrate formed on the surface layer of the semiconductor substrate are provided. A conductive type impurity diffusion layer, a first electrode formed on the impurity diffusion layer, a second electrode formed on the semiconductor substrate in a region other than a region where the impurity diffusion layer is formed, By providing the diode in the substrate of the chip resistor by connecting the first electrode and the second electrode and having the resistor formed on the semiconductor substrate via the insulating film, high voltage can be increased. An object of the present invention is to provide a resistance element and a hybrid integrated circuit device equipped with the resistance element, which can reduce the area where the resistance is formed and reduce the power consumption while suppressing the destruction of the resistor when applied.

【0012】本発明に係る抵抗素子によれば、図1に例
示するように、一導電型の半導体基板上に逆導電型の不
純物拡散層が形成されており、第1,第2の電極の間に
はダイオードが形成されていることになる。一方第1、
第2の電極間には抵抗体が接続されているので、結局第
1の電極と第2の電極の間には図2に示すように、抵抗
体とダイオードが並列接続されていることになる。
According to the resistance element of the present invention, as shown in FIG. 1, the impurity diffusion layer of the opposite conductivity type is formed on the semiconductor substrate of the one conductivity type, and the impurity diffusion layers of the first and second electrodes are formed. A diode is formed between them. On the other hand, first,
Since the resistor is connected between the second electrodes, the resistor and the diode are eventually connected in parallel between the first electrode and the second electrode as shown in FIG. .

【0013】このような抵抗素子に電流を流すとその両
端には電位差が生じるが、その電位差がダイオードの導
通電圧の0.6V以下では図3に示すように抵抗素子の
方に電流が流れ、この電位差が0.6V以上になるとダ
イオードが導通して図4に示すようにダイオードの方に
電流が流れる。したがって、抵抗体を0.6V程度の電
圧に耐えうるような大きさに設計しておけば、0.6V
以上になったときには電流は抵抗体の方に流れないの
で、抵抗体が過電流、高電圧で破壊することを抑止する
ことが可能になる。またダイオードは、半田を介して銅
材の上にあるので、ダイオードで発生する熱を有効に放
熱できる。
When a current is passed through such a resistance element, a potential difference is generated across the resistance element. If the potential difference is 0.6 V or less, which is the conduction voltage of the diode, a current flows through the resistance element as shown in FIG. When this potential difference becomes 0.6 V or more, the diode becomes conductive and a current flows in the diode as shown in FIG. Therefore, if the resistor is designed to withstand a voltage of about 0.6V, 0.6V
When the above is reached, the current does not flow toward the resistor, so that it is possible to prevent the resistor from being destroyed by overcurrent or high voltage. Further, since the diode is on the copper material via the solder, the heat generated by the diode can be effectively dissipated.

【0014】また、本発明に係る混成集積回路装置によ
れば、図5に例示するように、本発明に係る抵抗素子を
搭載しているので、素子破壊防止のために抵抗の形成面
積を大きめにとらなくとも抵抗素子の保護ができる。従
って、面積を小さくしてかつ素子破壊を防ぐことがで
き、さらに抵抗に比べてダイオードでは、同じ電流値で
あっても消費電力が小さくなるので、消費電力の低減も
可能になるので、縮小化、集積化のために抵抗の面積は
できるだけ小さく設計したいという要求がある混成集積
回路装置においては、特に有効である。
Further, according to the hybrid integrated circuit device of the present invention, as shown in FIG. 5, since the resistance element of the present invention is mounted, the resistance forming area is increased in order to prevent element destruction. The resistance element can be protected without taking care of it. Therefore, it is possible to reduce the area and prevent the element from being destroyed. Furthermore, compared to a resistor, a diode consumes less power even if the current value is the same. In particular, it is particularly effective in a hybrid integrated circuit device in which there is a demand for designing a resistance area as small as possible for integration.

【0015】[0015]

【発明の実施の形態】以下で、本発明の実施例に係る抵
抗素子について図面を参照しながら説明する。図1は本
実施例に係る抵抗素子の図であって、図2はその等価回
路図である。本実施例に係る抵抗素子は、図1に示すよ
うに、n型のシリコン基体(21)の表面にp型の不純
物拡散層(22)が形成され、その表面にシリコン酸化
膜(23)が形成され、p型の不純物拡散層(22)の
形成領域のシリコン基体(21)表面のシリコン酸化膜
(23)が選択除去されて、アルミからなる第1の電極
(24)が形成され、p型の不純物拡散層(22)の形
成領域以外の領域のシリコン基体(21)表面のシリコ
ン酸化膜(23)が選択除去されて、アルミからなる第
2の電極(25)が形成され、第1の電極(24)と第
2の電極(25)の間のシリコン酸化膜(23)上に、
第1の電極(24)と第2の電極(25)とに接続され
るように銅マンガリン材からなる抵抗体(26)が形成
されることで構成される。
BEST MODE FOR CARRYING OUT THE INVENTION A resistance element according to an embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram of a resistance element according to this embodiment, and FIG. 2 is an equivalent circuit diagram thereof. In the resistance element according to the present embodiment, as shown in FIG. 1, a p-type impurity diffusion layer (22) is formed on the surface of an n-type silicon substrate (21), and a silicon oxide film (23) is formed on the surface thereof. The silicon oxide film (23) formed and selectively removing the silicon oxide film (23) on the surface of the silicon substrate (21) in the formation region of the p-type impurity diffusion layer (22) forms the first electrode (24) made of aluminum. The silicon oxide film (23) on the surface of the silicon substrate (21) in a region other than the region where the mold type impurity diffusion layer (22) is formed is selectively removed to form a second electrode (25) made of aluminum. On the silicon oxide film (23) between the electrode (24) and the second electrode (25) of
A resistor (26) made of a copper mangaline material is formed so as to be connected to the first electrode (24) and the second electrode (25).

【0016】この抵抗素子は、第1,第2の電極(2
4,25)の間で、抵抗体(26)と並列にp型の不純
物拡散層(22)とn型のシリコン基体(21)の間で
ダイオード(D)が形成されており、その等価回路は図
2に示すように抵抗体(26)とダイオード(D)とが
並列接続されている。ここでN型基板の中にダイオード
が形成されているが、P型基板内にN型不純物拡散層が
形成されても良く、またP型の基板の上にN型のエピタ
キシャル層が形成され、このエビ層にP型の不純物拡散
層が形成されても良い。
This resistance element includes a first electrode (2) and a second electrode (2).
4, 25), a diode (D) is formed in parallel with the resistor (26) between the p-type impurity diffusion layer (22) and the n-type silicon substrate (21), and an equivalent circuit thereof is formed. As shown in FIG. 2, the resistor (26) and the diode (D) are connected in parallel. Although the diode is formed in the N-type substrate here, the N-type impurity diffusion layer may be formed in the P-type substrate, and the N-type epitaxial layer is formed on the P-type substrate. A P-type impurity diffusion layer may be formed in this shrimp layer.

【0017】このような抵抗素子に電流を流すと第1、
第2の電極(24,25)の間には電位差が生じるが、
その電位差がダイオード(D)の導通電圧の0.6V以
下では図3に示すように抵抗体(26)に電流が流れ、
この電位差が0.6V以上になるとダイオードが導通し
て図4に示すようにダイオード(D)に電流が流れる。
When a current is passed through such a resistance element, the first,
There is a potential difference between the second electrodes (24, 25),
When the potential difference is 0.6 V or less of the conduction voltage of the diode (D), current flows through the resistor (26) as shown in FIG.
When this potential difference becomes 0.6 V or more, the diode becomes conductive and a current flows through the diode (D) as shown in FIG.

【0018】したがって、抵抗体(26)を0.6V程
度の電圧に耐えうるように設計をしておけば、0.6V
以上になったときには図4に示すようにダイオード
(D)側の方に電流が流れ、抵抗体(26)には流れな
いので、過電流、高電圧で抵抗体(26)が破壊するこ
とを抑止することが可能になる。以下で、上記の抵抗素
子を搭載した混成集積回路装置の一例を示す。
Therefore, if the resistor (26) is designed to withstand a voltage of about 0.6V, 0.6V is required.
When the above is reached, a current flows toward the diode (D) side and does not flow into the resistor (26) as shown in FIG. 4, so it is possible to prevent the resistor (26) from being damaged by overcurrent or high voltage. It becomes possible to deter. An example of a hybrid integrated circuit device equipped with the above resistance element will be shown below.

【0019】この混成集積回路装置は図5に示すよう
に、アルミ基板(31)上に、第1の絶縁膜の一例であ
る酸化アルミニウム膜(32)が形成された厚膜基板上
に、銅箔からなる第1〜第3の回路配線(33A,33
B,33C)が形成されている。第1の回路配線(33
A)上には、半田(34)でヒートシンクとなる銅板
(35)が接着され、その上に半田(36)で図1に示
す抵抗素子のシリコン基体(21)が接着されている。
銅板(35)は、抵抗素子の熱を放熱するためのもので
ある。
In this hybrid integrated circuit device, as shown in FIG. 5, a copper film is formed on a thick film substrate having an aluminum oxide film (32), which is an example of a first insulating film, formed on an aluminum substrate (31). First to third circuit wirings (33A, 33A) made of foil
B, 33C) are formed. First circuit wiring (33
A copper plate (35) serving as a heat sink is adhered on A) with solder (34), and a silicon substrate (21) of the resistance element shown in FIG. 1 is adhered thereon with solder (36).
The copper plate (35) is for radiating the heat of the resistance element.

【0020】第2,第3の回路配線(33B,33C)
は、抵抗体(26)への電流供給用の端子である。抵抗
体(26)の一端と第1の回路配線(33B)とはボン
ディングワイヤ(37B)でボンディングされ、抵抗体
(26)の他端と第2の回路配線(33C)とはボンデ
ィングワイヤ(37A)でボンディングされている。
Second and third circuit wiring (33B, 33C)
Is a terminal for supplying a current to the resistor (26). One end of the resistor (26) and the first circuit wiring (33B) are bonded by a bonding wire (37B), and the other end of the resistor (26) and the second circuit wiring (33C) are bonded by a bonding wire (37A). ) Is bonded with.

【0021】抵抗(RB)に電流を供給すると、その電
流は第2の回路配線(33B)→抵抗体(26)→第3
の回路配線(33C)といった経路で流れ、抵抗体(2
6)の両端にかかる電位差が電圧変換された電流として
不図示の制御回路に伝達されて検出される。このような
抵抗素子には、最大電流を考えて通常0.3〜0.4V
程度の電圧が印加されるように、抵抗値が選定される。
この範囲では抵抗素子の抵抗体(26)の方に電流は流
れるが、何らかの原因でそれ以上の電圧が印加されて、
ダイオードの導通電圧の0.6Vを超えると、ダイオー
ドが導通してダイオードの方に電流が流れ、抵抗体(2
6)の方には電流は流れないので、抵抗体(26)を
0.6V程度の電圧に耐えうるように設計をしておけ
ば、過電流、高電圧で抵抗体(26)が破壊することを
抑止することが可能になる。
When a current is supplied to the resistor (RB), the current is supplied to the second circuit wiring (33B) → resistor (26) → third.
The circuit wiring (33C) of the
The potential difference across both ends of 6) is transmitted as a voltage-converted current to a control circuit (not shown) and detected. Considering the maximum current, such a resistance element is usually 0.3 to 0.4V.
The resistance value is selected so that a certain voltage is applied.
In this range, current flows toward the resistor (26) of the resistance element, but a voltage higher than that is applied for some reason,
When the diode conduction voltage of 0.6 V is exceeded, the diode conducts and a current flows toward the diode, and the resistor (2
No current flows in 6), so if the resistor (26) is designed to withstand a voltage of about 0.6V, the resistor (26) will be destroyed by overcurrent or high voltage. It becomes possible to suppress that.

【0022】特に混成集積回路装置においては、縮小
化、集積化のために抵抗の面積はできるだけ小さく設計
したいという要求があるが、上記の抵抗素子をこれに用
いることにより、素子破壊防止のために程度抵抗の形成
面積を大きめにとらなくとも素子の保護ができるので、
面積を小さくしてかつ素子破壊を防ぐことができ、さら
に、抵抗に比べてダイオードでは同じ電流値でも消費電
力が小さくなるので、消費電力の低減も可能になるの
で、有効である。
In particular, in a hybrid integrated circuit device, there is a demand to design the area of the resistance as small as possible for the purpose of miniaturization and integration, but by using the above resistance element for this purpose, it is possible to prevent element destruction. Since it is possible to protect the element without taking a large resistance formation area,
This is effective because the area can be reduced and element destruction can be prevented. Further, the power consumption of the diode is smaller than that of the resistor even at the same current value, so that the power consumption can be reduced.

【0023】なお、本実施例では抵抗体(26)の材料
として銅マンガリン材を用いているが本発明はこれに限
らず、カーボンやセラミックなどを用いた、一般的な抵
抗体を用いても同様の効果を奏する。また、本実施例で
は混成集積回路装置に搭載する際に、この抵抗素子を電
流検出抵抗として用いているが本発明はこれに限らず、
他の箇所に用いられる抵抗に適用しても、同様の効果を
奏する。
In the present embodiment, the copper mangaline material is used as the material of the resistor (26), but the present invention is not limited to this, and a general resistor using carbon, ceramic or the like is used. Also has the same effect. Further, in the present embodiment, when mounted on the hybrid integrated circuit device, this resistance element is used as a current detection resistance, but the present invention is not limited to this.
The same effect can be obtained by applying it to a resistor used in other places.

【0024】[0024]

【発明の効果】以上説明したように本発明に係る抵抗素
子によれば、第1の電極と第2の電極の間には抵抗体と
ダイオードが並列接続されていることになるので、抵抗
体を0.6V程度の電圧に耐えうるような大きさに設計
しておけば、0.6V以上になったときには電流は抵抗
体の方に流れないので、抵抗体が過電流で破壊すること
を抑止することが可能になる。またダイオードの放熱効
果が高いので、過電流にも耐えられる。
As described above, according to the resistance element of the present invention, the resistor and the diode are connected in parallel between the first electrode and the second electrode. Is designed to withstand a voltage of about 0.6V, the current will not flow to the resistor when the voltage exceeds 0.6V, so the resistor may be destroyed by overcurrent. It becomes possible to deter. Moreover, since the heat dissipation effect of the diode is high, it can withstand overcurrent.

【0025】また、本発明に係る混成集積回路装置によ
れば、本発明に係る抵抗素子を搭載しているので、素子
破壊防止のために抵抗の形成面積を大きめにとらなくと
も抵抗素子の保護ができ、面積を小さくしてかつ素子破
壊を防ぐことができ、さらに消費電力の低減も可能にな
るので、縮小化、集積化のために抵抗の面積はできるだ
け小さく設計したいという要求がある混成集積回路装置
においては、特に有効である。
Further, according to the hybrid integrated circuit device of the present invention, since the resistance element of the present invention is mounted, the resistance element is protected even if the resistance forming area is not large in order to prevent element destruction. Since it is possible to reduce the area and prevent element destruction and further reduce power consumption, there is a demand for designing the resistance area as small as possible for miniaturization and integration. This is particularly effective in circuit devices.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例に係る抵抗素子を説明する断面
図である。
FIG. 1 is a cross-sectional view illustrating a resistance element according to an exemplary embodiment of the present invention.

【図2】本発明の実施例に係る抵抗素子の等価回路図で
ある。
FIG. 2 is an equivalent circuit diagram of a resistance element according to an exemplary embodiment of the present invention.

【図3】本発明の実施例に係る抵抗素子の動作を説明す
る第1の図である。
FIG. 3 is a first diagram illustrating the operation of the resistance element according to the exemplary embodiment of the present invention.

【図4】本発明の実施例に係る抵抗素子の動作を説明す
る第2の図である。
FIG. 4 is a second diagram illustrating the operation of the resistance element according to the exemplary embodiment of the present invention.

【図5】本発明の実施例に係る混成集積回路装置を説明
する断面図である。
FIG. 5 is a sectional view illustrating a hybrid integrated circuit device according to an embodiment of the present invention.

【図6】銅基体の抵抗素子を説明する図面である。FIG. 6 is a diagram illustrating a resistance element of a copper base.

【図7】シリコン基体の抵抗素子を説明する図面であ
る。
FIG. 7 is a diagram illustrating a silicon-based resistance element.

【図8】従来例に係る混成集積回路装置の斜視図であ
る。
FIG. 8 is a perspective view of a hybrid integrated circuit device according to a conventional example.

【符号の説明】[Explanation of symbols]

(21) シリコン基体 (22) 不純物拡散層 (23) シリコン酸化膜 (24) 第1の電極 (25) 第2の電極 (26) 抵抗体 (31) アルミ基板 (32) 酸化アルミニウム膜 (33A) 第1の回路配線 (33B) 第2の回路配線 (33C) 第3の回路配線 (29B) 第2の回路配線 (34,36) 半田 (35) 銅板 (37A,37B)ボンディングワイヤ (21) Silicon substrate (22) Impurity diffusion layer (23) Silicon oxide film (24) First electrode (25) Second electrode (26) Resistor (31) Aluminum substrate (32) Aluminum oxide film (33A) First circuit wiring (33B) Second circuit wiring (33C) Third circuit wiring (29B) Second circuit wiring (34, 36) Solder (35) Copper plate (37A, 37B) Bonding wire

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 半導体基板上に絶縁膜を介して抵抗体を
形成し、これをチップ抵抗として活用する抵抗素子にお
いて、 前記抵抗体の両端とコンタクトする第1の電極および第
2の電極の間には、前記半導体基板内に形成されたダイ
オードが接続されて成ることを特徴とする抵抗素子。
1. A resistance element in which a resistor is formed on a semiconductor substrate via an insulating film and utilized as a chip resistor, wherein a first electrode and a second electrode contacting both ends of the resistor are provided. A resistor formed by connecting a diode formed in the semiconductor substrate to the.
【請求項2】 請求項1記載の抵抗素子が搭載されたこ
とを特徴とする混成集積回路装置。
2. A hybrid integrated circuit device having the resistance element according to claim 1 mounted therein.
JP7195085A 1995-07-31 1995-07-31 Resistance and hybrid integrated circuit device Pending JPH0945864A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7195085A JPH0945864A (en) 1995-07-31 1995-07-31 Resistance and hybrid integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7195085A JPH0945864A (en) 1995-07-31 1995-07-31 Resistance and hybrid integrated circuit device

Publications (1)

Publication Number Publication Date
JPH0945864A true JPH0945864A (en) 1997-02-14

Family

ID=16335301

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7195085A Pending JPH0945864A (en) 1995-07-31 1995-07-31 Resistance and hybrid integrated circuit device

Country Status (1)

Country Link
JP (1) JPH0945864A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020202355A (en) * 2019-06-13 2020-12-17 富士電機株式会社 Resistor element
WO2025140234A1 (en) * 2023-12-25 2025-07-03 苏州能讯高能半导体有限公司 Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2020202355A (en) * 2019-06-13 2020-12-17 富士電機株式会社 Resistor element
WO2025140234A1 (en) * 2023-12-25 2025-07-03 苏州能讯高能半导体有限公司 Semiconductor device

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