JPH0955870A - Video signal processing circuit and video monitor using the same - Google Patents

Abstract

(57) [Summary] [Problem] In the method of changing the deflection angle, there is a limit to the phase adjustment of the video signal, and the adjustment after the completion of the set is impossible unless the service person. In a video signal processing circuit for giving a predetermined delay time to an input video signal, in addition to a basic delay output section of a delay element, a plurality of intermediate output sections are provided before and after the basic delay output section of the delay element. The selector 12 selectively outputs one of the delayed video signals derived from the basic delay output unit and the plurality of intermediate output units.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video signal processing circuit for giving a predetermined delay time to an input video signal and a video monitor using the same.

[0002]

2. Description of the Related Art In a television signal processing system, a received video signal is input to a cathode ray tube through a color signal reproduction circuit system, and a synchronizing signal is input to a cathode ray tube through a deflection (synchronization) circuit system. Here, since the group delays in the color signal reproduction circuit system and the deflection circuit system are different, a phase shift of the synchronizing signal occurs with respect to the video signal. Therefore, conventionally, the deflection circuit system delays the synchronization signal to match the phase of the synchronization signal with the video signal.

[0003]

As described above, in the case where the phase adjustment is performed by delaying the synchronizing signal and changing the deflection angle in the deflection circuit system, if the adjustment amount (deflection angle) is too large, the end of the cathode ray tube will be lost. Will distort the screen. Therefore, there is a limit to the adjustment, and it is impossible for a service person to adjust the set after it is completed.

On the other hand, one of the features of high-definition televisions with an aspect ratio of 16: 9, which has recently been on the market, is a two-screen configuration. This is to split the screen into two and to display separate images as one.
It is displayed on one monitor. In this case, there is a problem of time lag between the respective images and the horizontal blanking period. Even in the case of correcting this time shift, there has been the same problem as in the above case because the conventional method has dealt with the deflection adjustment.

Therefore, the present invention provides a video signal processing circuit in which the phase of the video signal can be easily adjusted, the adjustment range can be set wide, and the adjustment can be easily performed even after the completion of the set, and a video monitor using the same. The purpose is to

[0006]

According to the present invention, in a video signal processing circuit for giving a predetermined delay time to an input video signal, in addition to a basic delay output section of a delay element, a plurality of intermediate output sections before and after the basic delay output section. Is provided, and one of the delayed video signals derived from the basic delay output section and the plurality of intermediate output sections of the delay element is selectively output by the selecting means.

Further, according to the present invention, in a video monitor provided with a color signal reproducing section for reproducing the received video signal and a cathode ray tube for projecting an image based on the video signal processed by the color signal reproducing section, a basic delay is provided. A delay element having an output section and a plurality of intermediate output sections before and after the output section, and selectively outputting one of a delay video signal derived from the basic delay output section of the delay element and the plurality of intermediate output sections. A signal processing circuit including selection means is provided in the color signal reproducing section.

[0008]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of a video signal processing circuit according to the present invention. In FIG. 1, the delay element 11 is, for example, a CCD (Charg
e Coupled Device), and a video signal is input to its input section by a signal input method such as a diode cutoff method. The basic delay time of the delay element 11 is set to 1H (one horizontal scanning period), for example.

As an output section of the delay element 11, -n,
..., 1, 0, +1, ..., + n output positions are provided. Of these (2n + 1) output positions, 0 is a basic delay output unit for deriving a delayed video signal obtained by delaying the input video signal by 1H, and n output positions before and after that are intermediate output units. Each delay output section has, for example, a floating gate configuration capable of nondestructively reading signal charges. The time difference between the delay output units can be set to 1 / (clock frequency) with the minimum (in 1-bit steps), and can be set to n times the minimum time difference with n-bit (n is an integer) steps.

Each delay signal derived from the basic delay output section of the delay element 11 and intermediate output sections before and after the basic delay output section is selected by a selector (selecting means) 12 and the output circuit 1
3 is output as a delayed video signal. As a result, as shown in FIG. 2, a leading output (c) and a delayed output (d) are obtained with respect to the normal output (b) obtained by delaying the input video signal (a) by 1H. Further, the amount of advance and the amount of delay are determined by the take-out position of the intermediate output section.

As described above, in addition to the basic delay output section of the delay element 11, a plurality of intermediate output sections are provided before and after the basic delay output section, and the basic delay output section and the intermediate output sections of the delay element 11 are derived. Since one of the delayed video signals is selectively output by the selector 12, the temporal position of the video signal after the signal processing can be adjusted. In particular, in the past, it was possible to delay only the basic delayed video signal, but it is also possible to advance in time.

FIG. 3 is a block diagram showing a configuration of a television signal processing system of a video monitor using the video signal processing circuit according to the present embodiment having the above configuration. In this television signal processing system, the video signal received by the receiving unit 31 is input to the cathode ray tube 33 through the color signal reproducing unit 32. In addition, the sync signal separated from the video signal is deflected (synchronized).
It is input to the cathode ray tube 33 through the circuit 34. Here, since the group delays in both the color signal reproducing section 32 and the deflection circuit 34 are different, a phase shift of the synchronizing signal occurs with respect to the video signal.

In order to correct this phase shift, the video signal processing circuit 35 having the above configuration is provided in the color signal reproducing section 32. Then, in the video signal processing circuit 35, the selector 12 shown in FIG. 1 selects an appropriate delayed video signal, so that the cathode ray tube 33 of the video signal after the signal processing is selected.
The position adjustment (phase adjustment) above is possible. According to this, even if the adjustment amount is large, the screen is not distorted at the end of the cathode ray tube 33 as in the case of changing the conventional deflection angle, and the adjustment can be easily performed by the selector 12 even after the set is completed. Since it can be realized, it is possible to cope with deterioration of the cathode ray tube 33 and aging of the processing circuit system.

By the way, in the color signal reproducing section 32 in the television signal processing system, particularly in the PAL / SECAM signal system, a delay element of 1H is always used in order to remove transmission distortion of the signal. Therefore, by using the above-described video signal processing circuit according to the present embodiment instead of the 1H delay element, it is possible to remove the transmission distortion of the signal with a single delay element, and also to obtain the video signal after the signal processing. It is possible to adjust the position on the monitor.

On the other hand, also in the NTSC signal system, a 1H delay element is used for the purpose of crosstalk removal or the like for the processing of color difference signals. Therefore, as in the case of the PAL / SECAM signal system, by using the video signal processing circuit according to the present embodiment instead of the delay element of 1H,
In addition to the effect of crosstalk removal and the like being obtained by a single delay element, it is possible to adjust the position of the video signal after signal processing on the monitor.

Next, a case where the present invention is applied to a television signal processing system of a high-definition television having an aspect ratio of 16: 9 will be described. One of the features of this high-definition television is the two-screen configuration shown in FIG. 4, as described above. When this signal processing is attempted to be realized by an analog circuit system, a delay element of 1.5H to 2H is used, and the clock frequency of this delay element has a double ratio between the signal input and the signal output. Make something. As a result, the video signal is compressed. As an example, 5MHz at signal input
When the clock is input to the delay element and the signal is output, the clock frequency is changed to 10 MHz, which is twice that. As a result, the video signal is compressed in half the time.

FIG. 5 is a block diagram showing the configuration of another embodiment of the present invention when used for this time compression. In this embodiment, the case where two images are displayed on one screen is shown. In FIG. 5, the delay element 51 has, for example, a 1H basic delay output section and intermediate output sections before and after it, and a 1.25H basic delay output section and intermediate output sections before and after it. Each delay output section has, for example, a floating gate configuration, as in the case of the previous embodiment.

Each of the delayed outputs of the 1H basic delay output section and the intermediate output sections before and after it is selected by the selector 52, and the delayed output of the 1.25H basic delay output section and the intermediate output sections before and after it is selected by the selector 53. To be selected. Then, the respective outputs of the respective selectors 52 and 53 are selected by the selector 54 and output as a delayed video signal through the output circuit 55.

In the video signal processing circuit having the above structure, up to the 1H output (delay) portion of the delay element 51, as shown in FIG. 6, the input video signal is fetched by the clock of frequency αHz, and when it is output, it is 2αHz. And the clock.
As an example, when the extraction of each delay output unit is in 10-bit units, the clock frequency at the time of acquisition is 7 MHz and the clock frequency at the time of output is 14 MHz. As a result, as shown in FIG. 7, the output video signal (b) is
The input video signal (a) is output in half the time, resulting in time compression. Further, by making the delay amount of 1.25H similar to that of the 1H output unit, it becomes possible to output the compressed video signal (c) in the latter half of the 1H period.

As a result, as shown in FIG. 4, two images can be displayed on one screen. Then, by selecting the delay output section in each of the 1H output section and the 1.25H output section in the same manner as in the previous embodiment, it is possible to adjust the temporal position of the video signal after the signal processing. Becomes In particular, when outputting the video signal to the second half, it is possible to adjust the overlap with the video of the first half or the right end of the screen by selecting each delay output in the 1.25H output. .

As described above, in the television signal processing system capable of displaying two images on one screen, the image after the signal processing is performed by appropriately selecting the delay time for each of the 1H delay output and the 1.25H delay output. The time position of the signal can be adjusted, and the adjustment is not fixed but variable if necessary, so that deterioration of the cathode-ray tube or aging of the silicon circuit system may cause, for example, the overlap of the images in the first half and the second half. Even if a problem occurs, it can be dealt with.

In each of the above embodiments, the case where the delay element having the basic delay time of 1H is used has been described, but the invention is not limited to this, and the basic delay time of the delay element can be set arbitrarily. is there.

[0023]

As described above, according to the present invention,
In the video signal processing circuit that gives a predetermined delay time to the input video signal, in addition to the basic delay output section of the delay element,
By providing a plurality of midway output sections before and after that, and selectively outputting one of the delayed video signals derived from the basic delay output section and the plurality of midway output sections of this delay element, The temporal position of the video signal after signal processing is
It is possible to adjust not only in the direction to delay in time but also in the direction to advance.

Further, in the video monitor equipped with the color signal reproducing section for reproducing the received video signal and the cathode ray tube for projecting an image based on the video signal reproduced by the color signal reproducing section, the basic delay output section is provided. A delay element having a plurality of intermediate output sections before and after it is provided in the color signal reproducing section, and one of the basic delay output section of this delay element and each delayed video signal derived from the plurality of intermediate output sections is selected. Since it is possible to adjust the temporal position of the video signal after signal processing, the phase of the video signal can be easily adjusted, the adjustment range can be set wide, and even after the set is completed. It will be easy to adjust.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a video signal processing circuit according to the present invention.

FIG. 2 is a diagram showing each output form of a delayed video signal with respect to an input video signal.

FIG. 3 is a block diagram showing a configuration of a television signal processing system according to the present invention.

FIG. 4 is a diagram showing a two-screen configuration.

FIG. 5 is a block diagram showing another embodiment of a video signal processing circuit according to the present invention.

FIG. 6 is a clock waveform diagram of the delay element at the time of data acquisition and data output.

FIG. 7 is an input / output waveform diagram in the case of a two-screen configuration.

[Explanation of symbols]

 11,51 Delay element 12,52,53,54 Selector 13,55 Output circuit

Claims (4)

[Claims] 1. A video signal processing circuit for giving a predetermined delay time to an input video signal, the delay element having a basic delay output section and a plurality of intermediate output sections before and after the basic delay output section, and a basic delay of the delay element. A video signal processing circuit comprising: an output unit and a selection unit that selectively outputs one of the delayed video signals derived from a plurality of intermediate output units. 2. The video signal processing circuit according to claim 1, wherein the frequency of the clock when the signal is input to the delay element and the frequency of the clock when the signal is output are different. 3. A video monitor provided with a color signal reproducing section for reproducing the received video signal and a cathode ray tube for projecting an image based on the video signal processed by the color signal reproducing section. The reproducing unit includes one of a delay element having a basic delay output unit and a plurality of intermediate output units before and after the basic delay output unit, and one of delay video signals derived from the basic delay output unit and the multiple intermediate output units of the delay element. A video monitor having a signal processing circuit including selection means for selectively outputting the video signal. 4. The video monitor according to claim 3, wherein the clock when the signal is input to the delay element and the clock when the signal is output are different in frequency.