JPH0964397A - Solar cells and solar cell modules - Google Patents

Abstract

(57) Abstract: To provide a highly reliable solar cell and a solar cell module, which suppresses the occurrence of a short circuit of the solar cell module due to partial light blocking under high humidity. A solar cell of the present invention includes an n-type semiconductor,
When the i-type semiconductor is i and the p-type semiconductor is p, the tandem solar cell element in which a plurality of nip or pin junctions made of a silicon-based non-single-crystal semiconductor are stacked on a conductive substrate, and the solar cell element In a solar cell including a bypass diode connected in parallel with the solar cell element so as to be electrically opposite, the bypass diode is formed of a silicon-based non-single-crystal semiconductor deposited and formed on the conductive substrate. It is characterized by being an in- or ip-junction diode element. The solar cell module of the present invention is characterized in that a plurality of the above solar cells are connected in series.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a solar cell and a solar cell module. More specifically, the present invention relates to a solar cell and a solar cell module provided with a bypass diode connected in parallel with the solar cell element so as to be electrically opposite to the solar cell element.

[0002]

2. Description of the Related Art Currently, power solar cells are generally modularized in the form of an element array in which a plurality of hidden battery elements are connected in series.

When operating in series, when some elements of the element array are in shadow, the total of the voltages generated by the other power-generating elements is applied to the shadowed elements in the form of reverse voltage. However, when the reverse voltage exceeds the breakdown voltage of the element, the element is broken.

As a method for preventing the destruction of elements due to such partial light blocking, there is known a method in which a so-called bypass diode is connected in parallel to each element connected in series in a reverse direction. Has been done. Further, a bypass diode is also formed at the same time as a photovoltaic element, and even in a solar cell using a non-single crystal semiconductor, some techniques for forming the bypass diode on the same substrate have been proposed.

Japanese Patent Publication No. 63-13358 discloses a solar cell using amorphous silicon deposited on an insulating substrate.
A technique of forming a bypass diode by separating a part of an element and connecting electrodes in opposite directions is disclosed. Special Fairness 2-
Japanese Patent No. 5575 discloses a technique of separately forming an amorphous silicon solar cell and a Schottky barrier diode on the same substrate.

By connecting the bypass diode in parallel to each solar cell element in this way, even if a part of the element array is shaded, the shaded element is more than the forward voltage of the bypass diode. Since no reverse voltage is applied, it is possible to prevent destruction of the solar cell element due to high voltage application.

However, even if the bypass diode is connected as described above, the partially shaded solar cell element may be short-circuited under certain conditions.

That is, the forward voltage of the bypass diode is about 0.
A reverse voltage of this level is applied to the solar cell element that is partially shielded from light at about 8V. Usually, a voltage of this level does not cause a short circuit in the amorphous silicon solar cell element, but when a metal that is easily ionized and moves is used as the electrode or the back surface reflection film of the solar cell element, the semiconductor film of the solar cell element is used. In the state where water enters through the edge of the film, cracks, pinholes, etc., metal ions move in the semiconductor film even at this level of voltage, forming a partial conductive path in the semiconductor film, causing a short circuit. There is a problem that a dangerous state occurs because an electric circuit is generated.

In the following, an Ag layer having a high reflectance is formed as a light reflecting layer on the back surface on a conductive substrate, and n, i, p-type semiconductor layers of amorphous Si are laminated in this order, Further, the case of a solar cell element having a transparent electrode formed thereon will be taken up and the above problem will be described more specifically.

In a solar cell using a non-single crystal silicon semiconductor, a p-type semiconductor layer is arranged on the light incident side.
The p-junction structure is the mainstream, and in order to effectively utilize incident light to increase the amount of generated current, a back surface light reflection layer that reflects the light once transmitted through the semiconductor layer on the back surface is often formed. This example is a configuration of a very general solar cell element.

In such a solar cell element, when the entire surface is normally irradiated with light during power generation, a negative voltage is generated on the side of the conductive substrate, so that moisture enters the semiconductor layer and Ag of the light reflection layer is introduced. Even if a part of the ion is positively ionized, Ag ions do not move in the semiconductor film.

However, in such a solar cell, when the solar cell element is partially shielded from light in the element array in a state where water enters the semiconductor film, a negative voltage is applied to the transparent electrode side. Is applied, a part of Ag in the light-reflecting layer is positively ionized, and positive Ag ions move in the semiconductor film toward the transparent electrode to which a negative voltage is applied, and again as Ag on the transparent electrode side. Precipitation is possible. As a result, there is a high risk that a partial Ag short circuit will be formed in the semiconductor film.

Ionization, migration of such metal ions,
It is considered that the phenomenon of precipitation also occurs at a forward voltage of about 0.8 V of a pn junction diode made of single crystal silicon and progresses almost in proportion to the applied voltage. It is considered that a short circuit is formed in the short circuit and the short circuit current increases rapidly.

Such a phenomenon can be avoided if a metal that ionizes is not used on the back surface of the semiconductor film or if moisture such as water vapor can be completely prevented from entering.

However, it is necessary to use a metal having a high conductivity and a high reflectance for the collector electrode and the back surface reflection layer, and metals such as silver and copper which are often used as such a metal tend to be easily ionized. is there.

When used as a power solar cell for many years under severe environmental conditions outdoors, it is extremely difficult to guarantee complete waterproofing of the module, and the entire solar cell element is completely sealed with glass. If the waterproof measures are taken, the weight of the module becomes very heavy, and the installation method is limited. In addition, there is a problem that it is too costly to obtain a power generation cost equivalent to that of commercial power.

A solar cell using amorphous silicon disclosed in the above Japanese Patent Publication No. 63-13358 is deposited on an insulating substrate, a part of the element is separated, and electrodes are connected in the opposite direction to bypass. In the method of forming a diode, the forward voltage of a photovoltaic element made of a pin junction of amorphous silicon is about 1.0 V, which is equivalent to the forward voltage of a diode made of a pn junction of single crystal silicon. Even if it is used instead of the silicon diode, it is not effective in suppressing the occurrence of the short circuit of the semiconductor film due to the partial light blockage under the high humidity. In particular, when the solar cell element has a tandem structure in which a plurality of nip junctions are stacked, the forward voltage of the bypass diode is considerably high in proportion to the open circuit voltage of the solar cell element because the open circuit voltage of the solar cell element is high. There is a problem of becoming.

On the other hand, in the method of forming an amorphous silicon solar cell and a Schottky barrier diode on the same substrate as disclosed in Japanese Patent Publication No. 2-5575, the forward voltage of the Schottky barrier diode is pn. Since it is lower than the forward voltage of the junction diode, pn of single crystal silicon
If it is used instead of the junction diode, it is considered to be effective in suppressing a short circuit due to partial light blocking under high humidity.

However, in the method disclosed in Japanese Patent Publication No. 2-5575, when a solar cell element and a diode are formed on the same conductive substrate, an insulating layer is provided on the conductive substrate to form a solar cell. Unless the electrodes of the element and the diode are completely separated, the solar cell element and the diode have the same polarity with respect to the conductive substrate, so that the diode cannot be connected in parallel to the solar cell element in the opposite direction, and the reverse current flows. Although it can be used as a blocking diode for prevention, it cannot be used as a bypass diode.

[0020]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a highly reliable solar cell and a solar cell module which suppresses the occurrence of short circuit of the solar cell module due to partial light blocking under high humidity. To aim.

[0021]

The solar cell of the present invention comprises n
Where the n-type semiconductor is n, the i-type semiconductor is i, and the p-type semiconductor is p, a tandem solar cell element in which a plurality of nip or pin junctions made of a silicon-based non-single-crystal semiconductor are stacked on a conductive substrate, In a solar cell including a bypass diode connected in parallel with the solar cell element so as to be electrically opposite to the solar cell element, the bypass diode is a silicon-based non-deposited film formed on the conductive substrate. It is characterized by being an in- or ip-junction diode element made of a single crystal semiconductor.

Further, i in the diode element is
It is preferably composed of amorphous silicon germanium.

Further, it is desirable to have a diode made of a single crystal semiconductor connected in parallel with the bypass diode so that the bypass diode is electrically forward.

The solar cell module of the present invention is characterized in that a plurality of the above-mentioned solar cells are connected in series.

[0025]

In the invention according to claim 1, the n-type semiconductor is n, i
When the type semiconductor is i and the p-type semiconductor is p, the tandem solar cell element in which a plurality of nip or pin junctions made of a silicon-based non-single-crystal semiconductor are stacked on a conductive substrate, and the solar cell element are electrically In a solar cell including a bypass diode connected in parallel with the solar cell element so as to be in a reverse direction, the bypass diode is formed of a silicon-based non-single-crystal semiconductor deposited on the conductive substrate. Or, since it is an ip junction diode element, an insulating layer is provided on the conductive substrate,
It is not necessary to completely separate the solar cell element and the electrode of the bypass diode, and the forward voltage of the diode element is 0.45 to 0.5V, which is about half the forward voltage of the pin element or the nip junction element. Can be

In the invention according to claim 2, since i in the diode element is amorphous silicon germanium, when a-SiGe having a narrow bandgap is used for the i-type semiconductor layer, the forward voltage becomes further lower. , Si and G
Depending on the composition ratio of e, it can be lowered to about 0.3V.

In the invention according to claim 3, since the bypass diode has a diode made of a single crystal semiconductor connected in parallel with the bypass diode so as to be electrically forward, the forward voltage of the bypass diode is increased. It is possible to achieve both lowering of the current consumption and increase of the allowable current capacity.

The reduction in the forward voltage according to the above-mentioned claims 1 to 3 brings about a further decrease in the reverse voltage applied to the light-shielding element even if partial light blocking occurs in the array of tandem solar cell elements.

As a result, it is possible to significantly suppress short-circuiting of the element due to movement of metal ions even when moisture penetrates into the semi-thin film of the solar cell element as well as dielectric breakdown of the element due to high voltage. A battery is obtained.

In the invention according to claim 4, since the plurality of solar cells according to at least one of claims 1 to 3 are connected in series, a short circuit of the solar cell module due to partial light interruption under high humidity is caused. Occurrence is suppressed. As a result, a highly reliable solar cell module can be obtained.

[0031]

BEST MODE FOR CARRYING OUT THE INVENTION

(Solar Cell) A solar cell according to the present invention basically comprises a conductive substrate, a tandem solar cell element including a plurality of nip (or pin) junctions, and a diode element including an in (or ip) junction. It is composed. Actually, the following many solar cells are conceivable from the number of overlapping nip (or pin) junctions and the arrangement relationship between the solar cell element and the diode element.

The solar cell according to the present invention will be described in detail below with reference to the drawings. (Solar Cell a) FIG. 1 is a schematic sectional view showing an example of a solar cell according to the present invention, which will be referred to as a solar cell a hereinafter.
The solar cell a is a case where the solar cell element and the diode element are on the same surface of the conductive substrate, and the solar cell element and the diode element are electrically connected to the conductive substrate only through the conductive wire.

In FIG. 1, the solar cell element 101 comprises an n (or p) type semiconductor layer 104A on a conductive substrate 103,
The substantially intrinsic semiconductor layer 105A, the p (or n) type semiconductor layer 106A, the n (or p) type semiconductor layer 104B,
It is composed of a substantially intrinsic semiconductor layer 105B, a p (or n) type semiconductor layer 106B, a transparent electrode 107, and a collector electrode 108.

The diode element 102 is formed on the same conductive substrate 103 as the solar cell element, and the substantially intrinsic semiconductor layer 105D, n (or p) type semiconductor layer 10 is formed.
4D, a transparent electrode 107D, and a collector electrode 108D.

Due to the incidence of light from the transparent electrode side, the conductive substrate 103 side of the solar cell element 101 is negative (or positive).
Then, an electromotive force is generated in the positive (or negative) direction on the side of the upper collector electrode 108.

On the other hand, the diode element 102 is shielded from light by the light-shielding paint 110, etc., so that light is not incident on the semiconductor layer and no photoelectromotive force is generated. Diode element 10
In No. 2, since the direction from the conductive substrate 103 to the collector electrode 108D is the forward direction (or the reverse direction), the solar cell element 1
01 collecting electrode 108 and diode element collecting electrode 10
By connecting 8D to the lead wire 109, the diode element 102 is connected in parallel to the solar cell element 101 in the reverse direction, and acts as a bypass diode.

In the present invention, since the solar cell element has a tandem structure, it generates a high voltage. When an amorphous silicon-based material is used for the semiconductor layer, the i-type layer is a nipnip two-layer tandem-type device having a-Si / a-Si, about 1.8 V, a-Si / a-Si / a-SiGe.
Nipnipnip 3 layer tandem type device of about 2.6V
High open circuit voltage is generated.

However, since the bypass diode element of the present invention has a single in- or ip-junction structure, its forward voltage is about half that of a single pin or nip-junction diode. The forward voltage of the bypass diode element of the present invention is lower than the forward voltage of the diode composed of the pn junction of single crystal silicon, and is about 0.45 to 0.5 V when the i-type semiconductor layer is a-Si. . Also,
When a-SiGe having a narrow band gap is used for the i-type semiconductor layer, the forward voltage is further lowered, and it can be lowered to about 0.3 V depending on the composition ratio of Si and Ge.

Due to this low forward voltage, the reverse voltage applied to the light-shielding element becomes very low even if partial light blocking occurs in the array of the tandem solar cell element, and the insulation breakdown of the element due to high voltage occurs. Needless to say, even when water enters the semi-thin film of the solar cell element, the short circuit of the element due to the movement of metal ions is significantly suppressed.

In the present invention, the semiconductor of the diode element
ITO (In₂O_Three+ SnO ₂), SnO₂, In
₂O_Three, It is desirable to stack transparent electrodes such as ZnO.
In FIG. 1, the semiconductor layer 104 of the diode element 102
Do not directly illuminate the collector electrode 108D on D
Nevertheless, the transparent electrode 107D is stacked
The metal of the collecting electrode 108D of the ion element is the solar cell element.
The power generation voltage of
This is to prevent a short circuit of the protection element.

In the present invention, since the semiconductor layer of the solar cell element and the semiconductor layer of the diode element are made of the same type of non-single crystal silicon, they can be simultaneously formed on the conductive substrate. In FIG. 1, the semiconductor films of the solar cell element 101 and the diode element 102 are separated on the conductive substrate 103, but the i-type layer 105D of the diode element is n (p) at the same time as the i-type layer 105A of the solar cell element. Mold layer 10
4D is 104B at the same time as the transparent conductive film 107D is 107
At the same time, the collector electrode 108D can be deposited and formed simultaneously with 108. In that case, known means such as masking can be used to deposit a part of the deposited film of the solar cell element on the diode element portion. When depositing a film other than the film required for the diode element in the solar cell element, by covering the diode element formation region with a mask to prevent the film from being deposited, only the desired film can be selected and deposited. .

(Solar Cell b) FIG. 2 is a schematic sectional view showing an example of the solar cell according to the present invention.
Called. The solar cell b is a case where a semiconductor film deposited as a diode element is continuously deposited without being separated from the solar cell element.

Reference numerals 201 to 210 in FIG. 2 denote 1 in FIG.
It corresponds to 01-110. In FIG. 2, the i-type layer 205A and the n (p) -type layer 204B of the diode element 202 are shown.
Is continuous with the i-type layer 205A and the n (p) -type layer 204B of the solar cell element 201.

Although the leakage current is generated in the lateral direction in the semiconductor layer by sharing the semiconductor layer, the non-single-crystal silicon film has a considerably high resistivity and a thin film thickness, so that the semiconductor layer leaks in the lateral direction. The current is extremely small, and if the transparent electrode having a high conductivity and the collecting electrode are separated by about several mm, the characteristics of the solar cell element are not adversely affected in practical use. Although there is a step at the end of the solar cell element 201 in the shared semiconductor layer,
Here, it is not necessary that the film is continuous, and it is more desirable that the film is cut at a step because the leakage current in the lateral direction can be prevented even if the gap between the solar cell element and the diode element is narrow.

The region between the solar cell element and the diode element generates a photoelectromotive force in the direction opposite to that of the solar cell element when irradiated with light, so that there is no upper electrode and almost no current is collected. It is desirable to shield the light by applying paint 210 or the like.

(Solar Cell c) FIG. 3 is a schematic sectional view showing an example of the solar cell according to the present invention.
Called. The solar cell c is a case where a solar cell element and a diode element are provided via a conductive substrate. FIG.
301 to 309 correspond to 101 to 109 in FIG.

In this case, since the diode element 302 is formed on the light irradiation back surface of the conductive substrate 301, the light receiving area of the solar cell module does not decrease due to the formation of the diode element. Further, the diode element can be formed in a large area without worrying about the reduction of the light receiving area, and the current capacity of the diode element can be increased. Further, since the diode element is shielded from light by the conductive substrate, there is an advantage that it is not necessary to shield the diode element with light shielding paint or the like.

In this case, the semiconductor layers 305D and 304D of the diode element 302 are the conductive substrate 30 when the semiconductor layers 305A and 304B of the solar cell element 301 are deposited.
It can be easily formed by depositing a semiconductor film on the back surface of No. 3 at the same time.

Although the diode element is formed only on the back surface of the conductive substrate in FIG. 3, it may be formed on both the back surface and the front surface.

(Solar Cell d) FIG. 4 is a schematic sectional view showing an example of the solar cell according to the present invention.
Called. The solar cell d is a case where the diode 411 made of a single crystal semiconductor is further connected in parallel to the solar cell a of FIG. 401 to 409 in FIG.
Corresponds to 101 to 109 in FIG.

As described above, in the solar cell element 401, the diode element 402 is formed on the same base slope 403,
They are connected in parallel in the opposite direction by a conducting wire 409, and in the case of a solar cell array, they function as a bypass diode without the single crystal diode 411.

At this time, since the forward voltage of the diode element 402 is low, the reverse voltage applied to the solar cell element 401 is considerably low even if partial light blocking occurs in the solar cell array.

However, the diode element 402 is on the same substrate 403 as the solar cell element 401, and the area of the diode element 402 cannot be made so large as compared with the solar cell element 401 in order to prevent the reduction of the light receiving area. Therefore, when there is no single crystal diode 411, and when partial light blocking occurs in the solar cell array, the small diode element 402 causes the other solar cell elements of the solar cell array to be approximately equal to the current generated by the solar cell element 401. Is generated as a forward current, and this forward current is a diode element 402 made of a silicon-based non-single-crystal semiconductor.
If the allowable current capacity is exceeded, the diode element 402 may be destroyed.

When a single crystal diode 411 having a high current capacity but a large current capacity is connected in parallel to the diode element 402 in the same direction even if the forward voltage is high, a large current in the high applied voltage region flows through the single crystal diode 411, A small current in a region where the applied voltage is lower than the forward voltage of the crystal diode acts so as to flow through the diode element 402 made of a non-single crystal semiconductor, and the forward voltage of the bypass diode is lowered and the allowable current capacity is increased at the same time. Planned.

As the single crystal diode used in the present invention, an individual diode element made of silicon or germanium and having a pn junction, a pin junction or a Schottky barrier junction structure can be used. Allowable forward current capacity of the single crystal diode (maximum rated value)
Is preferably AM1.5 (1000
W / m ² ) It is 2 times or more, and more preferably 3 times or more of the short-circuit current during irradiation.

(Solar Cells e to h) FIGS. 6 to 9 are schematic sectional views showing an example of the solar cell according to the present invention, which will be hereinafter referred to as solar cells e to h. The solar cells e to h are nip
Alternatively, it is a case of using a three-layer tandem solar cell element in which three pin junctions are stacked.

In this case, there are a plurality of combinations depending on which semiconductor layer of the solar cell element and the semiconductor layer used for the diode element formed on the same substrate as the solar cell element are formed at the same time.

6 to 9, the semiconductor layers are shown in succession so that it can be seen which semiconductor layer of the solar cell element and the semiconductor layer of the diode element were formed at the same time.

In FIG. 6 (solar cell e), the semiconductor layers of the diode element are arranged in order from the bottom, i-type semiconductor layer of the cell of the first layer of the solar cell element and n (or p of the cell of the second layer). ) Type semiconductor layer.

In FIG. 7 (solar cell f), the semiconductor layers of the diode element are arranged in order from the bottom, i-type semiconductor layer of the second layer cell of the solar cell element and n (or p) of the third layer cell. ) Type semiconductor layer.

In FIG. 8 (solar cell g), the semiconductor layers of the diode element are arranged in order from the bottom, i-type semiconductor layer of the cell of the first layer of the solar cell element and n (or p of the cell of the second layer). ) Type semiconductor layer and the n (or p) type semiconductor layer of the third layer cell.

In this case, the layer thickness of the impurity doped layer of the diode element can be increased.

In FIG. 9 (solar cell h), the semiconductor layers of the diode element are arranged in order from the bottom, i-type semiconductor layer of the first cell of the solar cell element and i-type semiconductor layer of the second cell of the solar cell element. , The n (or p) type semiconductor layer of the second layer cell. In this case, the substantially intrinsic i of the diode element
The layer thickness of the type semiconductor layer can be increased.

(Diode Element) The layer thickness of the substantially intrinsic semiconductor layer of the diode element according to the present invention is about 5
A range of 0 nm to about 500 nm is desirable. About 50 nm
If it is less than this, pinholes are likely to occur in the semiconductor layer, and dielectric breakdown is likely to occur. On the other hand, if it is thicker than about 500 nm, the electric field inside the layer is weakened and the diode characteristics are deteriorated.

The film thickness of the impurity-doped layer joined to the substantially intrinsic semiconductor film in the diode element according to the present invention is preferably about 5 nm or more. About 5
If it is less than nm, it is difficult to uniformly form a semiconductor layer,
This causes deterioration of diode characteristics.

(Conductive Substrate) The conductive substrate according to the present invention has little deformation and distortion at the temperature required for semiconductor film formation, has desired strength, and has good conductivity. It is preferable. Specifically, metal plates such as stainless steel, aluminum and its alloys, iron and its alloys, copper and its alloys, or heat-resistant resins such as polyimide, polyamide, polyethylene terephthalate, and epoxy, and metal alone or on the surface of glass plates, etc. Examples include alloys, transparent conductive oxides, and the like that have been subjected to conductive treatment by a vapor deposition method, a sputtering method, a plating method, or the like.

The conductive substrate is made of a different material for the purpose of improving the reflectance of long-wave light reaching the substrate, preventing mutual diffusion between the substrate material and the semiconductor layer, improving adhesion, smoothing the substrate surface, and the like. The metal layer may be provided on the semiconductor layer formation side surface.

When provided as a light reflecting layer, a metal having a high reflectance from visible light to near infrared such as Ag, Al, Cu, Au, AlSi is suitable for such a metal layer.

When these metal layers are provided, it is desirable to provide a transparent conductive layer between these metal layers and the semiconductor layer in order to prevent diffusion of metal from the metal layer to the semiconductor layer.

As such a transparent conductive layer, ZnO,
The most suitable one is a transparent conductive oxide such as SnO ₂ , In ₂ O ₃ or ITO.

(Manufacturing Apparatus and Manufacturing Method of Silicon-Based Non-Single Crystal Semiconductor Layer) In the solar cell according to the present invention, various manufacturing methods and manufacturing apparatuses may be used to form the silicon-based non-single crystal semiconductor layer. It is possible.

The solar cell shown in FIG. 1 is, for example, as shown in FIG.
It can be manufactured using the manufacturing apparatus having the configuration shown in FIG. The manufacturing apparatus shown in FIG. 10 is a so-called roll-to-roll type continuous manufacturing apparatus by the plasma CVD method.
In FIG. 10, FIG. 10 (A) is a cross-sectional view of the apparatus seen from the lateral direction, and FIG. 10 (B) is a cross-sectional view of the apparatus seen from above.

In FIG. 10, 1004A, 1005
A, 1006A, 1004B, 1005B, 1006B
Is plasma CVD n, i, p (or p, i,
n) type layer deposition chambers 1001 and 1002 are strip-shaped conductive substrate unwinding chambers and winding chambers. A discharge chamber 1008 is provided in the vacuum chamber of each film formation chamber, and a silicon-based non-single-crystal semiconductor film is deposited by generating glow discharge inside the discharge chamber. The vacuum chambers of the film forming chambers are connected by a gas gate 1007 that allows a purge gas such as He to flow in a narrow gap to prevent mutual mixing of gases between the film forming chambers. 1003 is, for example, 0.13 mm thick and 3 wide
It is a strip-shaped conductive substrate such as a 6 cm stainless steel sheet, and is unrolled from the supply chamber 1001 and continuously transported while being formed into six film forming chambers 1004A, 1005A, 100.
6A, 1004B, 1005B, 1006B, and while being wound into the winding chamber 1002, a two-layer ni layer is formed on the surface of the surface of the conductive substrate in FIG.
A laminated film of a silicon-based non-single-crystal semiconductor for a solar cell element having a p (or pin) structure is formed in a region on the front side of the conductive substrate in FIG. A laminated film of a non-single crystal semiconductor is formed.

Although not shown in the figure, a temperature control means such as a heater for controlling the substrate to a predetermined temperature suitable for semiconductor deposition is provided in each film formation chamber, and a gas supply means is provided in each film formation chamber. Raw material gas introduction means for introducing raw material gas for semiconductor formation, an exhaust pipe (not shown) for exhausting the film forming chamber by the exhaust means to adjust the pressure to a predetermined pressure, and high frequency power to the gas in the film forming chamber from a high frequency power source (not shown) A discharge means (not shown) for supplying is provided, and the film forming chambers 1004A, 1005A, 1006A, 1
In 004B, 1005B and 1006B, each discharge chamber 10
At 08, a silicon-based non-single-crystal semiconductor layer of n, i, p, n, i, p (or p, i, n, p, i, n) type is deposited by the plasma CVD method.

A conductive substrate 100 is provided above the discharge chamber 1008.
3, a mask 1009 is provided between them and a desired semiconductor layer is deposited at a predetermined position on the belt-shaped conductive substrate 1003.

At which position in each discharge chamber 1008 the mask 10
FIG. 10B shows at which position the semiconductor layer is deposited, which has the opening 09. The opening of the mask 1009 is
The semiconductor layer forming region 1010 for solar cell elements on the other side of the conductive substrate 1003 in the figure is separated into the semiconductor film forming region 1011 for diode elements on the front side, and nipnip (or nipnip (or pinp
The semiconductor laminated film for the (in) structure solar cell element is deposited on the front side, and the semiconductor laminated film for the in (or ip) structure diode element is deposited.

By using such a device, the semiconductor layer of the solar cell of the present invention can be formed. After that, IT is performed by a known vacuum deposition method or sputtering method.
A transparent conductive film of O, SnO ₂ or the like is formed, and then a collector electrode of Ag, Al or the like is formed by a vacuum vapor deposition method, a screen printing method or the like, and the collector electrodes of the solar cell element and the diode element are connected by a conductive wire. The solar cell of the present invention as shown in FIG. 1 can be manufactured by applying black light-shielding paint or the like on the diode element.

(Solar Cell Module) The solar cell module according to the present invention refers to a module in which a plurality of solar cells each having a bypass diode element connected to the above-mentioned solar cell element are connected in series to form a module.

If there is no bypass diode and one solar cell among the n solar cells connected in series becomes a shadow, the shadowed solar cell has a maximum of the open circuit voltage of other solar cell elements ( Since a reverse voltage of n-1) times is applied, increase the number of series connections only within the range that the reverse voltage applied to the solar cell element does not exceed the withstand voltage of the solar cell element when a partial shadow is formed. I can't.

However, since the solar cell of the present invention is connected to the bypass diode for each solar cell element, the number of solar cells connected in series is modularized so that a desired output voltage can be obtained. Can be set to.

In the present invention, a bypass diode element made of a silicon-based non-single crystal semiconductor may be further connected in parallel with a diode made of a single crystal semiconductor.
When solar cells are connected in series to form a module, it is not always necessary to connect a diode made of a single crystal semiconductor to each solar cell, and a plurality of solar cells connected in series should be connected in parallel at a rate of one. May be.

Further, when a plurality of solar cell modules are connected in series, only one diode made of a single crystal semiconductor may be inserted in one solar cell module.

[0083]

EXAMPLES Hereinafter, the solar cell and the solar cell module of the present invention will be described in detail, but the present invention is not limited to these examples.

Example 1 In this example, the manufacturing apparatus having the structure shown in FIG. 10 was used, and a solar cell element having a nipnip structure made of a silicon-based non-single-crystal semiconductor was formed on a conductive substrate.
A semiconductor film of an in-structure diode element made of a silicon-based non-single-crystal semiconductor was continuously formed to fabricate a solar cell having the configuration shown in FIG.

The manufacturing method will be described below according to the procedure. (1) SUS430BA band-shaped stainless steel plate (width 3
On the surface of 56 mm x 200 m x thickness 0.13 mm, a 500 nm Ag layer as a back reflection layer and a 1000 nm ZnO transparent conductive layer as an Ag diffusion prevention layer were formed and laminated by a known DC magnetron sputtering method. The strip-shaped conductive substrate 1003 was set in the substrate unwinding chamber 1001 in a coiled state. Next, the conductive substrate 1003 is formed on the film forming chamber 1 through the gas gates 1007.
004A, 1005A, 1006A, 1004B, 10
05B and 1006B are penetrated to the substrate winding chamber 100.
It was passed up to 3, and tension was applied so as not to loosen.

In the substrate winding chamber 1003, a bobbin (not shown) wound with a well-dried harvest film made of aramid paper (width 356 mm × length 200 m × thickness 0.05 mm) was set, The protective film was wound together with the conductive substrate 1003 having a semiconductor layer formed on the surface.

(2) After setting the conductive substrate, the inside of each of the film forming chambers 1004A to 1006B is evacuated once by a vacuum exhaust pump (not shown), and He gas is introduced while continuously exhausting to introduce a He atmosphere of about 200 Pa. The inside of each film forming chamber was heated and baked at about 350 ° C.

(3) After heating and baking, each chamber 1004
While evacuating each of A to 1006B with a vacuum exhaust pump, H ₂ as a gate gas is supplied to each of the gas gates at 1000 times.
A predetermined flow rate of each source gas was introduced into the discharge chamber 1008 of each film forming chamber. Then, the substrate unwinding chamber 1001 and the substrate winding chamber 1002 are adjusted by adjusting the opening degree of a vacuum exhaust pump that exhausts each film forming chamber and a throttle valve (not shown) provided in an exhaust pipe between each film forming chamber. Was set to 130 Pa, and the pressure inside the discharge chambers of the film forming chambers 1004A to 1006B was set to 135 Pa.

(4) When the pressure in each chamber is stabilized, the winding bobbin of the conductive substrate 1003 in the substrate winding chamber 1002 is rotated to deposit the conductive substrate 1003 in the film forming chamber 100.
250 mm / in the direction from 4A to the film forming chamber 1006B
It was moved at a speed of min. The temperature control means (not shown) provided in each discharge chamber 1008 controls the temperature of the moving conductive substrate to a predetermined temperature in each discharge chamber.

(5) When the temperature of the substrate is stabilized, high-frequency power is supplied from a high-frequency power source (not shown) to a discharge electrode (not shown) provided in each discharge chamber of the film forming chambers 1004A to 1006B through a matching device. The raw material gas in each discharge chamber was decomposed by glow discharge to generate plasma. Under the film forming conditions shown in Table 1, a semiconductor film is deposited on a conductive substrate that continuously moves in each film forming chamber, and a conductive substrate having a width of 356 mm is spaced by 6 mm and a width of 300 mm. N
Two-layer tandem solar cell device with ipnip structure and width 50
A mm in-structure diode element was formed.

(6) After depositing and forming a semiconductor film over about 170 m of the strip substrate, turning on the discharge power, introducing the source gas, stopping the heating of the conductive substrate and the film forming chamber, and purging the film forming chamber. After cooling the conductive substrate and the inside of the device sufficiently, the device was opened, and the conductive substrate having a semiconductor layer formed on the surface and wound in a coil shape was taken out from the device.

(7) ITO having a film thickness of 70 nm is formed as a transparent conductive film on the formed semiconductor film by a sputtering method.
A thin film was formed, and thin-line Ag electrodes were formed at regular intervals as collector electrodes by a screen printing method using an Ag paste. The transparent conductive film and the collector electrode were formed only on the semiconductor film, and the collector electrode on the solar cell element and the collector electrode on the diode element were connected by a thin copper plate lead wire.

(8) After the black paint for light shielding is applied to the diode element portion, the conductive substrate on which the solar cell is formed is cut into every 100 mm in length, and the width is 356 mm and the length is 100 mm.
150 mm solar cells were produced. FIG. 1 is a schematic cross-sectional view showing the layer structure of the manufactured solar cell.

(9) Using this solar cell, a fluorine-based surface protective sheet having a thickness of 0.1 mm [copolymer of tetrafluoroethylene and ethylene ETFE (Tefzel made by DuPont)] and a zinc-coated steel sheet having a thickness of 0.3 mm With a thickness of about 0.5 mm
It was sandwiched with VA grease (ethylene vinyl acetate) interposed therebetween, and heated and compressed using a known vacuum laminating apparatus to be sealed with a resin.

(10) When the current-voltage characteristics of the solar cells manufactured in the above steps (1) to (9) were examined, it was found that the diode element was operating as a bypass diode and the light was blocked. At a reverse voltage of 0.3 V, the same amount of short-circuit current as the solar cell element's AM1.5 (1000 W / m ² ) irradiation flows, and even if a voltage is applied in the reverse direction in the dark, the solar cell element will It was confirmed that only a very low reverse voltage was applied.

(11) Light was completely cut off from the manufactured solar cell, a constant voltage power supply of 1 V was connected in the reverse direction, and the solar cell was placed in an environment tester with a humidity of 95% and a temperature of 50 ° C. Partial light shielding was carried out, and a durability test reproducing a state in which a reverse voltage was applied was continuously conducted for 1 hour. In addition, the constant voltage power supply is equipped with a current limiting circuit, and the AM1.5
When a current greater than the short-circuit current during irradiation of (1000 W / m ² ) flows, AM1.5 (1000 W
/ M ² ) It was designed to operate as a constant current power supply for short-circuit current during irradiation.

As a result, before and after the durability test, the humidity was 50%,
The parallel resistance of the solar cells in the dark state at a temperature of 25 ° C. was 10 MΩcm ² before the test and 10 after the test.
Although a decrease of 0 kΩcm ² was observed, it was maintained at a level where there was no problem in practical use, and it was found that the fill factor and open circuit voltage of the solar cell element hardly changed.

The humidity of the solar cell after the durability test was 50.
%, The photoelectric conversion efficiency when irradiated with AM1.5 (1000 W / m ² ) at a temperature of 25 ° C. was almost unchanged at an average value of 95% before the test.

Comparative Example 1 In this example, when a solar cell is manufactured using the apparatus of FIG. 10, the diode element opening 1011 of the mask of each discharge chamber is closed and the semiconductor film for the diode element is not deposited. This is the difference from Example 1.

The solar cell of this example is the solar cell element 1 of FIG.
It is composed of the part 01 and has no diode element. Therefore, the coating of the light-shielding paint 110 and the connection of the conducting wire 109 described in Example 1 were not performed.

The solar cell thus produced was sealed with resin under the same conditions as in Example 1, and under the same conditions as in Example 1, partial light shielding was performed under high humidity and reverse voltage was applied. The endurance test reproducing the above-mentioned state was continuously performed for 1 hour.

As a result, before and after the durability test, the humidity was 50%,
The parallel resistance of the solar cells in the dark state at a temperature of 25 ° C. was 10 MΩcm ² before the test and 1 kΩc after the test.
It was greatly reduced to m ^2, and the current-voltage curve of the solar cell element was affected, and the fill factor and open-circuit voltage were greatly reduced.

The humidity of the solar cell after the durability test was 50.
%, The photoelectric conversion efficiency when irradiated with AM1.5 (1000 W / m ² ) at a temperature of 25 ° C. decreased to an average value of 70% before the test.

The photoelectric conversion efficiency of the solar cell element to which the diode element was not connected before the durability test was exactly the same as the photoelectric conversion efficiency of the solar cell to which the diode element of Example 1 was connected before the durability test. It was confirmed that the connection of the diode elements did not affect the photoelectric conversion efficiency of the solar cell element.

(Embodiment 2) In this embodiment, a film forming chamber 1004A, 1006A,
This example is different from Example 1 in that the solar cell having the configuration shown in FIG. 1 was manufactured with the conductivity types of the semiconductor films formed by 1004B and 1006B being opposite polarities.

That is, a semiconductor film of a pin-pin structure solar cell element made of a silicon-based non-single crystal semiconductor and an ip structure diode element made of a silicon-based non-single crystal semiconductor were successively formed on a conductive substrate. Table 2 shows the conditions for manufacturing the semiconductor film in each film forming chamber.

The solar cell thus manufactured was sealed with resin under the same conditions as in Example 1, and under the same conditions as in Example 1, partial light shielding was performed under high humidity and a reverse voltage was applied. The endurance test reproducing the above-mentioned state was continuously performed for 1 hour.

As a result, before and after the durability test, the humidity was 50%,
The parallel resistance of the solar cells in a dark state at a temperature of 25 ° C. was 10 MΩcm ² before the test and 100 k after the test.
Although a decrease of Ωcm ² was observed, the value was maintained at a level where there was no problem in practical use, and there was almost no change in the fill factor and open circuit voltage of the solar cell element.

The humidity of the solar cell after the durability test was 50.
%, The photoelectric conversion efficiency when irradiated with AM1.5 (1000 W / m ² ) at a temperature of 25 ° C. was almost unchanged at an average value of 95% before the test.

Example 3 In this example, a diode made of single crystal silicon was connected in parallel to a diode element having an in structure made of a silicon-based non-single crystal semiconductor to produce a solar cell having the structure shown in FIG. This is different from Example 1.

The manufacturing method will be described below according to the procedure. (1) Example 1 using the manufacturing apparatus having the configuration shown in FIG.
In the same manner as above, the semiconductor film of the nipnip structure solar cell element made of a silicon-based non-single-crystal semiconductor and the in-structure diode element made of a silicon-based non-single-crystal semiconductor were successively formed on the conductive substrate.

(2) The maximum forward current rating is 3 times the short-circuit current of the solar cell element when irradiated with AM1.5 (1000 W / m ² ), and the forward current of the solar cell element is AM1.5 (1
000 W / m ² ) A diode made of single crystal silicon having a forward voltage of about 0.8 V when it is equal to the short-circuit current at the time of irradiation was connected in parallel via a conductor to manufacture a solar cell having the configuration shown in FIG. .

The diode element made of a silicon-based non-single crystal semiconductor and the diode made of single crystal silicon were connected in parallel so that their forward directions were the same.

The solar cell thus produced was sealed with resin under the same conditions as in Example 1, and under the same conditions as in Example 1, partial light shielding was performed under high humidity and reverse voltage was applied. The endurance test reproducing the above-mentioned state was continuously performed for 1 hour.

As a result, before and after the durability test, the humidity was 50%,
Temperature 25 ° C., an average value 5Emuomegacm ² before the parallel resistance test of the solar cell in the dark state, the average value after the test is 50Keiomegacm ²
However, it was maintained at a level where there was no problem in practical use, and there was almost no change in the fill factor and open circuit voltage of the solar cell element.

Also, the humidity of the solar cell after the durability test was 50.
%, The photoelectric conversion efficiency when irradiated with AM1.5 (1000 W / m ² ) at a temperature of 25 ° C. was almost unchanged at an average value of 95% before the test.

(Embodiment 4) In this embodiment, the manufacturing apparatus having the configuration shown in FIG.
04B, the opening of the mask 1009 of the discharge chamber 1008 is set to 2
The semiconductor film forming region 10 for the diode element is not divided into parts.
This example differs from Example 1 in that the solar cell having the structure shown in FIG. 2 was produced by making 11 the solar cell element semiconductor film forming region 1010 continuous.

That is, semiconductor films of a solar cell element having a nipnip structure made of a silicon-based non-single-crystal semiconductor and a diode film of an in-structure made of a silicon-based non-single-crystal semiconductor were successively formed on a conductive substrate.

The solar cell thus produced was sealed with resin under the same conditions as in Example 1, and under the same conditions as in Example 1, partial light shielding was performed under high humidity and reverse voltage was applied. The endurance test reproducing the above-mentioned state was continuously performed for 1 hour.

As a result, before and after the durability test, the humidity was 50%,
The average parallel resistance of the solar cell in the dark state at a temperature of 25 ° C. was 1 MΩcm ² before the test, and the average value after the test was 100 kΩc.
Although a decrease of m ² was observed, the value was maintained at a level where there was no problem in practical use, and there was almost no change in the fill factor and open circuit voltage of the solar cell element.

The humidity of the solar cell after the durability test was 50.
%, The photoelectric conversion efficiency when irradiated with AM1.5 (1000 W / m ² ) at a temperature of 25 ° C. was almost unchanged at an average value of 95% before the test.

(Embodiment 5) In this embodiment, a part of the manufacturing apparatus having the configuration shown in FIG.
04B, the semiconductor film for the solar cell element has a width of 350 mm formed on the front side of the conductive substrate, and the semiconductor film for the diode element has a width of 150 mm formed on the back side of the conductive substrate. The difference from Example 1 is that the above solar cell was manufactured.

That is, the semiconductor film of the nipnip structure solar cell element made of a silicon-based non-single crystal semiconductor and the in-structure diode element made of a silicon-based non-single crystal semiconductor were continuously formed on the front and back of the conductive substrate.

Since the diode element is formed on the back surface of the conductive substrate and the incident light is blocked, the diode element was not coated with the light-shielding paint.

The solar cell thus produced was sealed with a resin under the same conditions as in Example 1, and under the same conditions as in Example 1, partial light shielding was performed under high humidity and a reverse voltage was applied. The endurance test reproducing the above-mentioned state was continuously performed for 1 hour.

As a result, before and after the durability test, the humidity was 50%,
The average parallel resistance of the solar cells in the dark state at a temperature of 25 ° C. was 1 MΩcm ² before the test, and the average value after the test was 100 kΩc.
Although a decrease of m ² was observed, it was kept at a level where there was no problem in practical use, and there was almost no change in the fill factor and open circuit voltage of the solar cell element.

The humidity of the solar cell after the durability test was 50.
%, The photoelectric conversion efficiency when irradiated with AM1.5 (1000 W / m ² ) at a temperature of 25 ° C. was almost unchanged at an average value of 95% before the test.

(Embodiment 6) In this embodiment, the manufacturing apparatus having the structure shown in FIG. 10 is partially modified so that three film forming chambers, n (n), are formed between the film forming chamber 1006B and the substrate winding chamber 1002. p)
Mold layer deposition chamber 1004C, i-type layer deposition chamber 1005C, p
An (n) type layer deposition chamber 1006C was added.

As a result, a semiconductor film for a three-layer tandem solar cell element having a nipnipnip (or pinpinpin) structure is formed, and the film forming chambers 1005A, 1005
5B and 1004C are different from Example 1 in that the solar cell having the structure shown in FIG. 5 was manufactured by forming a semiconductor film for a diode element on a part of a conductive substrate.

That is, nipn made of a silicon-based non-single-crystal semiconductor was formed on the conductive substrate in the same manner as in Example 1 except that the film forming conditions in each film forming chamber were changed as shown in Table 3.
A semiconductor film of an ipnip structure solar cell element and a semiconductor film of an in structure diode element made of a silicon-based non-single crystal semiconductor were successively formed.

The solar cell thus manufactured was sealed with resin under the same conditions as in Example 1, and under the same conditions as in Example 1, partial light shielding was performed under high humidity and reverse voltage was applied. The endurance test reproducing the above-mentioned state was continuously performed for 1 hour.

As a result, before and after the durability test, the humidity was 50%,
The average parallel resistance of the solar cell in the dark state at a temperature of 25 ° C. was 10 MΩcm ² before the test, and the average value after the test was 100 kΩ.
Although a decrease of ² cm2 was observed, it was kept at a level that had no problem in practical use, and there was almost no change in the fill factor and open circuit voltage of the solar cell element.

Further, the photoelectric conversion efficiency of the solar cell after the test at the humidity of 50% and the temperature of 25 ° C. at the time of AM1.5 (1000 W / m ² ) irradiation was almost unchanged at the average value of 95% before the test. It was

(Example 7) In this example, a solar cell module was manufactured by connecting 10 stages of solar cells each composed of the solar cell element and the diode element manufactured in Example 6 in series.

The maximum forward current rating of each solar cell was three times the short-circuit current of the solar cell element when irradiated with AM1.5 (1000 W / m ² ), and the forward current of the solar cell element was AM1. Diodes made of single crystal silicon having a forward voltage of about 0.8 V when they were equal to the short-circuit current during irradiation with 5 (1000 W / m ² ) were connected in parallel.

The solar cell module thus produced was sealed with resin under the same conditions as in Example 1, and only one of the 10 solar cells connected in series was completely shielded from light by a mask.
A 3V constant-voltage power supply was connected in the reverse direction, and the test piece was placed in an environment tester with a humidity of 95% and a temperature of 50 ° C. Partial shading was performed under high humidity, and the reverse voltage was applied to reproduce the durability. The test was conducted continuously for 1 hour.

A current limiting circuit is provided in the constant voltage power source, and when a current equal to or more than the short-circuit current during irradiation of AM1.5 (1000 W / m ² ) of the solar cell element flows, AM1.5 of the solar cell element is increased. It was made to operate as a constant current power supply of a short circuit current at the time of (1000 W / m ² ) irradiation.

[0138] As a result, before and after the durability test, a humidity of 50% of the solar cells protected from light, temperature 25 ° C., an average value before the parallel resistance in the dark state test 5Emuomegacm ^2, the average value after the test 50Keiomegacm ² Although it was observed that the solar cell element fill factor,
There was almost no change in the open circuit voltage.

After the test, the solar cell module with the light-shielding mask removed had a humidity of 50% and an AM of 1.5 at 25 ° C.
The photoelectric conversion efficiency during irradiation with (1000 W / m ² ) was almost unchanged at an average value of 95% before the test.

(Comparative Example 2) In this example, in the solar cell module manufactured in Example 6, a diode element made of a silicon-based non-single-crystal semiconductor except for a lead wire for connecting the collector electrode of the diode element to the solar cell element. Is different from that of the seventh embodiment in that the solar cell module is not connected to the in-structure diode element made of a silicon-based non-single crystal semiconductor. A diode made of single crystal silicon was connected in parallel to each of the 10 solar cells connected in series in the solar cell module, as in Example 7.

The solar cell module thus produced was sealed with resin under the same conditions as in Example 1, and only one of the 10 solar cells connected in series was completely shielded from light by a mask.
A 3V constant-voltage power supply was connected in the reverse direction, and the test piece was placed in an environment tester with a humidity of 95% and a temperature of 50 ° C. Partial shading was performed under high humidity, and the reverse voltage was applied to reproduce the durability. The test was conducted continuously for 1 hour.

A current limiting circuit is provided in the constant voltage power supply, and when a current equal to or more than the short-circuit current at the time of AM1.5 (1000 W / m ² ) irradiation of the solar cell element flows, the AM1.5 of the solar cell element is increased. It was made to operate as a constant current power supply of a short circuit current at the time of (1000 W / m ² ) irradiation.

[0143] As a result, before and after the durability test, a humidity of 50% of the solar cells protected from light, temperature 25 ° C., an average value before the parallel resistance in the dark state test 5Emuomegacm ^2, the average value after the test 1 k? Cm ² The current-voltage curve of the solar cell element was affected, and the fill factor and open-circuit voltage were greatly reduced.

After the test, the solar cell module has a humidity of 50% and an AM of 1.5 (1000 W / 1000 W / 25 ° C.).
m ² ) The photoelectric conversion efficiency during irradiation decreased to an average value of 70% before the test.

[0145]

[Table 1]

[0146]

[Table 2]

[0147]

[Table 3]

[0148]

As described above, according to the present invention,
Even if a partial shadow is generated on the solar cell module, the reverse voltage applied to each solar cell is extremely low. Therefore, even if a metal such as Ag is used for the back surface reflection layer and the collecting electrode, the partial voltage under high humidity is partially increased. It is possible to obtain a solar cell in which the occurrence of a short circuit of the solar cell module due to a large amount of light blocking is suppressed, and the reliability of the solar cell and the solar cell module can be significantly improved without deteriorating the performance of the solar cell.

Further, according to the present invention, the solar cell element and the bypass diode element can be simultaneously formed on the same conductive substrate without insulating the surface thereof.
A solar cell and a solar cell module with a bypass diode having excellent productivity can be provided.

[Brief description of drawings]

FIG. 1 is a schematic cross-sectional view showing an example of a solar cell according to the present invention.

FIG. 2 is a schematic cross-sectional view showing another example of the solar cell according to the present invention.

FIG. 3 is a schematic cross-sectional view showing another example of the solar cell according to the present invention.

FIG. 4 is a schematic cross-sectional view showing another example of the solar cell according to the present invention.

FIG. 5 is a schematic cross-sectional view showing another example of the solar cell according to the present invention.

FIG. 6 is a schematic cross-sectional view showing another example of the solar cell according to the present invention.

FIG. 7 is a schematic cross-sectional view showing another example of the solar cell according to the present invention.

FIG. 8 is a schematic cross-sectional view showing another example of the solar cell according to the present invention.

FIG. 9 is a schematic cross-sectional view showing another example of the solar cell according to the present invention.

FIG. 10 is a schematic cross-sectional view showing an example of a manufacturing apparatus used for manufacturing the solar cell according to the present invention.

[Explanation of symbols]

101, 201, 301, 401, 501, 601, 7
01, 801, 901 solar cell element, 102, 202, 302, 402, 502, 602, 7
02, 802, 902 diode elements, 103, 203, 303, 403, 503, 603, 7
03, 803, 903, 1003 Conductive substrate, 104A, 204A, 304A, 404A, 504A,
604A, 704A, 804A, 904A, 104B,
204B, 304B, 404B, 504B, 604B,
704B, 804B, 904B, 504C, 604C,
704C, 804C, 904C, 104D, 304D,
404D, 504D n (or p) type semiconductor layer, 105A, 205A, 305A, 405A, 505A,
605A, 705A, 805A, 905A, 105B,
205B, 305B, 405B, 505B, 605B,
705B, 805B, 905B, 505C, 605C,
705C, 805C, 905C, 105D, 305D,
405D, 505D a substantially intrinsic semiconductor layer, 106A, 206A, 306A, 406A, 506A,
606A, 706A, 806A, 906A, 106B,
206B, 306B, 406B, 506B, 606B,
706B, 806B, 906B, 506C, 606C,
706C, 806C, 906C p (or n) type semiconductor layer, 107, 207, 307, 407, 507, 607, 7
07, 807, 907, 107D, 207D, 307
D, 407D, 507D, 607D, 707D, 807
D, 907D transparent conductive film, 108, 208, 308, 408, 508, 608, 7
08, 808, 908, 108D, 208D, 308
D, 408D, 508D, 608D, 708D, 808
D, 908D collector electrode, 109, 209, 309, 409, 509, 609, 7
09, 809, 909 lead wire, 110, 210, 410, 510, 610, 710, 8
10, 910 light-shielding paint, 411 diode made of single crystal semiconductor, 1001 substrate unwinding chamber, 1002 substrate winding chamber, 1004A, 1004B n (or p) type semiconductor layer deposition chamber, 1005A, 1005B substantially intrinsic semiconductor Layer deposition chamber, 1006A, 1006B p (or n) type semiconductor layer deposition chamber, 1007 gas gate, 1008 discharge chamber, 1009 mask, 1010 semiconductor film forming region for solar cell element, 1011 semiconductor film forming region for diode element.

Claims (4)

[Claims] 1. When the n-type semiconductor is n, the i-type semiconductor is i, and the p-type semiconductor is p, a tandem type in which a plurality of nip or pin junctions made of a silicon-based non-single-crystal semiconductor are stacked on a conductive substrate. In a solar cell including a solar cell element and a bypass diode connected in parallel with the solar cell element so that the solar cell element and the solar cell element are electrically opposite to each other, the bypass diode is deposited on the conductive substrate. A solar cell, which is an in- or ip-junction diode element made of the formed silicon-based non-single-crystal semiconductor. 2. The solar cell according to claim 1, wherein i in the diode element is made of amorphous silicon germanium. 3. The diode according to claim 1, further comprising a diode made of a single crystal semiconductor connected in parallel with the bypass diode so as to be electrically forward with the bypass diode. Solar cells. 4. A solar cell module comprising a plurality of the solar cells according to claim 1 connected in series.