JPH0973533A - Picture input/output device and information processor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a picture input/output device which can input/output full color data at high speed without using private IC of a 'data selector' and the like. SOLUTION: CCD 12, converting a film picture into an electric signal, A/D converters 13, 14 and 15 converting the electric signal converted by CCD 12 into a digital picture signal, an RISC-type one chip microcomputer 1 inputting the picture signal converted by the A/D converters 13, 14 and 15 through an external data bus, converting it, into an address value and outputting it through the external address bus and latch circuits 17, 18 and 19 connected to the external address bus of the microcomputer 1 are provided. The picture signal converted into the address value is outputted to an external device 20 through the external address bus.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic information processing device for processing a large amount of information signals, and more specifically, a so-called "scanner" for inputting, image processing, and outputting an image of a document or a photographed film. The present invention relates to an image input / output device called.

[0002]

2. Description of the Related Art In an image input / output device that handles enormous amounts of data such as image data, it is common to input / output data via an address bus and a data bus. In particular, for devices that require high speed, the method of transferring data from the memory is called "DMA (Direct Memory Acces)".
s) ”, the CPU directly transfers data between memories without designating an address, and uses a general-purpose parallel interface for data output in“ SCSI (Small) ”.
Computer System Interfac
e) ”method is used. In addition, the above "DMA" and "S
A dedicated IC connected to the address bus and the data bus is used for control of "CSI".

Japanese Unexamined Patent Publication No. 5-183674 discloses an image input / output device for inputting / outputting image data via a data bus. In the technology disclosed in the above publication, in order to specify an image input means (frame memory, ROM, RAM) and output means (DMA controller, GPIB, SCSI), a CPU specifies an IC address via an address bus. Data is input to and output from the specified IC via the data bus. Explaining the functions of the address bus and the data bus, a document image taken by a sensor such as a CCD is A / D converted and stored in a frame memory addressed by the CPU. When all the image data is stored in the frame memory, the CPU activates the DMA controller to transfer the data in the frame memory to SCSI.
Make the controller perform DMA transfer. When the DMA transfer is started, the DMA controller specifies the address of the frame memory and writes the read data to the SCSI controller.

[0004]

In the conventional image input / output device, the address bus and the data bus have the "input data storage" and "output data transfer" obtained by A / D converting the image photographed by the CCD. There were two ways to use it. Therefore, even if an image taken by the CCD is A / D converted and immediately output to an external device such as a personal computer, the following problems occur.

That is, since the bus line is frequently switched between "input", "output", and "input", data cannot be output at high speed, and as a result, the time for scanning one screen becomes long. In order to avoid data collision on the data bus, for example, when one address bus outputs "0", the other data bus outputs "1", It is premised that the IC performs "high impedance output", and as a result, the degree of freedom in selecting the IC is lost, and a custom IC must be made. Alternatively, another IC such as a "data selector" is required. As a result, the device becomes expensive.

Furthermore, the width (number of bits) of the data bus is 16 bits in a normal CPU, and it is impossible to output data of 24 bits or more at the same time. That is, CCD
When the output of R (red), G (green), and B (blue) from A / D is converted by 8 bits and one pixel is expressed by 24 bits, the data of one pixel is It cannot be output. As a result, it takes time to output all the data and the scanning time becomes long.

In order to solve the above problems, the present invention provides
An object is to provide an image input / output device that is inexpensive and can input / output image data at high speed.

[0008]

Therefore, in the image input / output apparatus of the present invention, the following means are provided. (1) In an image input / output device that has a RISC type one-chip microcomputer having an external address bus and an A / D conversion unit for a document image, and outputs data to an external device, the RISC type one-chip microcomputer is An image input / output device which converts the image data input from the A / D conversion means into an address value and outputs the image data to an external device via the external address bus.

(2) The A / D conversion means is connected to the external data bus of the RISC type one-chip microcomputer, and the A / D conversion value is input through the external data bus. The image input / output device according to item 1. (3) An RISC type one-chip microcomputer having an external address bus, and an electronic information input means, wherein the information processing apparatus outputs data to an external device.
The one-chip microcomputer of the type is an information processing apparatus characterized by converting electronic information inputted from the input means into an address value and outputting the data to an external device through the external address bus.

(Operation) In the above (1), a document image such as a document image or a film image is converted into a digital image signal by the A / D conversion means, and this image signal is converted into a RISC type 1 signal.
It is input to the chip microcomputer and converted into an address value, and the image signal converted into the address value is output from the external address bus of the microcomputer to an external device.

Further, in the above (2), the image signal converted by the A / D conversion means is input to the RISC type one-chip microcomputer via an external data bus. Further, in the above (3), as the electronic information, the signal inputted by the input means is inputted into the RISC type one-chip microcomputer to be converted into an address value, and the signal converted into the address value is transferred to the external address bus of the microcomputer. Output to an external device.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to FIGS. 3 will be used for the explanation. FIG. 1 is a block diagram of an image input / output device according to an embodiment of the present invention.

In the image input / output device shown in FIG.
RISC (Reduced Ins)
A microcomputer (Traction Set Computer) type microcomputer 1 has an address bus 2 and a data bus 3 therein.
Is provided. The address bus 2 and the data bus 3 are
It is exposed to the outside of the microcomputer 1 so that data can be transferred to an external circuit described later. In this specification, in order to distinguish between the internal bus of the microcomputer 1 and the externally exposed bus, the internal address bus and the data bus of the microcomputer 1 are referred to as an “internal address bus” and an “internal data bus”, respectively. The address bus and the data bus exposed to the outside of 1 are referred to as an "external address bus" and an "external data bus", respectively.

The microcomputer 1 is connected with a one-dimensional CCD image sensor 12 as an image pickup means for photoelectrically converting an image and a motor 16 for moving the CCD 12 in the lateral direction. CCD 12 is R (red), G (green), B
This is a line-type image sensor in which multiple pixel sensors capable of outputting three colors (blue) are arranged one-dimensionally, and the image signal is output for each pixel in response to the scanning pulse (φCLK) from the microcomputer 1. To do. Specifically, the analog shift register inside the CCD 12 shifts the image signal by φCLK and sequentially outputs the image signal for each pixel. In addition, the motor 16 drives the drive signal (φP
In response to M), the CCD 12 is moved laterally line by line.

In this way, after the image signal for one line is output from the CCD 12, the CCD 16 is driven by the motor 16.
By moving 2 in the horizontal direction and outputting the image signal from the CCD 12 again, it is possible to read a two-dimensional image such as a manuscript paper sheet or a photographed film. As will be described later with reference to the flowchart, the motor 1 is continuously driven at a slow speed while reading one image.

The R (red) analog image signal (VoutR) output from the CCD 12 is input to an R (red) A / D converter (denoted as A / D-R in the figure) 13 and G (green). )
Analog image signal (VoutG) is G (green) A / D
Input to the converter (denoted as A / DG in the figure) 14 and B
The (blue) analog image signal (VoutB) is input to a B (blue) A / D converter (denoted as A / D-B in the drawing) 15. Each of the A / D converters 13, 14 and 15 converts the input analog image signal into 8-bit digital image data (hereinafter referred to as an A / D conversion value). Each A / D
The converted value is input to the microcomputer 1 via an I / O port described later and an external data bus.

The "internal address bus" and "internal data bus" of the microcomputer 1 include a CPU 5 and a ROM which are peripheral circuits.
6, RAM 7, three input / output ports (hereinafter referred to as I / O ports) 8 to 10, and a memory controller 11
Are connected respectively. The CPU 5 operates with the oscillation clock (φf) of the oscillator 4, reads the program code recorded in the ROM 6 in advance, and executes the program. The RAM 7 is used for such purposes as temporarily storing the A / D converted value obtained by converting the output signal of the CCD 12 which is the image pickup means into a digital signal by the A / D converter.

The I / O port is provided for outputting a signal to an external circuit and inputting a signal from the external circuit to the microcomputer 1. Of these, the I / O port (0) 8 is a port for inputting the R (red) A / D conversion value of the CCD 12 to the microcomputer 1, and the I / O port (1) 9 is a CC
The I / O port (2) 10 is a port for outputting a scan pulse (φCLK) to the D12, and the I / O port (2) 10 is a drive signal (φPM) to the motor 16 that laterally drives the CCD 12.
Is a port that outputs.

The memory controller 11 is a circuit for controlling the reading and writing of the memory connected to the "external address bus", and is a signal "CS0" (designating the memory of the first area described later) which is a signal designating a block of the memory. ) ”,“ CS1 (specify the memory of the second area described later) ”, and“ RD ”which is a read signal.

In the "external address bus" of the microcomputer 1,
The data output means R (red), G (green), and B (blue) latch circuits 17, 18, and 19 are connected. This "external address bus" consists of a total of 24 bit signals from A0 to A23. A0 to A7 are for B (blue) data output and are connected to the B latch circuit 19.
The latch circuit 19 outputs B (blue) latch data (B0 to B7) to the external device 20. A8 to A15 is G (green)
A G latch circuit 18 for data output is connected, and this G latch circuit 18 outputs G (green) latch data (G0 to G7) to the external device 20. A16 to A23 are R
An R latch circuit 17 for outputting (red) data is connected, and the R latch circuit 17 outputs R (red) latch data (R0 to R7) to the external device 20.

The external address bus outputs a signal only while writing or reading to or from an external memory, and at other times, the signal is generally not latched. Therefore, in the present embodiment, by providing the latch circuits 17, 18, and 19 as data output means between the microcomputer 1 and the external device 20, the external device 20 can read data.

A G (green) A / D converter 14 and a B (blue) A / D converter 15 are connected to the "external data bus" of the microcomputer 1. "External data bus" is from D0 to D
It consists of up to 15 16-bit signals, of which D0
~ D7 is for inputting the A / D converted value of B (blue), and D8
D16 are for inputting an A / D conversion value of G (green). An OR circuit 21 is connected to the memory controller 11. The logical sum circuit 21 outputs a logical sum signal (φLT) of “CS1” and “RD” to the latch circuits 17, 18, 19 and the external device 20. This is the external device 2 as described later.
This is because 0 is regarded as the memory of the second area and the latch signal is generated only when the memory of the second area is accessed.

The external device 20, which is a personal computer or a printer, inputs the output data of the latch circuits 17, 18 and 19 and performs printing, image processing, display and the like. In this case, 24-bit data for one pixel may be input at the same time,
The input may be divided into 3 times for every 8 bits. In that case,
The data division of each pixel can be known by the logical sum signal (φLT), and only one latch circuit needs to be provided.

Next, the operation of the image input / output device in the embodiment of the present invention will be described with reference to the flowchart of FIG. 2 and the timing chart of FIG. FIG. 2 is a flowchart of the microcomputer 1. The microcomputer 1 executes the processing shown in FIG. 2 based on the program code stored in the ROM 6. In FIG. 2, “S” is a symbol representing a processing step. FIG. 3 is a timing chart showing changes in each signal. In FIG. 3, “T” is a symbol indicating timing.

When "scan start" is instructed by operating the external device 20 or the operation member of the scanner, the process of FIG. 2 is started. In S1, I / O port (2) 10
By outputting "PM", the driving of the motor 16 is started, and the CCD 12 starts to move in the lateral direction. In S2, the value of the counter register is set to "0". This counter register is a register for determining whether or not the reading of the CCD 12 has been completed for one column, and is counted up each time the A / D conversion value for one pixel is input.

In S3, the I / O port (1) 9 is written and "0" is output to "φCLK" (T1 in FIG. 3).
Corresponding to). In S4, the I / O port (1) 9 is written, and "1" is output to "φCLK" (corresponding to T2 in FIG. 3). The scanning pulse is output to the CCD 12 by the processing of S3 and S4, and the image signal for one pixel is output from the CCD 12. Further, during the processing of S3 and S4, the address signal of the I / O port (1) 9 is generated on the address bus 2, but the signal is not latched by the external latch circuit. Further, the image signal output from the CCD 12 is A / D converted by the A / D converters 13, 14 and 15,
A / D converted values are I0 to I7, D8 to D16, D0 to D6
Is output to

In S5, the I / O port (0) 8 is read and the data of I0 to I7 is "RDT" (8 bits).
Is stored in the RAM 7 (corresponding to T3 in FIG. 3). At this time, the address signal of the I / O port (0) 8 is generated on the address bus 2. In S6, change the "address" to "000
0000 "(hexadecimal value) (corresponding to T4 in FIG. 3). Of these address values, the most significant 4 bits generate a signal designating a memory area. Here, the RAM 7 which is the memory of the first area is designated, and "C
"S0" becomes "0". In addition, A00 to A23 indicate "00
"0000" is output.

In S7, the external data bus is read out, and the data of D8 to D15 is stored in the RAM 7 as "GDT" (8 bits) and the data of D0 to D7 is stored in the RAM 7 as "BDT" (8 bits). (Corresponding to T5 in FIG. 3). At this time, the external memory read signal "RD" is output as a pulse from the memory controller 11, but since "CS1" is "1", the OR circuit 21
Therefore, the latch pulse (φLT) does not change and maintains “1”. As a result, each latch circuit 17, 18, 19
Does not perform the latch operation and the output data to the external device 20 does not change.

In S8, "RDT", "GDT", "BD"
The output data “OUTDT” is calculated from T] (corresponding to T6 in FIG. 3). “OUTDT” is 24-bit data, and the upper 8 bits represent “RDT”, the middle 8 bits represent “GDT”, and the lower 8 bits represent “BDT”. Therefore, the 16-bit left shift operation value of “RDT”, the 8-bit left shift operation value of “GDT”, and the “BD
By adding "T", "OUTDT" is obtained.

Although the A / D conversion value is directly used as the output data in S8, the shading correction operation or the negative / positive inversion operation may be performed and the operation result may be used as the output data. In that case, the address signal of the RAM 7 used for the calculation is generated on the address bus 2 while calculating these output data. In S9, a value obtained by adding "1000000" and "OUTDT" is set as an "address value" (corresponding to T7 in FIG. 3).
The most significant 4 bits of this address value generate a signal designating a memory area.
The memory of the area is designated, and "CS1" becomes "0". In addition, "BDT" is displayed in A0 to A7, and A8 to A15.
Is output as “GDT” and A16 to A23 are output as “RDT”.

This is a characteristic process of the present invention. That is, in the conventional device, "data" is always output from the "data bus", and the method of outputting from the "address bus" has not been taken. The RISC microcomputer 1 has an address bus 2 of 24 bits or more in order to cover a wide range of external memory area. If this address bus 2 is used, it becomes possible to output 8-bit data for 3 bytes at the same time.

In S10, the external data bus is read out and the data of D0 to D7 is "DUMMY" (8 bits).
Is stored in the RAM 7 (corresponding to T8 in FIG. 3). At this time, the memory controller 11 outputs the external memory read signal "RD" as a pulse.
Since “CS1” is “0”, the latch pulse (φLT) is generated from the OR circuit 21 and the latch circuits 17 and 1 are generated.
8 and 19 perform the latch operation. As a result, the external device 20
The output data to is changed to the latest value. In addition, "DUM
“MY” is a dummy read register for generating the “RD” signal, and the data is B (blue) A / D.
The converted value is input, but the value in this register will not be calculated later.

In S11, the value of the counter register is incremented (corresponding to T9 in FIG. 3). In S12, it is determined whether or not the value of the counter register exceeds the number of pixels of one line of the CCD 12, that is, whether or not the reading of one line has been completed. If it does not exceed, the process returns to "S3", and if it exceeds, Continue to the next.

In step S13, it is determined whether or not "scan end" is instructed by the operation of the external device 20 or the operation member of the scanner, or whether the scan reaches the end of the original paper or film. If it is not completed, the process returns to "S2", and if it is completed, the process proceeds to the next. S
At 14, the motor drive is stopped and this routine ends.

In the embodiment of the present invention, there is no process for "writing" to the external memory, but this is because the external data bus is used only for inputting data and does not output data. Therefore, the A / D converter can always output data to the data bus 3, and an IC such as a “data selector” is provided between the A / D converter and the data bus 3.
It becomes unnecessary to provide.

FIG. 3 shows the oscillation clock (φf) of the CPU 5.
As also shown, in the case of a RISC microcomputer having an oscillation frequency of 20 MHz, one clock of φf is 50 ns (nanosecond). Since the RISC microcomputer can execute one instruction in one clock, in the timing chart of FIG. 3, data for one pixel can be transferred in 12 clocks, that is, 600 ns. On the other hand, conventional CISC
(Complexed Instruction Se
(t Computer) type microcomputer takes 1 in about 4 clocks
Since the instruction is executed, the same processing as above takes 2.4 μs
It will take (microseconds). Further, the CISC type microcomputer has a narrow address range of the external memory, and the number of bits of the address bus is not large. Therefore, when the CISC type microcomputer attempts to output image data from the external address bus as in the present embodiment, it is necessary to output the data in two steps. As a result of the above, the data output time interval per pixel is further lengthened, and a problem such as a longer scanning time occurs.

Although an image input / output device called a "scanner" has been described in the above description of the embodiments, the present invention is not limited to this, and an electronic camera that is an information processing device that processes a large amount of electronic information. ,fax,
Printer, magneto-optical disk, CD-ROM, DVD
It is also applicable to (digital video disc) and the like. [Supplementary Note] According to the above-described embodiment, the following configurations are possible.

(1) An image pickup device for converting optical information into an electric signal, an A / D conversion means for converting the electric signal converted by the image pickup device into a digital image signal, and a connection to the A / D conversion means. The RISC type one-chip microcomputer which converts the image signal converted by the A / D conversion means into an address value and outputs it via an external address bus, and the external address bus of the microcomputer are connected to convert into the address value. An image input / output device, comprising: an image signal output unit that outputs the generated image signal to an external device.

(2) The A / D conversion means is the RIS
The image according to (1), which is connected to an external data bus of a C-type 1-chip microcomputer, and the image signal converted by the A / D conversion means is input to the microcomputer via the external data bus. I / O device. (3) In an image input / output device which has a microcomputer having an external address bus and A / D conversion means for manuscript image, and outputs data to an external device, the microcomputer has the above A / D.
An image input / output device, which converts the image data input from the D conversion means into an address value and outputs the image data to an external device via the external address bus.

(4) The A / D conversion means is connected to the external data bus of the microcomputer, and the A / D conversion value is input through the external data bus (3).
The image input / output device described in 1. (5) An image for outputting data to an external device, which has a RISC type one-chip microcomputer having an external address bus, an A / D conversion unit for a document image, and an image signal output unit for outputting an image signal to an external device In the input / output device, the R
The ISC type one-chip microcomputer converts the image data input from the A / D conversion means into an address value and outputs the image data from the image signal output means to an external device via the external address bus. Characteristic image input / output device.

(6) The image signal output means is a latch circuit for latching an image signal and a circuit means for outputting a latch timing signal to the latch circuit (1), (2), The image input / output device according to (5). (7) In an information processing device that has a microcomputer having an external address bus and electronic information input means, and outputs data to an external device, the microcomputer converts the electronic information input from the input means into an address value. Then, the information processing apparatus is characterized in that data is output to an external device via the external address bus.

[0042]

According to the image input / output device of the present invention, since the data output to the external device is performed by the external address bus of the RISC type one-chip microcomputer, the external data bus is A / D.
Can be used only for inputting conversion value. Therefore, a dedicated IC such as a "data selector" is not required between the A / D converted value and the external data bus, and the input / output switching time of the external data bus is eliminated, so that the scan time is shortened.
Further, since the external address bus of the RISC type 1-chip microcomputer has a large number of bits, R (red), G (green), B
(Blue) 3-byte image data can be output simultaneously. Therefore, a full-color image (24 bits) can be output at high speed.

As a result, it is possible to inexpensively provide a high-performance image input / output device that inputs / outputs image data at high speed. Further, according to the information processing apparatus of the present invention, since the data output to the external device is performed by the external address bus of the RISC type one-chip microcomputer, the external data bus can be used only for inputting the A / D conversion value. Therefore, a dedicated I such as a "data selector" is provided between the A / D converted value and the external data bus.
Since C is unnecessary and the input / output switching time of the external data bus is also eliminated, the signal processing time is shortened.

[Brief description of drawings]

FIG. 1 is a block diagram of an image input / output device according to an embodiment of the present invention.

FIG. 2 is a flowchart of a microcomputer incorporated in the image input / output device according to the embodiment of the present invention.

FIG. 3 is a timing chart showing changes in each signal in the embodiment of the present invention.

[Explanation of symbols]

 1 RISC Microcomputer 2 Address Bus 3 Data Bus 4 Oscillator 5 CPU 6 ROM 7 RAM 8 to 10 I / O Port 11 Memory Controller 12 CCD 13 to 15 A / D Converter 16 Motor 17 to 19 Latch Circuit 20 External Device 21 Logic Sum circuit

Claims (3)

[Claims] 1. An image input / output device having a RISC type one-chip microcomputer having an external address bus and a document image A / D conversion means, and outputting data to an external device, said RISC type one-chip microcomputer. Converts the image data input from the A / D conversion means into an address value,
An image input / output device, which outputs image data to an external device via the external address bus. 2. The A / D conversion means is connected to an external data bus of the RISC type one-chip microcomputer, and an A / D conversion value is input via the external data bus. 1. The image input / output device according to 1. 3. An information processing device comprising a RISC type one-chip microcomputer having an external address bus and electronic information input means and outputting data to an external device, wherein the RISC type one-chip microcomputer is the input device. An information processing device, characterized in that it converts electronic information input from the means into an address value and outputs the data to an external device via the external address bus.