JPH0981613A - Design support device and design support method - Google Patents

Abstract

(57) [Abstract] [PROBLEMS] To provide a highly reliable library even for a circuit module having a low verification rate. A verification information access unit that extracts verification information of the library module when an LSI designed using the library module is verified, and a library module information storage unit for the used library module. A difference extraction unit 33 for extracting a difference between the verification information stored in the verification information storage unit 35 and the verification information extracted by the verification information access unit 35, a verification ratio is calculated using the extracted difference, and the verification ratio and the library A library information management unit having a library information registration management unit 39 for registering or updating the verification information of the library module stored in the module information storage unit is provided.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a design support apparatus and a design support method, and more particularly, to a design support apparatus and a design support method for smoothly reusing design data in a CAD system of an LSI.

[0002]

2. Description of the Related Art Various LSIs that have been widely used in the past
In the design support apparatus, the library is often used for the purpose of facilitating the input of design data, speeding up the verification speed, and the like in accordance with the large scale and high integration of the LSI. This library registers functions that are used for general purposes, such as addition and subtraction, as a design library in advance. By using this registered design library when designing the LSI, design data can be easily input and verified. We are trying to increase the speed.

Here, conventionally, a NAND gate or NO
Many of them are very small in size, such as logic primitives such as R gates, but since the completeness of the library is one of the major factors that influence the design and the design period, in recent years large scale such as 256-bit adders has been created. Such circuits are also registered as a library. As described above, in the conventional LSI design support apparatus, the load on the designer is reduced by enhancing the design library, facilitating the input of design data and increasing the verification speed.

[0004]

However, the degree of library enrichment depends on the number of libraries prepared in advance in the design support device and the number of libraries created by the designer himself. Normally, the one prepared in advance on the side of the design support device is extremely versatile, and therefore, when designing various types of ICs, a type that is likely to be commonly used for any design In many cases, only items are prepared. Therefore, the number of libraries is often not so rich. Also, for the same reason, individual data in the library are not prepared with large circuit scales. Considering the scale of recently produced ICs, design data is created in a library with a small circuit scale. It is hard to say that the load of is reduced sufficiently. From the above circumstances, the designer needs to create the library by himself.

Here, it takes a lot of time and effort to produce a large-scale cell that reduces the design burden. Furthermore,
The library cannot be enhanced by creating it as needed. Therefore, there is a problem that the input of design data is difficult to reduce.

As a method of enriching the library, one of the simplest methods is to divide already-designed design data and register it as library data. However, it cannot be said that the functions designed by the designer of the divided design data are sufficiently guaranteed. In particular, when cutting out not only the layered part but also the circuits in the vicinity of it, even if the layered part has already been sufficiently verified, the circuit cut out together is not enough. It is hard to say that it has been verified by. Therefore, if registration cannot be performed unless the verification rate is 100%, it takes time and effort to register the library, which makes it difficult to enrich the library. Here, the verification rate indicates the degree of verification of arbitrary design data, and is the failure detection rate, the ratio of paths activated by the verification, or the function verification rate. It also shows the ratio of the result obtained by the designer in the verification and the result obtained from the actual verification.

As described above, usually a designer often verifies only necessary test data, so that the verification rate is 100.
If you register only the data of% library,
The library cannot be enhanced. On the other hand, if you register a library with a low verification rate, the library will be enriched, but the function intended by the designer is not always guaranteed, so the library will be unreliable. .

The present invention has been made in view of the above conventional problems, and an object thereof is to clearly show the reliability of the function of a module even in a library module having a low verification rate. Therefore, it is to provide a design support device and a design support method that provide a highly reliable library.

[0009]

In order to achieve the above object, the first feature of the present invention is that the verification information of the library module includes at least the verification rate indicating the degree of verification of each library module registered in the design library. And a verification information access unit for extracting verification information of the library module when an LSI designed by using the library module is verified. ,
A difference extraction unit that extracts a difference between the verification information stored in the library module information storage unit for the used library module and the verification information extracted by the verification information access unit, and the extracted difference. A library information management unit having a library information registration management unit that calculates a verification ratio using the library, and registers or updates the verification ratio and the verification information of the library module stored in the library module information storage unit. .

A second feature of the present invention is to use a library module information storage unit for storing verification information of a library module including at least a verification rate indicating a verification degree of each library module registered in a design library. A method of supporting design by using the library module, the verification information for each library module used when the LSI designed using the library module is verified, and the library module information storage corresponding to the verification information. By extracting the difference information from the verification information of the past library module stored in the part, calculating a new verification rate from the difference information and increasing the verification rate, the performance of the library information used for design can be improved. is there.

According to the configuration of the above invention, the designer can design the design data registered in the library while confirming the verification rate which is a standard for design. Further, since the correct function is guaranteed by updating the verification rate, it is possible to improve the quality of the library while using the library. Therefore, it becomes possible to smoothly reuse the design assets.

Further, when registering as a module of the design library, for example, the reliability of the function of the module of the design library is specified by simultaneously registering the test vector, the expected value, and the verification rate of the divided circuit. To do. The registered design library data is used in any design, and every time it is verified, the verification information of the design library data is compared with the past verification. If there is a part that has not been verified in the past verification. That is, if there is a difference in the verification information, the difference information, the test data that caused the difference information, the expected value in addition to the stored past data, and by updating them, The designer can improve the verification rate without paying much attention to the verification of the library data.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a design support apparatus and a design support method according to the present invention will be described below with reference to the drawings.

First Embodiment FIG. 1 shows the hardware configuration of the design support apparatus in this embodiment. First, the components of the design support device shown in the figure will be described. The input unit 1 inputs a processing command or the like selected by the designer. The command disassembling unit 3 analyzes the data input to the input unit 1 and transmits it to the appropriate processing system suitable for the input processing command to perform the instructed operation. Central control unit 5
Performs control for transmitting information of each unit by the output of the command disassembling unit 3.

The design data input unit 7 performs design data input processing and stores the design data in the design data storage unit 9. The design data storage unit 9 stores the design data input by the design data input unit 7.

The verification unit 11 verifies the design data input by the design data input unit 7, and stores the verification result in the verification result storage unit 13. Verification result storage unit 13
Saves the verification result of the design data verified by the verification unit 11. The test data generation unit 15 generates test data necessary for verifying the design data by the verification unit, and stores the test data in the generated test data storage unit 17. The generated test data storage unit 17 stores the test data generated by the test data generation unit 15.

The design library control unit 19 controls each part that performs various operations for library management. The design library data management unit 21 manages the library data storage unit 23 such as registration and deletion of design library data. The design library data storage unit 23 stores design library data.

The design library information management unit 27 manages information about the design library data such as a document of the design library data and a verification rate. The library data access unit 29 accesses the information contained in the test information storage unit 31. Verification information access unit 35
Is an LSI designed using a library module
Is verified, the verification information of the library module is extracted. The test information storage unit 31 includes a verification rate value of each design library data extracted by the verification information access unit 35, path information activated by the verification, a verification result of the design library data, and test data of each design library data. For example, the input pattern and the expected value for the input pattern are stored.

The difference extraction unit 33 extracts the difference between the verification result and the past verification result in the verification result of the design library data when the data of the library is used for certain design data and verified. The library information registration management unit 37 calculates a verification rate using the difference extracted by the difference extraction unit 33, and registers or updates the verification rate and the verification information of the library module stored in the library module information storage unit 31. . The document management unit 43 manages a document in which information such as circuit module names and circuit characteristics registered in the library is recorded. The document storage unit 45 stores a document of each design library data.

The design tool group 47 indicates a tool group used for LSI design such as a logic synthesis tool and a modeling tool, and information is also input from these tool groups as needed.

Next, the processing procedure in this embodiment will be described with reference to FIG. When the design library data registered in the library data storage unit 23 is used in the design data currently being verified, the verification unit 11 determines the design library data used in the design library information management unit 27. It is transmitted (step S201).

After confirming that the design library data is used, the design library information management unit 27 confirms the verification rate of the used design library data (step S202).

Next, if the verification rate is 100%, or if the verification rate has already been verified, no particular processing is required. However, if the verification rate is less than 100% or sufficient verification is performed. If not, the verification information access unit 35 extracts the test data used for verification and the verification result, and checks the verification information of the design library data by the verification work (steps S203 to S203).
205).

Next, the difference extraction unit 33 extracts past verification information and compares it with the verification information obtained in step S205 (steps S206 to S207).

If the verification work performed this time has verified that the design library data has not been made in the past, the difference extraction unit 33 causes the test data of the portion that has not been verified in the past. And a verification result obtained from the test data is extracted (step S2
08-S209). The verification may be performed again by extracting a verification result that has been verified in the past but different from the verification result of this time.

The library information registration management unit 37 additionally updates the test data extracted from the difference extraction unit 33 in step S209 to the past test data stored in the design library data, and stores it in the library module information storage unit 31. Yes (step S210). Further, the library information registration management unit 37 additionally updates the difference between the verification results extracted by the difference extraction unit 33 to the past verification result and saves it in the library module information storage unit 31 (step S211). The value of the verification rate of the design library data stored in the information storage unit 31 is updated, and the library module information storage unit 3 is updated.
It is saved again as 1 (step S212).

Although not shown in the flow chart of FIG. 2, a document for recording information such as the name of the circuit module and the circuit characteristics related to the design library data is created and the update information is added to the document storage unit 45. You may.

Next, a specific example of the processing flow of the design support apparatus in this embodiment will be described in detail with reference to the drawings. FIG. 3 is an example of design library data registered in the design library data storage unit, and is a description of VHDL representing a 4-bit adder with a 2-input carry. In this example, it is assumed that the verification rate is defined as the ratio of the number of combinations of input test data for which functional verification has been performed to the number of combinations of all input patterns. Therefore,
The verification rate is a value obtained by the formula: ((number of combinations of input test data for which function verification has been performed) ÷ (number of combinations of all input patterns)) × 100. For example, in the case of a 4-bit adder with a carry of 2 inputs, the number of possible combinations of input test patterns is 2 for a 4-bit input.
Since there is one 1-bit carry, 2 ⁴ × 2 ⁴ ×
It is considered that there are 2 = 2 ⁹ = 512 combinations of inputs. Next, in FIG. 3, among the 512 possible test data, two 4-bit inputs are (1) (0000000), (2) (0000001), (3) (0001, 0000). , (4) (1111, 1111), and these four types of inputs are both cases with and without carry input,
That is, it is assumed that verification has been performed with eight combinations. An example of the test data is shown in FIG. 4, and an example of the verification information at that time is shown in FIG. This verification information indicates the expected value (S, Co) for the input data (A, B, Ci), and the “Result” column indicating whether or not the result of the verification is equal to the expected value and whether or not the verification is performed. There is a column of "done" indicating that. In this verification column, the result and whether or not the verification has been performed may be displayed in one column using three types of symbols and the like. It is assumed that this verification information is stored in the library module information storage unit 31.

At present, the designer creates design data including the design library data shown in FIG.
It is assumed that the verification work is completed and a sufficiently satisfactory verification result is obtained.

FIG. 6 shows a 2-input adder with carry of design library data. The circuit configuration of this 2-input adder is shown in FIG. Regarding the circuit configuration of the 2-input adder, an 8-input adder with a carry is configured by connecting two adders. Further, at present, in FIG. 6, it is assumed that the verification is performed only for 32 combinations indicated by the verification information in FIG. 7.

Here, in the circuit described as shown in FIG. 6, the input for the signal A is the input signals L1,
L2 and the input signal B are input to the signals M1, M2,
The input of the input signal Ci is CRY (0), CRY
(1), when those values are input, the values of the output signal S are the signals S1 and S2, and the values of the output signal Co are CR.
Y (0) and CRY (1). Therefore, in order to confirm the operation of FIG. 3, signals (L1, M1, CRY (0), S
1, CRY (1)) and signals (L2, M2, CRY)
The operation of the set of (1), CRY (2), R) may be confirmed.

Next, the design information library 27 confirms that the design library data of FIG. 3 is used for the circuit created as shown in FIG. 6, and then the verification rate of the circuit of FIG. As confirmed by (Fig. 5), 1.56%
Then, it can be seen that the verification has not been sufficiently performed (step S
201-S203).

Therefore, the verification information access unit 35 is shown in FIG.
7 which is the verification information of FIG. 7, and the library data access unit 29 confirms the operation of the design library data of FIG. 4 by checking the signals (L1, M1, CRY (0), S).
1, CRY (1)) and signals (L2, M2, CRY)
The operation of the set (1), CRY (2), R) and the verification rate are confirmed (steps S204 to S205).

Next, the difference extraction unit 33 extracts FIG. 3 in order to compare it with the verification rate of FIG. 3, which is the past verification information of FIG. 7 (step S206). Verification information of the circuit of FIG. 3 shown in FIG. 5 and signals (L1, M1, CRY) of FIG.
(1), S1, CRY (2)) and signals (L2, M3,
Comparing the operation of the operation of the set of CRY (1), CRY (2), S2, R, the verification of FIG.
00,0), (0000001,0), (000
1,0000,0), (0000001,1),
In the 6 patterns of (0001,0000,1),
Past test data Although verified in FIG. 2, (1) (00000000, 0), (15) (00000000, 1), (2) (0011, 0000, 0), (16) (0011,0000,1), (3) (0100,000,0), (17) (0100,000,1), (4) (0101, 0000,0), (18) (0101, 0000,1) ), (5) (0110,000, 0), (19) (0110,000, 0), (6) (0111, 0000, 0), (20) (0111, 0000, 1), (7) ( 1,000,000, 0), (21) (1,000,000, 0), (8) (1001, 0000, 0), (22) (1001, 0000, 1), (9) (10, 10,000,000, 0) , (23) (10,10,000,1) (10) (1011, 0000, 0), (24) (1011, 0000, 1), (11) (1100,000,000, 0), (25) (1100,000,000, 1), (12) (1101, 0000,0), (26) (1101, 0000,1), (13) (1110000, 0), (27) (1110,000, 0), (14) (1111, 0000, 0), ( 28) (1111, 0000, 1) in 28 patterns, it can be confirmed that the verification in FIG. 2 has not been performed (steps S207 to S207).
S208). That is, in the verification in which the verification information as shown in FIG. 7 is obtained, there is a difference in the verification information in the combination of (1) to (28) as compared with the verification in FIG. Specifically, the difference between the information shown in FIG. 7 and FIG. 3 is shown in FIG.
Becomes 1.

According to the definition of the verification rate, it can be said that the verification rate is higher when the design data is verified by more test data. Therefore, in order to increase the verification rate of the design library data of FIG. 3 to a higher verification rate, it is better to extract the difference of the verification information of FIG. 3 from the verification information of FIG. 7 and add it to the verification result to increase the verification rate. Can be done.

If the test data of the design library data and the verification information do not exist, the obtained information may be registered according to the prescribed format without loss, and if there is no difference, then There is no need to do any processing. In this way, the difference extracting unit 33 is
The information difference of FIG. 3 is extracted from this information. That is,
By the operation in step S209, the difference extraction unit 33 extracts the verification information shown in FIG. 11 from FIG. 7 (step S209).

Next, the library information registration management section 37
Test data corresponding to the difference information obtained in step S209 is created and added to the test data (step S2).
10). That is, the difference value shown in the column of L1 is A, the difference value of M1 is B, and the difference CRY.
A portion for performing verification in combination, such as substituting the value indicated by (0) for Ci, is added, and, for example, test data as shown in FIG. 8 is created (step S210). FIG. 8 corresponds to the added test data.

Further, the library information registration management section 37 is
The information shown in FIG. 11 is added to the verification information shown in FIG. 3 in FIG. 3 stored in the library module information storage unit 31 (step S211). Step S
By the operation of 211, for example, the verification information of FIG. 5 is updated as shown in FIG. Further, the library information registration management unit 37 updates the verification rate (step S212), which corresponds to 7.03% shown in FIG.

Here, by confirming the indicated numerical value, that is, the verification rate, the designer can clearly understand how much the design library data to be used has been tested. In other words, the verification rate is one measure for utilizing the design library data in designing.

Second Embodiment In the above embodiment, the case where the design library data used for the design has already been registered has been described.
In this embodiment, a case where unregistered design data is registered in the library data storage unit 23 will be described. FIG. 12 shows a processing flow in this embodiment.

First, the design library control unit 19, which receives a request from the designer to register in the design library, has the design library data management unit 21 and the library data storage unit 23.
The design data for which the registration request has been received is registered in (step S1201).

Next, if the verification result of the design data does not exist, the design library information management unit 27 sets the verification rate to 0 in the library information registration management unit 37 and finishes the registration work as a design library (step S120).
2, S1206). If the verification information of the design data registered in step S1201 exists, the verification information access unit 35 extracts the verification information (step S1201).
1202, S1203).

Further, the library information registration management section 37 is
A verification rate is calculated from the verification information extracted in step S1203 (steps S1204 and S1205).

Then, the document management section 43 prompts the designer to create a document, and finishes the work of registering it in the design library (step S1206).

For example, FIG. 3 is not yet registered as a design library in the present design support apparatus, and the designer is
Suppose you want to register as a design library. Then, the design library control unit 19 causes the design library data management unit 21 to the design library data storage unit 23,
3 is registered (step S1201).

Here, if the verification information of FIG. 3 does not exist, the design library information management unit 27 registers the verification rate of FIG. 3 in the library module information storage unit 31 in the library information registration management unit 37 as 0. Then, the registration work as the design library in FIG. 3 is completed (step S1).
202, S1206). If the verification information of FIG. 3 exists, the verification information access unit 35 extracts the verification information (steps S1202 and S1203).

Further, the library information registration management section 37 is
The verification information access unit 35 is used to calculate the verification rate from the verification information extracted in step S1203 (steps S1204 and S1205). The verification rate is the number shown as 1.56% in FIG.

Then, the document management section 43 prompts the designer to create a document, and finishes the work of registering in the design library (step S1206).

As described above in the two embodiments, since the verification rate clearly indicates how much the design library data to be used has been verified, it is used as one measure of the design work. Be useful. The higher the verification rate, the higher the reliability of the design library data. In other words, the more the test data is verified, the more reliable the function is. However, it is very time-consuming and time-consuming to perform all the verifications once. Therefore,
In the present embodiment, when any design data in which the design library data registered in the library data storage unit 23 is used is verified, the verification information of the design library data in the verification is checked to check the past verification information. Compare with.

If the verification that was not performed in the past verification is performed, the information of the verification part that is not performed in the past verification is extracted, and the verification result storage unit of the corresponding design library data and the step. Add to the value of the nuclear data saved in the step saving unit, and further update the value of the verification rate.

Therefore, the accuracy of the operation of the design library data increases each time the verification is performed, so that a more correct function is guaranteed. Therefore, the designer can confirm the verification rate of the design library to be used and the verification rate of the registered design data. That is, since the designer can use the design data registered in the library while referring to the verification rate, it becomes possible to smoothly reuse the design assets. For example, when designing must be done in a short time, using only the design library data with a high verification rate makes it possible to use the design library data with great peace of mind and guarantees the function of the design library data. Therefore, it becomes easy to set the target of the debug location, and the verification work and the correction work of the design data can be easily performed.

Since the verification rate can be improved each time the design library data is used, it is possible to improve the quality of the design library while using it.

[0053]

As described above, according to the design support apparatus and method according to the present invention, it is possible to flexibly use abundant libraries, which leads to shortening the design period in many cases.

Furthermore, if the verification rate is used not only for the design library, but also for the design data currently under design in a similar manner, it is easy to establish a guideline for the design. A wide range of application methods are conceivable, such as leading to shortening.

[Brief description of drawings]

FIG. 1 is a block diagram showing a hardware configuration of a design support device according to the present invention.

FIG. 2 is a diagram showing an example of a flowchart of a processing procedure of the design support apparatus according to the present invention.

FIG. 3 is a diagram showing an example of design library data stored in a library data storage unit 23.

FIG. 4 is a diagram showing an example of the test data of FIG.

5 is a diagram showing an example of verification information when verifying FIG. 3 according to FIG. 4;

6 is a diagram showing an example of design data using the design library data of FIG.

FIG. 7 is a diagram showing an example of verification information of FIG.

FIG. 8 is a diagram showing an example of the updated test data of FIG.

9 is a diagram showing an example of the updated verification information of FIG.

10 is a diagram showing a circuit configuration described by the design data of FIG.

11 is a diagram showing the difference information of FIG. 3 among the verification information of FIG. 7.

FIG. 12 is a diagram showing an example of a flowchart of registration processing in a design library storage unit.

[Explanation of symbols]

 1 Input Section 3 Command Analysis Section 5 Central Control Section 7 Design Data Input Section 9 Design Data Storage Section 11 Verification Section 13 Verification Result Storage and Storage Section 15 Test Data Generation Section 17 Generated Test Data Storage Section 19 Design Library Control Section 21 Design Library Data Management unit 23 Design library data storage unit 27 Design library information management unit 29 Library data access unit 31 Library module information storage unit 33 Difference extraction unit 35 Verification information access unit 37 Library information registration management unit 43 Document management unit 45 Document storage unit 47 Design Tools

Claims (2)

[Claims] 1. A design support apparatus having a library module information storage unit for storing verification information of a library module including at least a verification rate indicating a degree of verification of each library module registered in a design library, wherein the library LSI designed using modules
Is verified, the verification information access unit for extracting verification information of the library module, the verification information stored in the library module information storage unit for the used library module, and the verification information access unit. A difference extraction unit that extracts a difference from the extracted verification information, a verification rate is calculated using the extracted difference, and the verification rate and the registration information of the library module verification information stored in the library module information storage unit are registered. Alternatively, the design support apparatus is provided with a library information registration management unit for updating, and a library information management unit having 2. A method for supporting design by using a library module information storage unit in which verification information of a library module including at least a verification rate indicating a degree of verification of each library module registered in a design library is stored. Then, when the LSI designed using the library module is verified, the verification information for each library module used and the past library module stored in the library module information storage unit corresponding to the verification information The design support method is characterized in that the performance of library information used for design is improved by extracting the difference information from the verification information and calculating a new verification rate from the difference information to increase the verification rate.