JPH0997796A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a check pattern from being deformed in a photolithography process. SOLUTION: For instance, a first wiring layer 5-1, a BPSG film 4, and a field oxide film 2-2 are formed under a through-hole main scale pattern 7-2A and a resist vernier scale pattern 9-2A used for reading deviation in a lithography process where a second wiring conductive film 8 is patterned, whereby a pattern is protected against deformation caused by defocus of the resist vernier scale pattern 9-2A.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to forming a resist check pattern in a photolithography process.

[0002]

2. Description of the Related Art In a conventional method of manufacturing a semiconductor device, a resist check pattern in a photolithography process is
It was made right above the silicon substrate in the scribe area.

The manufacturing steps will be described in order with reference to FIG. First, a thickness of about 8 is formed on the silicon substrate 1 by using the selective oxidation method.
A field oxide film 2 of 00 nm is formed. Here, the field oxide film 2 is not provided in the scribe region on the boundary between the chip regions.

Next, a silicon oxide film (BPSG film 4) containing boron or boron is chemically vapor-deposited (thickness: about 700 n).
m), and at the same time as etching for forming a contact hole (not shown), BPSG of the scribe region 3
The film 4 is removed. Then, after forming the first wiring layer 5 made of, for example, an aluminum film having a thickness of about 600 nm and forming the interlayer insulating film 6, patterning and etching are performed to form the through hole 7-1 and the through hole main-scale pattern 7-. Form 2. Then, a second wiring conductive film 8 made of an aluminum film or the like is deposited to a thickness of about 800 nm, and then a photoresist is applied, exposed and developed to develop a second wiring layer resist pattern 9-1 and a resist subscale. Pattern 9
-2 is formed. The second wiring layer resist pattern is an etching mask for patterning the second wiring conductive film 8 to form a second wiring layer (connected to the wiring layer through the through hole 7-1). Reference numeral -2 forms a caliper-like measuring means together with the through-hole main-scale pattern 7-2, and is for measuring the alignment accuracy between the through-hole and the photomask for forming the second wiring layer.

[0005]

As described above, in the conventional method for manufacturing a semiconductor device, since the check pattern made of the resist film in each lithography process is formed directly on the silicon substrate, the later the process is performed. The height difference between the internal pattern (the resist film pattern originally necessary for forming a semiconductor device) and this check pattern has become large. Therefore, the check pattern is
In the defocused state, the pattern is transferred from the photomask and the shape collapses, the measurement for reading the misalignment cannot be read accurately, or the check function such as the sharpness check pattern does not reflect the state of the internal pattern is impaired. There was a problem that it would end up.

An object of the present invention is to provide a semiconductor device manufacturing method capable of forming a check pattern without impairing the check function.

[0007]

A method of manufacturing a semiconductor device according to the present invention comprises a step of preparing a semiconductor wafer having a plurality of chip areas divided by scribe areas, and a first insulating film on the semiconductor wafer. (Or a first conductive film) is deposited, a resist film is formed, and the first pattern originally necessary for forming a semiconductor device and the shape, size, or relative position of the first pattern to the underlying pattern are determined. A method of manufacturing a semiconductor device, which includes a step of processing the resist film into a check pattern for checking, has a means for making the height of the surface of the check pattern equal to the height of the surface of the first pattern. It is a thing.

In this case, a conductive film (or an insulating film) immediately below a predetermined portion of the first pattern is selectively left on the scribe region, and a check pattern is formed on the conductive film (or insulating film) to form the surface height of the check pattern and the above-mentioned. The height of the surface of the first pattern can be made equal.

Further, it is possible not to form the field insulating film in the portion of the scribe region near the chip region.

Since the heights of the check pattern and the first pattern are made equal to each other, it is possible to avoid the check pattern from being deformed due to focus.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a sectional view of a semiconductor wafer for explaining one embodiment of the present invention.

First, by using a selective oxidation method on the surface portion of the silicon substrate 1, a field oxide film 2-1 for element isolation and a field oxide film 2- for height adjustment having a thickness of about 800 nm are formed.
2 are selectively formed in the chip area and the scribe area 3. The field oxide film 2-2 is not formed in the scribe regions 3a and 3b at the boundary with the chip region. Then, a silicon oxide film containing boron or boron is chemically vapor-deposited (thickness: about 700 nm) and reflowed by a high temperature (900 ° C.) treatment to form a BPSG film 4. Then, an aluminum film having a thickness of about 600 nm is deposited and patterned to form a first wiring layer 5-1 and a first wiring layer 5-2 for height adjustment on the chip region and the scribe region, respectively.
Then, after forming the interlayer insulating film 6, patterning is performed to form the through hole 7-1A and the through hole main-scale pattern 7-2A on the chip region and the scribe region 3, respectively. Next, after depositing an aluminum film (conductive film 8 for the second wiring layer) to a thickness of about 800 nm, a photoresist is applied, exposed, and developed to form a second wiring layer resist pattern 9-1A and a resist subscale pattern. 9-2A
To form

A second wiring layer resist pattern 9-1A for forming a second wiring layer, a through hole main-scale pattern 7
-2A, the height of the resist sub-scale pattern 9-2A (the maximum vertical distance from the surface of the silicon substrate 1 to each surface) which becomes a caliper-like measuring means becomes the same in design. , Resist sub-scale pattern 9-2A
It is possible to prevent the formation collapse due to the dehocus and to prevent the check function from being impaired.

The photolithography process for forming the second wiring layer has been described above as an example, but the photolithography process for patterning an arbitrary conductive film or insulating film such as the second through hole and the third wiring layer can be used. Applicable. Although the vernier pattern is taken as an example of the check pattern, the check pattern is not limited to this and may be any pattern for checking the shape, size, or relative position of the internal pattern with respect to the underlying pattern.

[0015]

As described above, the present invention has means for making the check pattern made of the resist film and the internal pattern in the photolithography process have the same height, so that the shape loss due to defocusing can be prevented. Therefore, it is possible to form a check pattern that accurately reflects the state of the internal pattern. Therefore, workability and reliability of the process check can be improved, and semiconductor devices can be manufactured with high yield.

[Brief description of drawings]

FIG. 1 is a sectional view for explaining an embodiment of the present invention.

FIG. 2 is a cross-sectional view for explaining a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Silicon substrate 2,2-1,2-2 Field oxide film 3 Scribing region 3a, 3b Peripheral part of a scribe region 4 BPSG film 5,5-1,5-2 First wiring layer 6 Interlayer insulating film 7-1, 7-1A Through hole 7-2, 7-2A Through hole main scale pattern 8 Second wiring conductive film 9-1, 9-1A Second wiring resist pattern 9-2, 9-2A Resist sub-scale pattern

Claims (3)

[Claims] 1. A step of preparing a semiconductor wafer having a plurality of chip regions divided by scribe regions, and a first insulating film (or a first conductive film) on the semiconductor wafer.
Is deposited, a resist film is formed, and a check pattern for checking the first pattern originally necessary for forming a semiconductor device and the shape, size, or relative position of the first pattern to the underlying pattern is used. A method of manufacturing a semiconductor device, which comprises a step of processing a resist film, further comprising means for making a height of a surface of the check pattern equal to a height of a surface of the first pattern. Method. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the conductive film (or insulating film) immediately below a predetermined portion of the first pattern is selectively left on the scribe region and a check pattern is formed thereon. 3. The method of manufacturing a semiconductor device according to claim 2, wherein the field insulating film is not formed in a portion of the scribe region near the chip region.