JPH0998568A - Power supply circuit - Google Patents

Abstract

(57) [Abstract] [Purpose] The purpose is to stop the operation of the control circuit when the secondary side output voltage is short-circuited with GND, and improve safety and reliability. [Structure] Means 4 for detecting the voltage of the secondary side output voltage terminal
1, a means for transmitting the information detected by the means to the primary side control circuit, a means for detecting a current flowing through the transmission means, and a state in which the current value detected by the current detection means is zero is constant. And a control means 5 for stopping the operation of the power supply in the case of continuous time.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a switching power supply circuit used in a television receiver or the like.

[0002]

2. Description of the Related Art FIG. 3 shows the configuration of a self-excited flyback converter as an example of a conventional switching power supply.

In FIG. 3, 1 is a power supply voltage, 2 is a voltage smoothing electrolytic capacitor, 3 is a transformer, 4 is a primary winding of the transformer 3, 5 is a control circuit of a switching power supply, and 6 is a field effect transistor ( Hereinafter, a switching element using a FET, 7 is a photocoupler, 8 is a secondary winding of the transformer 3, and 9, 12 and 15 are diodes for rectifying a voltage generated in the secondary winding of the transformer 3, 10 and 13. , 16 is an electrolytic capacitor for smoothing the voltage rectified by the diodes 9, 12, 15; 11, 14, 17 are secondary side DC output voltage; 18 is an error amplifier; 19 and 20 are current limiting resistors;
Reference numeral 21 is a resonance capacitor connected between the drain and source terminals of the FET 6, 22 is a minute resistor for detecting the current flowing in the FET 4, 23 and 24 are resistors for voltage division, 25 is a noise removing capacitor, and 26 is a gate of the FET 4. resistance,
Reference numeral 27 is a bias winding of the transformer 3, 28 is a diode for rectifying the voltage generated in the bias winding 27, 29 is a noise removing resistor, 30 is an electrolytic capacitor for smoothing the voltage rectified by the diode 28, and 31 and 32 are delays. Resistor and capacitor constituting the integrating circuit for use, 33 is a Zener diode for detecting overvoltage, 34 is a starting resistor, 35 is a ground terminal for the power supply voltage 1, 36 is an output terminal for driving the FET 6 of the control circuit 5, 37 is a control circuit 5 Overcurrent protection input terminal, 3
8 is a transformer reset detection input terminal of the control circuit 5, 39
Is a ground terminal of the control circuit 5, 40 is a feedback input terminal of the control circuit 5, 41 is an overvoltage protection input terminal of the control circuit 5, 42 is a power supply voltage input terminal of the control circuit 5, and 43 is a short circuit of the secondary side output voltage 14. It is a detection diode.

Next, the operation will be described with reference to FIG.
FIG. 4 shows the waveform of each part in the steady state.

In FIG. 4, (a) is the drive waveform VOUT of the FET 6 output by the control circuit 5, and (b) is the FET.
In the current waveform ID flowing through 6, the direction from the drain terminal to the source terminal is positive. (C) is a voltage waveform VCL in which the current ID is detected as a voltage by the minute resistor 22, divided by the resistors 23 and 24, and noise is removed by the capacitor 25,
(D) is the drain-source voltage VDS of FET6,
(E) is the output voltage of the bias winding 27, and (f) is the voltage waveform VDL integrated by the integrating circuits 31 and 32 and input to the control circuit 5.

When VOUT becomes H at time t1, FET6
Turns on and current ID starts to flow. At that time, a magnetic flux is generated in the transformer 3 by the primary current flowing in the primary winding 4 to accumulate energy, and at the same time, an induced voltage is also generated in the secondary winding 8 of the transformer 3, but the secondary side rectifying diode 9 1
Since the induced voltage is generated in the direction in which 2 and 15 are reversely biased, the secondary side current does not flow. At this time, an induced voltage is also generated in the bias winding 27 at the same time.
Since it is constructed so that it is generated in a phase opposite to OUT, VS becomes a negative voltage at this time, and the waveform VDL input to the control circuit 5 through the integrating circuits 31 and 32 is clamped in the control circuit 5. Clamped to 0V by the circuit. When the ON period determined by the control circuit 5 ends, time t
At 2, VOUT becomes L and FET6 turns off. When the FET 6 is turned off, a flyback voltage is generated in the primary winding 4 and at the same time a flyback voltage is generated in the secondary winding 8 as well.
Since a voltage is applied in the direction of forward biasing the secondary side rectifying diodes 9, 12, 15, the energy accumulated in the transformer 3 is released as a secondary current through the secondary winding 8, and the smoothing capacitors 10, 13 are formed. , 16 and smoothed and output as DC power supply voltages 11, 14, and 17. At this time, the flyback voltage VS generated in the primary side bias winding 27 becomes a waveform like VDL by the integrating circuits 31 and 32 and is input to the control circuit 5. When all the energy stored in the transformer 3 is discharged as a secondary current at time t3, the flyback voltage induced in the secondary winding 8 is inverted and the secondary side rectifying diodes 9, 12, 15 are reverse biased. Therefore, the secondary current is turned off. The flyback voltage generated in the primary winding is also inverted, and the energy stored in the resonance capacitor 21 is released and the primary winding 4
Since it starts to resonate with the inductance of, the drain-source voltage VDS of the FET 6 decreases as shown in (c). At this time, the control circuit 5 sets the integration constants 31 and 32 so that VDL becomes 0 V at time t4.
It turns on at 4, and VOUT outputs H. The operation after VOUT becomes H is the same as the operation from time t1.

Next, the operation of stably controlling the output voltage will be described. The error amplifier 18 has a built-in reference voltage. If the power supply voltage 11 is lower than the reference voltage, the current flowing through the light emitting diode of the photocoupler 7 decreases, the base current of the light receiving transistor decreases, and the collector current also decreases. When the collector current decreases, the control circuit 5 extends the ON period of VOUT to increase the current flowing in the FET 6 and increase the energy stored in the transformer 3 per unit time. At this time, the current flowing through the secondary winding also increases, energy is accumulated in the capacitor-10, and the power supply voltage 11 rises. When the power supply voltage 11 becomes higher than the reference voltage of the error amplifier 18, the power supply voltage 11 is lowered by the operation completely opposite to the above. In this way, even if the voltage of the power supply voltage 11 fluctuates, the voltage is controlled to be always constant.

Next, the operation of the protection circuit will be described. First, overcurrent protection will be described with reference to FIG. Time t1
When VOUT becomes H and FET6 is turned on, a current ID starts to flow in FET6, and the voltage waveform VCL is input to the control circuit 5 corresponding to the ID. Now ID continues to rise and V
When CL reaches the threshold value Vth at time t2, the control circuit 5 immediately lowers VOUT to L. When VOUT becomes L, FE
Since T6 is turned off, the current ID is also turned off, and the current does not continue to flow, and the FET6 is protected from destruction due to overcurrent. It should be noted that this operation operates for each pulse of VOUT and does not stop the operation of the power supply. Therefore 2
Even if the load on the secondary side momentarily becomes overloaded, it will continue to operate without any problems. In FIG. 4, VCL has reached Vth in order to explain the overcurrent protection circuit.
In the normal load range, VCL never reaches Vth. Next, overvoltage protection will be described. If there is something wrong with the circuit and the secondary power supply voltage 11 rises,
If the coupling between the secondary winding 8 and the primary side bias winding 27 is sufficiently improved, the rectified and smoothed voltage VCC of the primary side bias winding 27 also rises. The control circuit 5 receives the voltage VOV, which is input via the Zener diode 33, from the rise of VCC.
P is monitored at the input terminal 41, and the control circuit stops the operation when VOVP reaches the threshold value. Next, a protection operation when the secondary output voltage is short-circuited with GND will be described. Output voltage 11 is GN
Assuming that the voltage is lowered due to a short circuit with D, if the secondary winding 8 and the primary side bias winding 27 are configured to be sufficiently coupled with each other as described above, the primary side bias winding 27
Also, the rectified and smoothed voltage Vcc of V.sub.2 decreases. VCC goes down,
The control circuit 5 stops its operation when it falls below a preset operation stop voltage of the control circuit 5. If the control circuit 5 stops operating, the control circuit does not consume current, so Vcc
Does not drop below that value, but on the contrary, since the electrolytic capacitor 30 is charged through the resistor 34, VCC rises. VCC rises and reaches the starting voltage of the control circuit 5 again, and the power supply starts. However, since the output voltage 11 is short-circuited to GND as described above, Vcc decreases and the control circuit 5 stops again. As described above, while the output voltage 11 is short-circuited to GND, the start / stop is repeated (hereinafter referred to as intermittent oscillation). Here, the operation stop voltage of the control circuit 5 is VCC
It is set lower than the starting voltage so that it will not stop due to voltage fluctuations or noise. Next, the case where the output voltage 17 is short-circuited with GND will be described. If the coupling between the secondary winding of the output voltage 17 and the primary bias winding 27 is good, the intermittent oscillation mode is reached as in the case of the output voltage 11,
Generally, a winding with a low output voltage has a small number of turns, so
The coupling with the secondary side bias winding 27 is poor and the following operation is performed. Since the output voltage 17 supplies the power supply voltage to the photocoupler 7 through the resistor 20, the current flowing through the photocoupler 7 becomes almost zero when the output voltage 17 decreases. Then, the collector current of the phototransistor on the light receiving side becomes zero, the control circuit 5 extends the ON period to increase the current flowing through the FET 6, and increases the energy accumulated in the transformer 3 per unit time. The voltage rises and the rectified voltage Vcc also rises. When the voltage VOVP via the Zener 33 reaches the threshold value of the overvoltage protection detection terminal 41, the control circuit 5 stops its operation. Next, a case where the output voltage 14 is short-circuited with GND will be described. Since the winding of the output voltage 14 is poorly coupled with the bias winding 27 as in the case of the output voltage 17, the voltage on the anode side of the photodiode 7 is forcibly dropped by the short detection diode 43, and the current of the photodiode 7 is made zero. As in the case of the output voltage 17, the primary side VCC is raised and stopped by the overvoltage protection of the control circuit 5.

[0009]

However, in the above configuration, when the output voltage on the secondary side is short-circuited with GND, the above operation is not always performed due to the load condition on the secondary side or the routing of the pattern. In some cases, a fuse resistor must be inserted in the output voltage on the secondary side in order to prevent such burning.

SUMMARY OF THE INVENTION It is an object of the present invention to solve the above-mentioned conventional problems and to provide a power supply circuit in which a protection operation is easy when the secondary power output voltage is shorted to GND.

[0011]

In order to achieve the above object, the power supply circuit of the present invention comprises means for detecting the voltage of the secondary side output voltage terminal and primary side control of the information detected by said means. Means for transmitting to the circuit, means for detecting a current flowing through the transmitting means, and control means for stopping the operation of the power supply when the state in which the current value detected by the current detecting means is zero continues for a certain time. It has a configuration including.

[0012]

With this configuration, when the secondary side output voltage is short-circuited to GND, the operation of the power supply can be stopped by the signal from the current detecting means.

[0013]

【Example】

(Embodiment 1) An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a self-exciting flyback converter which is an embodiment of the present invention. 1 in this figure
3 to 43 are the same as the conventional example shown in FIG.

44, 45, 46 and 47 are transistors,
48 to 53 are resistors, 54 is an electrolytic capacitor, and 55 is a diode.

Next, the operation will be described with reference to FIG.
(A) is the voltage VO of the output voltage 14, (b) is the collector current IFB of the photocoupler 7, (c) is the terminal voltage VSHORT of the electrolytic capacitor 54, and (d) is the terminal voltage VOVP of the overvoltage detection terminal 41 of the control circuit 5. Is. During the normal operation in which the secondary side output is not short-circuited, a current flows in the feedback current IFB of the control circuit 5 so as to stabilize the secondary side output 11. Transistors 44, 45 and 46,
47 has a current mirror configuration, and the same current as IFB flows through the transistor 45 and at the same time, the transistor 4
It also flows to 7. The transistor 4 is provided in the electrolytic capacitor 54.
The emitter voltage of 7 is charged via the resistor 53. However, since the transistor 47 conducts during normal operation, the emitter voltage, that is, the electrolytic capacitor 5
The voltage of 4 is set to be lower than the threshold value of the overvoltage detection terminal 41. When the output voltage 14 drops to 0 V at time t1, the feedback current I of the control circuit 5
FB becomes almost zero as already explained. Since no current flows through the transistor 47 through the current mirror transistors 45 and 46, the emitter voltage of the transistor 47 becomes almost Vcc, the electrolytic capacitor 54 is charged through the resistor 53, and the voltage VSHORT of the electrolytic capacitor 54 rises. go. Since the voltage VSHORT of the electrolytic capacitor 54 is input to the overvoltage detection terminal 41 via the diode 55, when the terminal voltage of the overvoltage detection terminal 41 reaches the threshold value at time t2, the control circuit 5 stops its operation.

A fixed time (several tens of msec to 100 msec) until the power source is activated and each voltage on the secondary side rises.
Has a small IFB and the voltage of the electrolytic capacitor 54 rises, but the time from t1 to t2 is several hundred msec to 1se.
By setting the time constants of the resistor 53 and the electrolytic capacitor 54 so as to be c, it is possible to distinguish from when the secondary side output voltage is short-circuited.

Further, the control circuit 5 is generally integrated into an IC, and if the protection circuit of the present invention is formed in the IC, no increase in cost will occur.

With the above construction, when the secondary side output voltage is continuously short-circuited to GND, the circuit can be stably protected without increasing the cost.

In addition, the fuse resistance inserted in each output voltage on the secondary side can be deleted, and the cost can be reduced.

[0021]

As described above, according to the power supply circuit for television of the present invention, the protection operation when the secondary side output voltage is short-circuited with GND becomes easy and reliable, and the power supply is safe and reliable. Can be improved.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a power supply circuit according to an embodiment of the present invention.

FIG. 2 is a diagram showing operation waveforms of a power supply circuit according to an embodiment of the present invention.

FIG. 3 is a configuration diagram of a conventional power supply circuit.

FIG. 4 is a diagram showing operation waveforms of the power supply circuit of the conventional example.

[Explanation of symbols]

 1 Power Supply Voltage 2 Electrolytic Capacitor 3 Transformer 4 Primary Winding 5 Control Circuit 6 FET 7 Photocoupler 8 Secondary Winding 9, 12, 15 Rectifying Diode 11, 14, 17 Power Supply Voltage 18 Error Amplifier 21 Resonance Capacitor 22 Current Detection Micro resistance 27 Bias winding 35 Ground 41 Overvoltage detection terminal 43 Short circuit detection diode 44, 45, 46, 47 Transistor 53 Resistor 54 Electrolytic capacitor 55 Diode

Claims (1)

[Claims] 1. A means for detecting the voltage of a secondary side output voltage terminal, a means for transmitting the information detected by said means to a primary side control circuit, and a means for detecting a current flowing through said transmitting means. A power supply circuit comprising: a control means for stopping the operation of the power supply when the current detection means detects a current value determined for a certain period of time.