JPH10104662A - Liquid crystal display - Google Patents

Abstract

(57) Abstract: To improve the contact between a pixel electrode and a source electrode of a thin film transistor. SOLUTION: The gate signal line has a two-layer structure in which an oxide film of a material having a small electrical resistivity is formed on the surface of the material, and the drain signal line is made of a metal or an alloy thereof having a melting point of 1500 ° C or more. And a film stress of the film itself is ± 300 MPa or less.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device called an active matrix type.

[0002]

2. Description of the Related Art An active matrix type liquid crystal display device extends in the x-direction and is juxtaposed in the y-direction on one liquid crystal side surface of a transparent substrate opposed to each other via a liquid crystal. A gate signal line, and a drain signal line insulated by the gate signal line and extending in the y direction and arranged in parallel in the x direction. A rectangular region surrounded by each of the signal lines is defined as a pixel region. It is configured.

To each of these pixel regions, a thin film transistor which is turned on by a scanning signal (voltage) supplied to a gate signal line, and a video signal (voltage) supplied to a drain signal line via the thin film transistor are applied. Pixel electrode.

To each of these pixel regions, a thin film transistor which is turned on by a scanning signal (voltage) supplied to a gate signal line, and a video signal (voltage) supplied to a drain signal line via the thin film transistor are applied. And a pixel electrode made of, for example, ITO (Indium-Tin-Oxide).

Further, when the thin film transistor is turned off, the pixel electrode is held between another gate signal line adjacent to the gate signal line for driving the thin film transistor and the pixel electrode so that the pixel electrode holds the video signal for a relatively long time. An additional capacitance element is formed between them.

In such a configuration, the gate signal line is required to have a particularly low electric resistance.
This is because a so-called horizontal smear can be prevented from occurring due to the delay of the gate signal supplied to the gate signal line.

For this reason, Al or an alloy thereof is used as a material for forming the gate signal line, and when the gate signal line is disposed below the thin film transistor and the drain signal line, a hillock is formed through the insulating film. It is known that an anodized film (Al oxide film) is formed by so-called anodizing the surface since a (protrusion) is generated and short-circuited with another signal line or the like.

Further, in such a configuration, a configuration using Al or an alloy thereof as a material of the drain signal line has been attempted. When the drain signal line is disposed in a layer higher than the gate signal line and the thin film transistor, disconnection at the time of stepping over a step formed by the gate signal line and the thin film transistor can be sufficiently avoided by its low stress and coverage. It is.

However, the drain line made of Al or an alloy thereof is usually formed integrally with the drain electrode of the thin film transistor, and the drain signal line formed integrally with the drain electrode is formed of a semiconductor layer of the thin film transistor. In order to achieve good connection with the above, it is necessary to form a laminated structure in which a Cr layer is disposed below the layer.

[0010]

In this case, it has been found that the following two problems are found.

First, as one of them, the source electrode of the thin film transistor is usually formed of the same material as the drain signal line and simultaneously with the formation of the drain signal line. Considering the case where the pixel electrode is formed on a protective film formed over each signal line in order to improve the processing rate by forming the pixel electrode as large as possible without being restricted by the existence of the line. In addition, since the portion of the drain signal to be connected to the pixel electrode is made of Al or an alloy of the upper layer, the problem remains that the contact cannot be made well.

Next, when an additional capacitance is formed by directly overlapping the extension of the pixel electrode on the gate signal line whose surface is anodized, the coverage of the extension with respect to the gate signal line is not good. It is conceivable that a conductive film made of the same material as the drain signal line is further overlapped and formed at the same time as the formation of the drain signal line. There remains a problem that the anodized film on the surface of the signal line is cracked.

The present invention has been made in view of such circumstances, and an object of the present invention is to provide a liquid crystal display device in which a pixel electrode can make good contact with a source electrode of a thin film transistor.

Another object of the present invention is to provide a liquid crystal display device capable of obtaining an additional capacitance with a sufficient withstand voltage.

[0015]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

Means 1. One of the transparent substrates opposed to each other via the liquid crystal is provided with x
A gate signal line extending in the direction and juxtaposed in the y direction;
A drain signal line insulated by these gate signal lines and extending in the y direction and arranged in parallel in the x direction. Each pixel region surrounded by the gate signal lines and the drain signal lines includes:
A liquid crystal display device comprising: a thin film transistor that is turned on by a scanning signal supplied to the gate signal line; and an image electrode to which a video signal supplied to the drain signal line is applied through the turned on thin film transistor. The gate signal line has a two-layer structure in which an oxide film of the material is formed on the surface of a material having a small electric resistivity, and the drain signal line has a single layer made of a metal or an alloy thereof having a melting point of 1500 ° C. or more. And a film stress of the film itself is ± 300 MPa or less.

In the liquid crystal display device thus configured, the drain signal line is selected from the above-mentioned materials, and for example, there is an alloy of Cr and Mo, and this alloy has the same coverage property as Al. It has been confirmed that the film has not only excellent characteristics but also extremely good contact with a pixel electrode made of ITO.

Of course, the drain signal line may be a laminate of ITO, Cr and Mo alloy, and in this case, the source electrode is also a laminate of ITO and Cr-Mo alloy, so that the contact between the pixel ITO and the source electrode ITO is good. Becomes

Means 2. One of the transparent substrates opposed to each other via the liquid crystal is provided with x
A gate signal line extending in the direction and juxtaposed in the y direction;
A drain signal line insulated by these gate signal lines and extending in the y direction and arranged in parallel in the x direction. Each pixel region surrounded by the gate signal lines and the drain signal lines includes:
A thin film transistor that is turned on by a scanning signal supplied to the gate signal line, an image electrode to which a video signal supplied to the drain signal line via the turned on thin film transistor is applied, and a gate signal that turns on the thin film transistor A liquid crystal display device comprising an additional capacitance element formed by superposing a part of the pixel electrode on a neighboring gate signal line different from the line via a dielectric film, wherein the gate signal line has an electric resistivity of The drain signal line has a two-layer structure in which an oxide film of the material is formed on the surface of a small material, and the drain signal line has a one-layer structure made of a metal or an alloy thereof having a melting point of 1500 ° C. or more. The film stress is not more than ± 300 MPa, and at least the pixel electrode in the additional capacitance element crosses over the gate signal line. Conductive film is formed, the conductive film is characterized in that consisting of the drain signal lines and the same material.

In the liquid crystal display device configured as described above, at least the conductor film formed in the additional capacitance element over the gate signal line of the pixel electrode is made of the same material as the drain signal line. As a material, for example, there is an alloy of Cr and Mo.
As well as having excellent characteristics of coverage,
It has been confirmed that the oxide film on the surface of the gate signal line is never cracked through the pixel electrode made of ITO. Therefore, the withstand voltage of the additional capacitance element can be improved.

[0021]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the liquid crystal display device according to the present invention will be described with reference to the drawings.

[Embodiment 1] First, in an active matrix liquid crystal display device according to the present invention, one of the transparent glass substrates 1 which is opposed to each other with a liquid crystal interposed therebetween has a transparent glass substrate 1 on the liquid crystal side surface. a gate signal line 2 extending in the x direction and arranged in parallel in the y direction; and a drain signal line 4 insulated from these gate signal lines 2 and extending in the y direction and arranged in the x direction. A rectangular region surrounded by the gate signal line 2 and the drain signal line 4 is formed as a pixel region.

That is, by arranging a large number of these pixel regions in a matrix, an aggregate of them constitutes a display unit.

Each of these pixel regions has a thin film transistor TF in a part of a peripheral region excluding a central portion thereof.
T and an additional capacitance element Cadd are formed, and a pixel electrode 7 is formed in most of the central region.

Each of the pixel regions thus configured is provided with a common pixel electrode (a transparent electrode common to each pixel region) formed on the liquid crystal side of the other opposing transparent glass substrate via the liquid crystal.
And a pixel.

That is, in each pixel area described above,
When a scanning signal is supplied to one of the gate signal lines 2 defining the pixel area, the corresponding thin film transistor TFT is turned on, and the turned on thin film transistor TF is turned on.
A video signal supplied from the drain signal line 4 via T is supplied to the pixel electrode 7 to generate an electric field between the pixel electrode 7 and the common pixel electrode. As a result, the liquid crystal between the pixel electrode 7 and the common pixel electrode has its light transmission characteristics controlled.

In this case, the additional capacitance element C is provided between the other gate signal line 2 defining the pixel area and the pixel electrode 7.
The additional capacitance element Cadd prevents the supply of the scanning signal to the one gate signal line 2 and turns off the thin film transistor TFT, so that the video signal applied to the pixel electrode 7 is not changed. It is held relatively long between the common pixel electrode.

Next, each component described above will be described in detail.

The gate signal line 2 Fig. 2 shows a plan view of the components formed on the liquid crystal side of the transparent glass substrate 1, of which the gate signal 2
Are formed to extend in the x direction in the figure.

The gate signal line 2 is formed directly on the surface of the transparent glass substrate 1 and runs between a pixel region on the upper side and a pixel region on the lower side in the figure. About half of each whole is shown.

The gate signal line 2 is partially formed so as to also serve as the gate electrode 2A of the thin film transistor TFT formed in the upper pixel region in the figure. Is formed as a portion of the gate signal line 2 slightly extending upward in the figure.

The gate signal line 2 is formed of Al or an alloy thereof (for example, Al-Ti-Ta), and since its electric resistance is small, so-called horizontal smear on display can be prevented. ing.

The gate signal line 2 is connected to the line II of FIG.
As shown in FIG. 1 which is a cross-sectional view taken along the line, a taper is formed such that its side surface is divergent on the transparent substrate 1 side, and as a result, the cross-sectional shape has a trapezoidal shape. In the case where the drain signal line 4 and the like are formed over the gate signal line 2 like the drain signal line 4 to be formed in a later step, the drain signal line 4 and the like are prevented from being disconnected due to disconnection as much as possible. That is because

In order to prevent the occurrence of a so-called hillock (projection) which causes a short circuit between the gate signal line 2 and the drain signal line 4 formed by crossing the gate signal line 2 through an insulating film 3A to be described later. Anodized film 2O (Al oxide film) is formed on the surface (including side surfaces) of signal line 2 by anodization.

In the case of this embodiment, the thickness of the gate signal line 2 before anodization is about 300 nm, and the anodized film 2O formed by anodization is about 150 nm. As a result, Al or its alloy having a remaining thickness of about 150 nm has the original function of the signal line.

In this embodiment, the anodized film 2O formed on the surface of the gate signal line 2 has a function of preventing hillocks, and has a gate insulating film 3A in a region where a thin film transistor TFT is formed together with an insulating film 3A to be described later. As a film, at an intersection with the drain signal line 4, as an interlayer insulating film,
The region where the additional capacitance element Cadd is formed has a function as a dielectric film.

The thin film transistor TFT is a part of the region on the transparent glass substrate 1 in which the insulating film 3A and the semiconductor layer 3B are sequentially formed so as to overlap with the gate electrode 2A formed integrally with the gate signal line 2. A laminate 3 is formed.

The insulating film 3A functions as a gate insulating film together with the anodized film 2O, and the semiconductor layer 3B is a so-called i-type semiconductor layer in which impurities are not intentionally doped.

The laminated body 3 composed of the insulating film 3A and the semiconductor layer 3B is formed by performing selective etching collectively in the same photomask process, and by using SF ₆ as an etching gas at that time, the semiconductor layer 3 is formed. The etching speed of 3B becomes higher than that of the insulating film 3A, and a gentle taper is formed on the side surface of the laminate 3.

On the surface of the semiconductor layer 3B, a drain electrode 4D and a source electrode 4S are formed separately from each other. The drain electrode 4D and the source electrode 4S are formed on the surface of the semiconductor layer 3B in the formation region. For example, a contact layer doped with a high concentration n-type impurity is formed therebetween.

In this case, a layer doped with an n-type impurity is formed on the surface of the i-type semiconductor layer 3B, a drain electrode 4D and a source electrode 4S are formed, and then the drain electrode 4D and the source electrode 4S are formed. The above configuration can be obtained by etching the layer doped with the n-type impurity using the mask as a mask.

The thin film transistor T thus configured
FT indicates that the scanning signal from the gate signal line 2 is
, A channel layer is formed in the i-type semiconductor layer 3B via the gate insulating film, and conduction between the drain electrode 4D and the source electrode 4S is made via the channel layer, that is, the so-called MIS. Type transistor.

Incidentally, the names of the drain electrode 4D and the source electrode 4S of the MIS transistor are originally determined by the bias polarity between them, and in the circuit of this liquid crystal display device, the polarities are inverted during operation. The names will be switched during operation. However, in this embodiment, the side connected to the pixel electrode 7 is expressed as being fixed to the source electrode 4S for convenience of explanation.

The drain electrode 4D is formed so as to be integrated with the drain signal line 4 as will be described later, and the source electrode 4S is made of the same material as the drain electrode 4D. In addition, they are formed in the same process.

The drain signal line 4 the drain signal line 4 is formed across the laminate 3 is shown traveling on a left side of the pixel region in the y direction in FIG. A part of the drain signal line 4 is a thin film transistor TFT formed in a pixel region on the right side in the drawing.
And a part thereof is formed as a part of the drain signal line 4 slightly extending to the right side in the figure.

The drain signal line 4 is made of Cr
(50 wt%) and Mo. C
The film stress of the drain signal line 4 can be extremely reduced as compared with the case where the drain signal line is formed by using only r.

Therefore, in the portion where the drain signal line 4 formed crossing the gate signal line 2 crosses the gate signal line 2, the film stress does not occur, so that so-called disconnection can be avoided. Become like In this case, since the interlayer insulating film of each of the signal lines is only the anodized film 2O formed on the surface of the gate signal line, the step is small, and the prevention of the step disconnection is effective.

Further, since the drain signal line 4 is formed integrally with the drain electrode 4D of the thin film transistor TFT as described above, the drain signal line 4 goes over the stacked body 3 of the thin film transistor TFT. As described above, since the side surface is tapered as described above, disconnection of the step can be avoided.

Further, as described above, the source electrode 4S of the thin film transistor TFT is formed in the same step as the drain signal line 4 (drain electrode 4D).
The drain signal line 4 is formed of the same material.

Since the source electrode 4S is configured to be connected to the pixel electrode 7 via a contact, as will be described later, the source electrode 4S slightly extends to a region where the pixel electrode 7 is formed. The contact formation region is secured.

Protective Film 6 A protective film 6 made of , for example, a silicon nitride film including the drain signal lines 4 is formed over the entire upper surface of the transparent glass substrate 1 on which the drain signal lines 4 are formed. .

A contact hole 6H is formed in the protective film 6, and a part of the extension of the source electrode 4S of the thin film transistor TFT is exposed by the contact hole 6H. Through this contact hole 6H, a pixel electrode 7 to be described later is connected to a part of the extending portion of the source electrode 4S, and is connected to the source electrode 4S of the thin film transistor TFT.

Here, assuming that the protective film 6 is divided into an upper layer and a lower layer, the etching rate of the upper layer is formed so as to be higher than that of the lower layer. It is designed to be formed in a smooth shape. This contact hole 6H
Thereby, the pixel electrode 7 is connected to the source electrode 4S without disconnection.

Although not shown, the protective film 6
In the formation of the contact hole 6H, openings are formed to expose one end in the direction in which the gate signal line 2 extends and one end in the direction in which the drain signal line 4 extends. The terminal is configured to be formed.

Pixel electrode 7 On the upper surface of the protective film 6, for example, ITO (Indium-Tin-O
xide) is formed. Thus, the pixel electrode 7 can be increased in area without being restricted by the existence of the gate signal line 2 or the drain signal line 4, and the aperture ratio can be improved.

The pixel electrode 7 is formed so as to cover at least a portion where the contact hole 7H is formed, so that the pixel electrode 7 is
H is connected to a part of the source electrode 4S exposed from H.

In this case, as described above, since the contact hole 7H formed in the protective film 6 is formed with a smooth step, the pixel electrode 7 is not cut off at the source electrode without disconnection. 4S.

Here, the source electrode 4S is made of an alloy of Cr and Mo as described above, and it has been recognized that this metal has good contact properties with ITO. Good contact with the electrode 7 can be achieved.

FIG. 3 is a graph showing the contact resistance with respect to the contact area in the contact hole 7H. As is clear from the figure, it is confirmed that the contact resistance of the source electrode 4S with respect to the pixel electrode 7 is significantly smaller than, for example, the case where the source electrode 4S is made of a material consisting only of Cr.

The pixel electrode 7 is overlapped with a part of the gate signal line 2 adjacent to the gate signal line 2 for turning on the thin film transistor TFT corresponding to the pixel electrode 7 via the protective film 6. The additional capacitance element Cadd is configured in this superimposed portion (FIG. 2).
Indicates that the pixel electrode 7 in the pixel region positioned below the gate signal line 2 is formed so as to overlap the gate signal line 2).

One electrode is formed in a region where the additional capacitance element Cadd is overlapped with the pixel electrode 7 of the gate signal line 2, and the other electrode is formed in a region where the pixel electrode 7 is overlapped with the gate signal line 2. The anodized film 2O and the protective film 6 formed on the surface of the signal line 2 have a function as a dielectric film.

The liquid crystal display device thus constructed is formed of an alloy of Cr and Mo as a material of the drain signal line 4, and this alloy has not only characteristics excellent in coverage like Al, but also characteristics thereof. , ITO pixel electrode 7
And the contact property becomes extremely good.

Embodiment 2 FIGS. 4 and 5 are structural views showing another embodiment of the liquid crystal display device according to the present invention.

Only the parts different from the structure of the first embodiment will be described below.

Pixel electrode 7 The pixel electrode 7 is formed directly on the surface of the transparent glass substrate 1. That is, unlike the case where the gate signal line 2 is formed on the upper surface of the protective film 6 as shown in the first embodiment, the gate signal line 2 is formed in the same layer.

The pixel electrode 7 is formed after the formation of the anodized gate signal line 2 and its thin film transistor TF
In the vicinity of the formation region of T, the thin film transistor TF
An extension portion for making contact with the source electrode 4S of T is provided, and an extension portion 7A for overlapping the gate signal line 2 for turning on the thin film transistor TFT and another gate signal line 2 adjacent thereto is provided. It is equipped.

The extending portion 7A of the pixel electrode 7 for overlapping with the gate signal line 2 constitutes one electrode of an additional capacitance element Cadd described later.

Although the structure of the thin film transistor TFT itself is not different from that of the first embodiment, the insulating film 3A and the semiconductor
B and the pattern of the laminate 3 are different. Insulating film 3A
3 is formed so as to extend to the intersection of the drain signal line 2 with the gate signal line 2, and the anodized film 2 O formed on the surface of the gate signal line 2 is formed.
Together, they constitute an interlayer insulating film.

[0069] Although the difference is not the case the drain signal line 4 the drain signal line 4 itself of Example 1, a source electrode 4S of the thin film transistor TFT formed simultaneously therewith, the span thereof extending portion until the pixel electrode 7 formed At this point, connection with the pixel electrode 7 is established.

As described above, the source electrode 4S is composed of Cr and M
It has been confirmed that this alloy can make good contact with the pixel electrode 7 made of ITO.

The extension of the pixel electrode 7 is formed so as to overlap the gate signal line 2 in which the surface of the additional capacitance element Cadd is anodized.

The additional capacitance element Cadd is formed by forming the gate signal line 2 on one electrode, extending the pixel electrode 7 on the other electrode, and forming an anodized film on the gate signal line 2 sandwiched between the electrodes. 2O is configured as a dielectric film.

In this case, since the drain signal line 4 is formed in a subsequent step, the other electrode of the additional capacitance element Cadd, that is, the pixel electrode 7 is utilized by utilizing the formation of the drain signal line 4. A conductive film 10 made of the same material as that of the drain signal line 4 is formed in the extended portion 7A, and the conductor film 10 reinforces the coverage of the extended portion of the pixel electrode 7 to the gate signal line 2. It has become.

That is, the extending portion of the pixel electrode 7 formed so as to be superimposed on the gate signal line 2 is made of ITO, so that the anodized film 2 O formed on the surface of the gate signal line 2 is The poor coverage property is reinforced by the conductive film 10.

In this case, since the conductive film 10 is composed of Cr and Mo as described above, its film stress is extremely small, and therefore, the anode formed on the surface of the gate signal line 2 via ITO is formed. An effect that cracks, pinholes, peeling, and the like are not generated in the chemical conversion film 2 is obtained.

Further, since it is sufficient that the conductive film 10 is overlapped with the extending portion 7A of the pixel electrode 7, the area occupied by the additional capacitance element Cadd can be reduced with miniaturization of the pixel. Will be played.

Protective Film 6 The protective film 6 for preventing the liquid crystal from directly contacting the thin film transistor TFT and preventing the liquid crystal from being contaminated by the material of each signal line is provided at a central portion excluding the periphery of the pixel electrode 7. Is formed with an opening exposing most of it.

In the thus constructed liquid crystal display device, the conductor film 10 formed at least on the pixel electrode 7 over the gate signal line 2 in the additional capacitance element Cadd is made of Cr of the same material as the drain signal line 4. And Mo
This alloy not only has excellent coverage characteristics like Al, but also cracks anodized film on the surface of the gate signal line 2 via the pixel electrode 7 made of ITO. It has been confirmed that there is no such thing. Therefore, the withstand voltage of the additional capacitance element Cadd can be improved.

In each of the above embodiments, the drain signal line 4
Although an alloy of Cr and Mo is used as a material of the above, it is needless to say that the present invention is not limited to this. Any material can be used as long as the material is made of a metal or an alloy thereof having a melting point of 1500 ° C. or more and has a film stress of ± 300 MPa or less.

In each of the above embodiments, the drain signal line is shown as a single-layer structure. However, the same effect can be obtained by forming the upper layer as a two-layer structure made of Al, its alloy, or ITO. Obtainable.

Further, in each of the above-described embodiments, an electric field is generated between the pixel electrode and the common pixel electrode disposed on the side of the other transparent glass substrate via the liquid crystal through the liquid crystal. This is a description of a so-called vertical electric field type liquid crystal display device that controls transmittance.

However, the present invention is not limited to this liquid crystal display device. A reference electrode is provided adjacent to the pixel electrode on the same transparent glass substrate on which the pixel electrode is formed. It is needless to say that the present invention can be applied to a so-called in-plane switching type liquid crystal display device in which an electric field is generated substantially in parallel with the transparent glass substrate to control the light transmittance of the liquid crystal during the electric field.

[0083]

As is apparent from the above description,
According to the liquid crystal display device of the present invention, it is possible to improve the contact between the pixel electrode and the source electrode of the thin film transistor. Further, it is possible to obtain an additional capacitance with a sufficient withstand voltage.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing one embodiment of a liquid crystal display device according to the present invention, and is a view showing a cross section taken along line II of FIG.

FIG. 2 is a plan view showing one embodiment of a liquid crystal display device according to the present invention.

FIG. 3 is an explanatory diagram showing an effect of the liquid crystal display device according to the present invention.

FIG. 4 is a plan view showing another embodiment of the liquid crystal display device according to the present invention.

FIG. 5 is a sectional view taken along line VV in FIG. 4;

[Explanation of symbols]

TFT ... Thin film transistor, Cadd ... Additional capacitance element, 2 ... Gate signal line, 3A ... Insulating film, 3B ... Semiconductor layer, 4 ... Drain signal line, 6 ... Protective film, 7 ...
Pixel electrode.

Claims (9)

[Claims] 1. A gate signal line extending in the x direction and juxtaposed in the y direction on a liquid crystal side surface of one of the transparent substrates opposed to each other via a liquid crystal. A drain signal line insulated by the gate signal line and extending in the y direction and juxtaposed in the x direction; and supplying the gate signal line to each pixel region surrounded by the gate signal line and the drain signal line. A liquid crystal display device comprising: a thin film transistor that is turned on by a scanning signal that is turned on; and an image electrode to which a video signal that is supplied to the drain signal line via the turned on thin film transistor is applied. The drain signal line has a two-layer structure in which an oxide film of the material is formed on the surface of a material having a small resistivity, and the drain signal line is made of a metal or an alloy thereof having a melting point of 1500 ° C. or more. A liquid crystal display device having a single-layer structure, wherein the film itself has a film stress of ± 300 MPa or less. 2. A gate signal line extending in the x-direction and juxtaposed in the y-direction on a liquid crystal side surface of one of the transparent substrates disposed opposite to each other with the liquid crystal interposed therebetween. A drain signal line insulated by the gate signal line and extending in the y direction and juxtaposed in the x direction; and supplying the gate signal line to each pixel region surrounded by the gate signal line and the drain signal line. A liquid crystal display device comprising: a thin film transistor that is turned on by a scanning signal that is turned on; and an image electrode to which a video signal that is supplied to the drain signal line via the turned on thin film transistor is applied. The drain signal line has a two-layer structure in which an upper layer is made of Al or an alloy thereof, in addition to a two-layer structure in which an oxide film of the material is formed on the surface of a material having a small resistivity. With a melting point of 15
A liquid crystal display device, wherein a metal or an alloy thereof having a temperature of 00 ° C. or more is used, and a film stress of a film of the drain signal line itself is ± 300 MPa or less. 3. The liquid crystal display device according to claim 1, wherein the pixel electrode is made of ITO and is formed on the lowermost layer of the transparent substrate together with the gate signal line. 4. The liquid crystal display device according to claim 1, wherein the pixel electrode is made of ITO and is formed on an upper surface of a protective film for protecting the thin film transistor from liquid crystal. 5. A gate signal line extending in the x-direction and juxtaposed in the y-direction on a liquid crystal side surface of one of the transparent substrates opposed to each other via the liquid crystal, and A drain signal line insulated by the gate signal line and extending in the y direction and juxtaposed in the x direction; and supplying the gate signal line to each pixel region surrounded by the gate signal line and the drain signal line. A thin film transistor that is turned on by the scanning signal that is turned on, an image electrode to which a video signal that is supplied to the drain signal line via the turned on thin film transistor is applied, and an adjacent gate signal line that turns on the thin film transistor. In a liquid crystal display device comprising: an additional capacitance element formed by superposing a part of the pixel electrode on a gate signal line via a dielectric film, the gate signal line comprises an electrical resistor. The drain signal line has a two-layer structure in which an oxide film of the material is formed on the surface of a material having a low rate, and the drain signal line has a one-layer structure made of a metal or an alloy thereof having a melting point of 1500 ° C. or more. The film stress of itself is not more than ± 300 MPa, and a conductor film is formed at least in a portion of the additional capacitance element that goes over the gate signal line of the pixel electrode, and the conductor film is made of the same material as the drain signal line. Characteristic liquid crystal display device. 6. A gate signal line extending in the x-direction and juxtaposed in the y-direction on a liquid crystal side surface of one of the transparent substrates disposed opposite to each other with the liquid crystal interposed therebetween. A drain signal line insulated by the gate signal line and extending in the y direction and juxtaposed in the x direction; and supplying the gate signal line to each pixel region surrounded by the gate signal line and the drain signal line. A thin film transistor that is turned on by the scanning signal that is turned on, an image electrode to which a video signal that is supplied to the drain signal line via the turned on thin film transistor is applied, and an adjacent gate signal line that turns on the thin film transistor. In a liquid crystal display device comprising: an additional capacitance element formed by superposing a part of the pixel electrode on a gate signal line via a dielectric film, the gate signal line comprises an electrical resistor. A two-layer structure in which an oxide film is formed of the material on the surface of the material having small percentage, and the drain signal line is made of two-layer structure in which the upper layer is an Al or an alloy, the melting point as the underlying 1
A metal or an alloy thereof of 500 ° C. or more is used, and the film stress of the film itself of the drain signal line is ± 300 MPa or less, and a conductor film is formed at least in a portion of the additional capacitance element that crosses over the gate signal line of the pixel electrode. The liquid crystal display device, wherein the conductive film is formed of the same material as the drain signal line. 7. The liquid crystal display according to claim 1, wherein the gate signal line is made of Al or an alloy thereof, and a surface thereof is formed with an anodic oxide film. apparatus. 8. A material having a one-layer structure made of a metal or an alloy thereof having a melting point of 1500 ° C. or more, and having a film stress of ± 300 MPa or less made of an alloy of Cr and Mo. Claims 1, 2, 5,
7. The liquid crystal display device according to any one of 6. 9. A reference electrode is formed on the transparent substrate so as to be adjacent to the pixel electrode, and an electric field is generated between the pixel electrode and the reference electrode substantially in parallel with the surface of the transparent substrate. A liquid crystal display device for controlling light transmittance of liquid crystal between the liquid crystal display and the liquid crystal display device.
The liquid crystal display device according to any one of 6, 7, and 8.