JPH10106809A - Chip type thermistor and manufacturing method thereof - Google Patents
Chip type thermistor and manufacturing method thereofInfo
- Publication number
- JPH10106809A JPH10106809A JP8261856A JP26185696A JPH10106809A JP H10106809 A JPH10106809 A JP H10106809A JP 8261856 A JP8261856 A JP 8261856A JP 26185696 A JP26185696 A JP 26185696A JP H10106809 A JPH10106809 A JP H10106809A
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- Japan
- Prior art keywords
- thermistor
- chip
- terminal electrode
- terminal electrodes
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Thermistors And Varistors (AREA)
- Details Of Resistors (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、プリント回路基板
等に表面実装されるチップ型サーミスタ及びその製造方
法に係り、特に、温度の上昇により抵抗値が減少する負
特性サーミスタでであって、素体寸法や抵抗値等の特性
のばらつきが少なく、実装性能及び特性に優れるチップ
型サーミスタ及びその製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip thermistor surface-mounted on a printed circuit board or the like and a method of manufacturing the same, and more particularly to a negative thermistor whose resistance value decreases with an increase in temperature. The present invention relates to a chip-type thermistor having small variations in characteristics such as body dimensions and resistance values and excellent in mounting performance and characteristics, and a method for manufacturing the same.
【0002】[0002]
【従来の技術】プリント回路基板等に表面実装されるチ
ップ型サーミスタの代表的な製品として、セラミックス
焼結体よりなる直方体形状のチップ状サーミスタ素体外
面に保護被膜を形成した後、両端面に端子電極を形成し
た構造のものが提供されている。2. Description of the Related Art As a typical product of a chip-type thermistor surface-mounted on a printed circuit board or the like, a protective coating is formed on the outer surface of a chip-shaped thermistor element formed of a ceramic sintered body and then formed on both end surfaces. A structure in which terminal electrodes are formed is provided.
【0003】従来、このようなチップ型サーミスタは、
次のようにして製造されている。Conventionally, such a chip thermistor has
It is manufactured as follows.
【0004】即ち、まず、キャスティング法によりサー
ミスタ材料のセラミックスグリーンシートを作製し、こ
のシートを所要枚数積層して圧着したものをチップ状に
切断して焼成した後、バレル研磨することにより、図3
(a)に示すようなチップ状サーミスタ素体1を製造す
る。このチップ状サーミスタ素体1の外面に、図3
(b)に示す如く、スパッタリング法等により保護被膜
2を形成した後、図3(c)に示す如く、端子電極3A
を焼き付け、更に、Niめっき層3B及びはんだめっき
層3Cを形成する。[0004] First, a ceramic green sheet of a thermistor material is prepared by a casting method, a required number of such sheets are laminated, pressed, cut into chips, baked, and then barrel-polished, as shown in FIG.
A chip thermistor body 1 as shown in FIG. The outer surface of the chip-like thermistor body 1 is shown in FIG.
After forming the protective film 2 by a sputtering method or the like as shown in FIG. 3B, the terminal electrode 3A is formed as shown in FIG.
Is further baked to form a Ni plating layer 3B and a solder plating layer 3C.
【0005】なお、保護被膜2はサーミスタ素体1の外
面全体に形成され、端子電極3Aはこの保護被膜2上に
形成されるが、端子電極3Aの焼き付け時に、端子電極
3A中のガラスフリットと保護被膜2中のガラス成分と
が反応溶融し、溶融物が端子電極中に吸収され、保護被
膜が消失することで、端子電極3Aとサーミスタ素体1
との導通が確保される。The protective coating 2 is formed on the entire outer surface of the thermistor body 1, and the terminal electrode 3A is formed on the protective coating 2. However, when the terminal electrode 3A is baked, the glass frit in the terminal electrode 3A is removed. The glass component in the protective coating 2 reacts and melts, the melt is absorbed in the terminal electrode, and the protective coating disappears, so that the terminal electrode 3A and the thermistor element 1
Continuity with the terminal is ensured.
【0006】チップ型サーミスタとしては、図4に示す
如く、サーミスタ素体1内に内部電極4A,4Bが形成
されたものもあり、このようなチップ型サーミスタはセ
ラミックスグリーンシートの所定位置に内部電極を印刷
したものを積層して、上記と同様に製造される。As shown in FIG. 4, there is a chip thermistor in which internal electrodes 4A and 4B are formed in a thermistor body 1. Such a chip thermistor is provided at a predetermined position on a ceramic green sheet. Are printed and laminated in the same manner as described above.
【0007】更に、サーミスタ素体の表面に抵抗値調整
用の表面電極を形成した後保護被膜及び端子電極を形成
したものも提供されている。Further, there is also provided a thermistor element in which a surface electrode for adjusting a resistance value is formed on the surface of the thermistor body, and then a protective film and a terminal electrode are formed.
【0008】このようなチップ型サーミスタは、製品と
しての出荷に当り、ユーザーでの実装加工を容易にする
ために、テーピング加工が実施される。When such a chip thermistor is shipped as a product, a taping process is performed to facilitate mounting process by a user.
【0009】なお、前述の如く、保護被膜はサーミスタ
素体の外面全体に形成され、端子電極は、その焼き付け
時の保護被膜中のガラス成分と端子電極中のガラスフリ
ットとの反応溶融物が端子電極中に吸収されて保護被膜
が消失することでサーミスタ素体との電気的接合が得ら
れるが、このように反応溶融物を端子電極中に吸収して
良好な電気的接合を確保するためには、保護被膜の膜厚
に上限があり、保護被膜の膜厚が厚過ぎると上記電気的
接合を得ることができない。As described above, the protective film is formed on the entire outer surface of the thermistor body, and the terminal electrode is formed by reacting the glass component in the protective film with the glass frit in the terminal electrode at the time of baking. Electrical connection with the thermistor body is obtained by the absorption of the protective film and the loss of the protective coating.However, in order to absorb the reaction melt into the terminal electrode and secure good electrical connection, However, there is an upper limit to the thickness of the protective coating, and if the thickness of the protective coating is too large, the electrical connection cannot be obtained.
【0010】この保護被膜の膜厚の上限値は、素体の表
面電極の有無によっても異なるが通常1〜2μmとされ
ている。The upper limit of the thickness of the protective film varies depending on the presence or absence of the surface electrode of the element body, but is usually 1-2 μm.
【0011】[0011]
【発明が解決しようとする課題】上記従来のチップ型サ
ーミスタでは、次のような欠点があった。The above-mentioned conventional chip type thermistor has the following disadvantages.
【0012】サーミスタ素体の作製に当り、チップのバ
レル研磨を行うが、このバレル研磨は寸法精度の高い加
工法ではないため、製造ロット内で得られる素体の寸法
にばらつきを生じる。In producing the thermistor body, the barrel of the chip is polished. However, since this barrel polishing is not a processing method with high dimensional accuracy, the dimensions of the body obtained in a manufacturing lot vary.
【0013】サーミスタ素体寸法のばらつきは、チップ
型サーミスタの主要特性である抵抗値のばらつきの原因
となる。Variations in the dimensions of the thermistor element cause variations in resistance, which is a main characteristic of a chip thermistor.
【0014】また、チップ型サーミスタの出荷時のテー
ピング加工に当り、素体寸法、特に素子の長手方向の寸
法にばらつきがあると、テーピング加工用の素子挿入穴
に素体を入れにくい、或いは逆に、素体挿入穴内での素
体の位置ずれがおこりやすく、テーピング加工装置の素
体吸着用ノズルに素体を吸着しにくくなる。In the taping process at the time of shipping of the chip type thermistor, if there is a variation in the element size, especially in the longitudinal direction of the element, it is difficult to insert the element body into the element insertion hole for taping or reverse. In addition, the displacement of the body in the body insertion hole is likely to occur, and the body is less likely to be sucked by the body suction nozzle of the taping apparatus.
【0015】また、素体寸法のばらつきは、そのまま製
品としてのチップ型サーミスタ寸法のばらつきとなる
が、チップ型サーミスタ寸法にばらつきがあると、基板
実装に当り、実装不良を起こす可能性が高い。[0015] The variation in the body dimensions directly results in the variation of the chip-type thermistor dimensions as a product. However, if there is variation in the dimensions of the chip-type thermistor, there is a high possibility that a mounting failure will occur upon mounting on a substrate.
【0016】更に、保護被膜の形成が容易ではないとい
う問題もある。即ち、端子電極とサーミスタ素体との電
気的接合を確保するためには、保護被膜の膜厚に上限が
ある。このため、ゾル−ゲル法等の膜厚の制御が比較的
難しい方法で保護被膜を形成した場合、保護被膜の膜厚
が厚くなりすぎて素体と端子電極との電気的接合が得ら
れなくなったり、端子電極とサーミスタ素体間に保護被
膜が絶縁層として残留することで、所望の抵抗値を有す
るチップ型サーミスタを得ることができなくなったりす
ることがある。このため、保護被膜の形成には、その形
成法を選択した上で、膜厚を高精度に制御する必要があ
り、保護被膜の形成が容易ではない。Another problem is that the formation of a protective film is not easy. That is, there is an upper limit to the thickness of the protective coating in order to ensure electrical connection between the terminal electrode and the thermistor body. For this reason, when the protective film is formed by a method in which the control of the film thickness is relatively difficult, such as the sol-gel method, the protective film becomes too thick and electrical connection between the element body and the terminal electrode cannot be obtained. In addition, since the protective coating remains as an insulating layer between the terminal electrode and the thermistor element, a chip-type thermistor having a desired resistance value may not be obtained. For this reason, in forming the protective film, it is necessary to control the film thickness with high precision after selecting the formation method, and it is not easy to form the protective film.
【0017】本発明は上記従来の問題点を解決し、素体
寸法や抵抗値等の特性のばらつきが少なく、実装性能、
テーピング加工性及びサーミスタ特性に優れるチップ型
サーミスタ及びその製造方法を提供することを目的とす
る。The present invention solves the above-mentioned conventional problems, has small variations in characteristics such as element size and resistance value, and has a high mounting performance.
An object of the present invention is to provide a chip type thermistor excellent in taping workability and thermistor characteristics, and a method of manufacturing the same.
【0018】[0018]
【課題を解決するための手段】本発明のチップ型サーミ
スタは、直方体形状のセラミックス焼結体よりなるサー
ミスタ素体と、該サーミスタ素体の1対の平行な端面に
設けられた端子電極とを有するチップ型サーミスタにお
いて、該サーミスタ素体の外面に保護被膜を形成した
後、該素体の両端面を切削加工し、次いでこの切削面に
端子電極を形成してなることを特徴とする。A chip-type thermistor according to the present invention comprises a thermistor element made of a rectangular parallelepiped ceramic sintered body and terminal electrodes provided on a pair of parallel end faces of the thermistor element. In a chip thermistor having the same, a protective coating is formed on the outer surface of the thermistor body, and then both end faces of the body are cut, and then terminal electrodes are formed on the cut surface.
【0019】本発明のチップ型サーミスタの製造方法
は、セラミックス焼結体よりなる直方体形状のサーミス
タ素体の外面に保護被膜を形成した後、サーミスタ素体
の両端面に端子電極を形成してチップ型サーミスタを製
造する方法において、保護被膜を形成したサーミスタ素
体の両端面を切削し、この切削面に端子電極を形成する
ことを特徴とする。The method of manufacturing a chip-type thermistor of the present invention comprises the steps of: forming a protective coating on the outer surface of a rectangular parallelepiped thermistor body made of a ceramic sintered body; and forming terminal electrodes on both end surfaces of the thermistor body. A method for manufacturing a mold thermistor is characterized in that both end surfaces of a thermistor body on which a protective coating is formed are cut, and a terminal electrode is formed on the cut surface.
【0020】本発明では、サーミスタ素体の外面に保護
被膜を形成した後、素体の両端面、即ち、長手方向の両
端部を切削加工する。切削加工は、寸法精度の良いダイ
シングソー等を用いて、高精度に行うことができるた
め、素体の長手方向の寸法をそろえ、寸法のばらつきを
低減することができる。このため、寸法のばらつきによ
る抵抗値のばらつきを抑えると共に、テーピング加工
性、実装性能の良いものとすることができる。In the present invention, after forming a protective coating on the outer surface of the thermistor body, both end faces of the body, that is, both ends in the longitudinal direction are cut. Since the cutting can be performed with high precision using a dicing saw or the like having high dimensional accuracy, the lengths of the element bodies in the longitudinal direction can be made uniform, and variations in the dimensions can be reduced. For this reason, it is possible to suppress the variation in the resistance value due to the variation in the dimensions, and to improve the taping workability and the mounting performance.
【0021】また、保護被膜を形成した素体の両端面を
切削加工することで、この端面に素体の表面を露出させ
ることができることから、この端子電極の露出面に直接
端子電極を接合することができる。このため、保護被膜
の膜厚を高精度に制限する必要はなく、素体と端子電極
との電気的接合を確保して、所望の抵抗値を有するチッ
プ型サーミスタを得ることができる。Further, since the surface of the element body can be exposed at the end face by cutting both end faces of the element body on which the protective film is formed, the terminal electrode is directly joined to the exposed surface of the terminal electrode. be able to. For this reason, it is not necessary to limit the thickness of the protective film with high precision, and electrical connection between the element body and the terminal electrode can be ensured, and a chip thermistor having a desired resistance value can be obtained.
【0022】[0022]
【発明の実施の形態】以下に図面を参照して本発明のチ
ップ型サーミスタ及びその製造方法を詳細に説明する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A chip type thermistor and a method for manufacturing the same according to the present invention will be described below in detail with reference to the drawings.
【0023】図1(a)〜(c)は本発明のチップ型サ
ーミスタの製造手順の一実施例を示す断面図である。FIGS. 1A to 1C are sectional views showing one embodiment of a procedure for manufacturing a chip type thermistor of the present invention.
【0024】本発明において、サーミスタ素体の製造及
び保護被膜の形成は、従来と同様に行うことができる。In the present invention, the production of the thermistor body and the formation of the protective film can be performed in the same manner as in the prior art.
【0025】即ち、まず、キャスティング法によりサー
ミスタ材料のセラミックスグリーンシートを作製し、こ
のシートを所要枚数積層して圧着したものをチップ状に
切断して焼成した後、バレル研磨することにより、チッ
プ状サーミスタ素体1を得、このチップ状サーミスタ素
体1の外面全体に保護被膜2を形成する(図1
(a))。That is, first, a ceramic green sheet of a thermistor material is prepared by a casting method, a required number of such sheets are laminated, pressed, cut into chips, baked, and then barrel-polished to obtain chips. A thermistor body 1 is obtained, and a protective coating 2 is formed on the entire outer surface of the chip-like thermistor body 1 (FIG. 1).
(A)).
【0026】この保護被膜2の形成方法は特に制限はな
く、スパッタリング等の物理的蒸着法、ゾル−ゲル法等
の湿式着膜法等、いずれの方法も採用可能である。The method of forming the protective film 2 is not particularly limited, and any method such as a physical vapor deposition method such as sputtering, and a wet film forming method such as a sol-gel method can be employed.
【0027】なお、本発明においては、切削加工を行う
ため、素体と端子電極との電気的接合を確保するための
保護被膜の膜厚の制約はなく、保護被膜2の膜厚は任意
に調節可能である。In the present invention, since the cutting process is performed, there is no restriction on the thickness of the protective coating for securing the electrical connection between the element body and the terminal electrode, and the thickness of the protective coating 2 can be arbitrarily set. It is adjustable.
【0028】サーミスタ素体1の外面全体に保護被膜2
を形成した後は、素体1の端子電極形成端面を、図1
(a)の破線の位置で切削加工して切り落とす(図1
(b))。この切削加工は、寸法精度の良いダイシング
ソー等の切削装置やラップ機などの研磨装置を用いて高
精度に行うことができる。この切削加工により、サーミ
スタ素体1の端子電極形成端面には、素体1の表面1
A,1Bが表出する。A protective coating 2 is formed on the entire outer surface of the thermistor body 1.
Is formed, the terminal electrode forming end face of the element body 1 is
Cutting is performed at the position indicated by the broken line in FIG.
(B)). This cutting process can be performed with high accuracy using a cutting device such as a dicing saw with high dimensional accuracy or a polishing device such as a lapping machine. By this cutting process, the surface 1 of the body 1 is attached to the terminal electrode forming end face of the thermistor body 1.
A and 1B appear.
【0029】サーミスタ素体1の端子電極形成端面を切
削加工した後は、この端面1A,1Bに従来と同様に、
端子電極3A、Niめっき層3B、はんだめっき層3C
を形成してチップ型サーミスタを得る。この端子電極3
Aは、素体1の表出端面1A,1Bに直接形成されるた
め、素体1と端子電極3Aとの電気的接合を確実に得る
ことができる。After the terminal electrode forming end faces of the thermistor body 1 are cut, the end faces 1A and 1B are formed on the end faces 1A and 1B in the same manner as in the prior art.
Terminal electrode 3A, Ni plating layer 3B, solder plating layer 3C
Is formed to obtain a chip thermistor. This terminal electrode 3
Since A is directly formed on the exposed end faces 1A and 1B of the element body 1, electrical connection between the element body 1 and the terminal electrode 3A can be reliably obtained.
【0030】このようにして得られたチップ型サーミス
タは、チップ型サーミスタ寸法のうち、抵抗値やテーピ
ング加工、実装性能に最も重要な長手方向の寸法が切削
加工により調整されたものであるため、寸法のばらつき
が少なく、従来のテーピング加工時の問題は解消され、
また、実装性能も良好で、抵抗値のばらつきも少ないも
のとなる。The chip-type thermistor obtained in this way is one in which the longitudinal dimension, which is the most important for the resistance value, taping, and mounting performance, of the chip-type thermistor is adjusted by cutting. There is little dimensional variation, and the problem of conventional taping is solved.
In addition, the mounting performance is good and the variation in the resistance value is small.
【0031】本発明のチップ型サーミスタは、図2に示
す如く、サーミスタ素体1の内部に内部電極4A,4B
が形成されたもの、或いは、サーミスタ素体1の表面に
表面電極が形成されたものであっても良い。図2に示す
如く、内部電極4A,4Bを有するものの場合、素体1
の両端面の切削加工で素体1の端子電極形成端面に内部
電極4A,4Bの端部が確実に表出することとなり、内
部電極4A,4Bと端子電極3Aとの電気的接合を容易
かつ確実に行えるため、極めて有利である。As shown in FIG. 2, the chip type thermistor of the present invention has internal electrodes 4A, 4B inside a thermistor body 1.
May be formed, or a surface electrode may be formed on the surface of the thermistor body 1. As shown in FIG. 2, in the case of having the internal electrodes 4A and 4B, the element body 1
The ends of the internal electrodes 4A, 4B are reliably exposed on the terminal electrode forming end surfaces of the element body 1 by cutting the both end surfaces of the element body 1, and the electrical connection between the internal electrodes 4A, 4B and the terminal electrode 3A can be easily and easily performed. This is extremely advantageous because it can be performed reliably.
【0032】なお、図示のチップ型サーミスタは、めっ
き層としてNiめっき層3Bとはんだめっき層3Cとを
設けたものであるが、Niめっき層を省略してはんだめ
っき層のみとしても良い。Although the illustrated chip type thermistor is provided with a Ni plating layer 3B and a solder plating layer 3C as plating layers, the Ni plating layer may be omitted and only the solder plating layer may be used.
【0033】[0033]
【実施例】以下に実施例及び比較例を挙げて本発明をよ
り具体的に説明する。The present invention will be described more specifically below with reference to examples and comparative examples.
【0034】実施例1 図1(a)〜(c)に示す方法で、本発明のチップ型サ
ーミスタを製造した。Example 1 A chip-type thermistor of the present invention was manufactured by the method shown in FIGS. 1 (a) to 1 (c).
【0035】炭酸マンガン、炭酸コバルト及び酸化銅を
出発原料とし、これらを金属原子量が所定の割合になる
ようにそれぞれ秤量し、ボールミルで16時間均一に混
合した後脱水乾燥した。次に、この混合物を大気圧下、
900℃で2時間仮焼し、この仮焼物を再びボールミル
で粉砕して脱水乾燥した。得られた原料粉末に、有機溶
剤、バインダー分、分散材等を加えスラリーを調製し、
キャスティング法にて厚さ40μmのセラミックスグリ
ーンシートを作製した。Manganese carbonate, cobalt carbonate and copper oxide were used as starting materials, each of which was weighed so that the metal atomic weight became a predetermined ratio, uniformly mixed in a ball mill for 16 hours, and then dehydrated and dried. Next, the mixture is brought to atmospheric pressure.
The calcined product was calcined at 900 ° C. for 2 hours. To the obtained raw material powder, an organic solvent, a binder component, a dispersant and the like are added to prepare a slurry,
A ceramic green sheet having a thickness of 40 μm was prepared by a casting method.
【0036】このセラミックスグリーンシートを所定の
枚数重ねた後、静水圧プレス法にてシートの圧着を行っ
た。その後、切断機を用いて圧着シートをチップ状に切
断し、縦2.0mm、横1.1mm、厚さ0.8mmの
チップを得た。このチップを大気圧下、1100℃で4
時間焼成し、その後、バレル研磨処理を施しサーミスタ
素体を作製した。After stacking a predetermined number of the ceramic green sheets, the sheets were pressed by a hydrostatic pressing method. Thereafter, the press-bonded sheet was cut into chips by using a cutting machine to obtain chips having a length of 2.0 mm, a width of 1.1 mm, and a thickness of 0.8 mm. This chip is heated at 1100 ° C under atmospheric pressure for 4 hours.
After firing for a time, a barrel polishing treatment was performed to produce a thermistor body.
【0037】得られた素体の外面にスパッタリング法に
よりSiO2 を主成分とする保護ガラス膜を膜厚5μm
で形成した後、ダイシングソーを用いて素子の長手方向
の両端を各々0.1mm切断した。A protective glass film mainly composed of SiO 2 was formed on the outer surface of the obtained element by a sputtering method to a thickness of 5 μm.
Then, both ends in the longitudinal direction of the element were cut by 0.1 mm using a dicing saw.
【0038】次いで、この切断端面にAgペースト(D
uPont社1176J)を浸漬法により付着させて焼
き付けてAg端子電極を形成した。その後、Niめっき
層及びはんだめっき層を形成して試料とし、下記〜
で評価を行い、結果を表1に示した。Next, an Ag paste (D
uPont 1176J) was attached by an immersion method and baked to form an Ag terminal electrode. After that, a Ni plating layer and a solder plating layer were formed and used as a sample.
The results are shown in Table 1.
【0039】 初期特性評価(抵抗値の測定:試料数
n=100個) 得られた試料の抵抗値を測定し、抵抗値のばらつきを標
準偏差(σ)で評価した。ばらつきが極度に大きいもの
は、端子電極と素子の電気的導通が確保できていないも
のと考えられる。 製品の長手方向寸法測定(寸法ばらつきの把握:試
料数n=100個) マイクロメータを用い、試料の長手方向の寸法を測定
し、そのばらつき度合いを標準偏差(σ)で評価した。 テーピング品の実装時の実装不良発生率(試料数n
=10000個) 各試料を、厚さ1mm、角穴サイズ1.65×40mm
のテーピングリールに実装後、自動実装機を用いてガラ
スエポキシ基板上への実装試験を行い、実装不良(自動
機が試料を実装できない等)の発生率を確認した。Evaluation of Initial Characteristics (Measurement of Resistance Value: Number of Samples n = 100) The resistance values of the obtained samples were measured, and the variation of the resistance values was evaluated by the standard deviation (σ). If the variation is extremely large, it is considered that electrical continuity between the terminal electrode and the element cannot be secured. Measurement of Product Dimensions in the Longitudinal direction (Gradation of Dimensional Variation: Number of Samples n = 100) Using a micrometer, the lengthwise dimensions of the sample were measured, and the degree of the variation was evaluated by a standard deviation (σ). Mounting defect occurrence rate when mounting taping products (number of samples n
= 10000 pieces) Each sample was 1 mm thick, square hole size 1.65 × 40 mm
After mounting on a taping reel, a mounting test was performed on a glass epoxy substrate using an automatic mounting machine, and the occurrence rate of mounting defects (for example, the automatic machine could not mount a sample) was confirmed.
【0040】比較例1 ダイシングソーによる素子の切断を行わなかったこと以
外は実施例1と同様の方法で図3(c)に示すチップ型
サーミスタを作製し、同様に評価を行い、結果を表1に
示した。Comparative Example 1 A chip-type thermistor shown in FIG. 3C was prepared in the same manner as in Example 1 except that the element was not cut by a dicing saw, and the same evaluation was performed. 1 is shown.
【0041】[0041]
【表1】 [Table 1]
【0042】実施例2 実施例1において、セラミックスグリーンシートにAg
/Pdペースト(Ag:Pd=70:30)を印刷して
内部電極を形成したものを用い、その他は同様に行っ
て、図2に示す如く、内部電極を有するチップ型サーミ
スタを製造した。ただし、保護ガラス膜の膜厚は2μm
とし、素体の長手方向の両端の切削加工にはラップ機を
用いた。Example 2 In Example 1, Ag was added to the ceramic green sheet.
/ Pd paste (Ag: Pd = 70: 30) was used to form internal electrodes by printing, and the other steps were performed in the same manner to produce a chip thermistor having internal electrodes as shown in FIG. However, the thickness of the protective glass film is 2 μm.
A lapping machine was used for cutting both ends in the longitudinal direction of the element body.
【0043】得られたチップ型サーミスタについて実施
例1と同様に評価を行い、結果を表2に示した。The obtained chip-type thermistor was evaluated in the same manner as in Example 1, and the results are shown in Table 2.
【0044】比較例2 ラップ機による素子の切削を行わなかったこと以外は実
施例2と同様の方法で図4に示すチップ型サーミスタを
作製し、同様に評価を行い、結果を表2に示した。Comparative Example 2 A chip-type thermistor shown in FIG. 4 was produced in the same manner as in Example 2 except that the element was not cut by a lapping machine, and the same evaluation was performed. The results are shown in Table 2. Was.
【0045】[0045]
【表2】 [Table 2]
【0046】実施例3 実施例1において、保護ガラス膜の形成をゾル−ゲル法
により、下記の手順で行ったこと以外は同様にしてチッ
プ型サーミスタを製造し、同様に評価を行い、結果を表
3に示した。Example 3 A chip-type thermistor was manufactured in the same manner as in Example 1, except that the protective glass film was formed by the sol-gel method according to the following procedure. The results are shown in Table 3.
【0047】Siを含有するゾルを調製し、バレル研磨
で得られたサーミスタ素子に浸漬法にてコーティングを
行った。コーティング後の素子を、乾燥後、800℃で
1時間焼成してSiO2 ガラス保護膜を膜厚10μmに
形成した。A sol containing Si was prepared, and the thermistor element obtained by barrel polishing was coated by a dipping method. The coated device was dried and baked at 800 ° C. for 1 hour to form a SiO 2 glass protective film having a thickness of 10 μm.
【0048】比較例3 ダイシングソーによる素子の切削を行わなかったこと以
外は実施例3と同様の方法でチップ型サーミスタを作製
し、同様に評価を行い、結果を表3に示した。Comparative Example 3 A chip-type thermistor was manufactured in the same manner as in Example 3 except that the element was not cut with a dicing saw, and the same evaluation was performed. The results are shown in Table 3.
【0049】[0049]
【表3】 [Table 3]
【0050】以上の結果から、本発明のチップ型サーミ
スタは、従来の問題点がなく、良好な特性及び実装性能
を有することが明らかである。From the above results, it is clear that the chip-type thermistor of the present invention has no conventional problems and has good characteristics and mounting performance.
【0051】[0051]
【発明の効果】以上詳述した通り、本発明のチップ型サ
ーミスタ及びその製造方法によれば、素体寸法や抵抗値
等の特性のばらつきが少なく、実装性能やサーミスタ特
性に優れるチップ型サーミスタが提供される。As described above in detail, according to the chip-type thermistor and the method of manufacturing the same according to the present invention, a chip-type thermistor having small variations in characteristics such as element dimensions and resistance values and excellent in mounting performance and thermistor characteristics is provided. Provided.
【図1】本発明の実施の形態に係るチップ型サーミスタ
の製造手順を示す断面図である。FIG. 1 is a sectional view showing a manufacturing procedure of a chip thermistor according to an embodiment of the present invention.
【図2】本発明のチップ型サーミスタの他の実施例を示
す断面図である。FIG. 2 is a sectional view showing another embodiment of the chip type thermistor of the present invention.
【図3】従来の製造方法を示す断面図である。FIG. 3 is a cross-sectional view illustrating a conventional manufacturing method.
【図4】従来のチップ型サーミスタを示す断面図であ
る。FIG. 4 is a sectional view showing a conventional chip thermistor.
1 サーミスタ素体 2 保護被膜 3A 端子電極 3B Niめっき層 3C はんだめっき層 4A,4B 内部電極 DESCRIPTION OF SYMBOLS 1 Thermistor body 2 Protective coating 3A Terminal electrode 3B Ni plating layer 3C Solder plating layer 4A, 4B Internal electrode
Claims (2)
るサーミスタ素体と、該サーミスタ素体の1対の平行な
端面に設けられた端子電極とを有するチップ型サーミス
タにおいて、 該サーミスタ素体の外面に保護被膜を形成した後、該素
体の両端面を切削加工し、次いでこの切削面に端子電極
を形成してなることを特徴とするチップ型サーミスタ。1. A chip type thermistor having a thermistor body made of a rectangular parallelepiped ceramic sintered body and terminal electrodes provided on a pair of parallel end faces of the thermistor body, wherein the outer surface of the thermistor body is provided. A chip thermistor characterized in that after forming a protective coating on the base body, both end faces of the element body are cut and then terminal electrodes are formed on the cut face.
のサーミスタ素体の外面に保護被膜を形成した後、サー
ミスタ素体の両端面に端子電極を形成してチップ型サー
ミスタを製造する方法において、 保護被膜を形成したサーミスタ素体の両端面を切削し、
この切削面に端子電極を形成することを特徴とするチッ
プ型サーミスタの製造方法。2. A method for manufacturing a chip-type thermistor by forming a protective coating on the outer surface of a rectangular parallelepiped thermistor element made of a ceramic sintered body and then forming terminal electrodes on both end faces of the thermistor element. Cutting both end faces of the thermistor body with the coating formed,
A method for manufacturing a chip type thermistor, comprising forming a terminal electrode on the cut surface.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26185696A JP3269404B2 (en) | 1996-10-02 | 1996-10-02 | Chip type thermistor and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26185696A JP3269404B2 (en) | 1996-10-02 | 1996-10-02 | Chip type thermistor and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH10106809A true JPH10106809A (en) | 1998-04-24 |
| JP3269404B2 JP3269404B2 (en) | 2002-03-25 |
Family
ID=17367709
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26185696A Expired - Fee Related JP3269404B2 (en) | 1996-10-02 | 1996-10-02 | Chip type thermistor and manufacturing method thereof |
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| Country | Link |
|---|---|
| JP (1) | JP3269404B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2022264634A1 (en) * | 2021-06-15 | 2022-12-22 | ||
| WO2022264635A1 (en) * | 2021-06-15 | 2022-12-22 | 株式会社村田製作所 | Electronic component |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63177402A (en) * | 1987-01-16 | 1988-07-21 | 株式会社村田製作所 | Negative characteristic thermistor |
| JPH03250603A (en) * | 1989-12-28 | 1991-11-08 | Mitsubishi Materials Corp | Thermistor |
| JPH04127401A (en) * | 1990-06-08 | 1992-04-28 | Mitsubishi Materials Corp | Manufacture of chip-shaped thermistor |
| JPH07161503A (en) * | 1993-12-02 | 1995-06-23 | Komatsu Ltd | Chip type thermistor |
-
1996
- 1996-10-02 JP JP26185696A patent/JP3269404B2/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63177402A (en) * | 1987-01-16 | 1988-07-21 | 株式会社村田製作所 | Negative characteristic thermistor |
| JPH03250603A (en) * | 1989-12-28 | 1991-11-08 | Mitsubishi Materials Corp | Thermistor |
| JPH04127401A (en) * | 1990-06-08 | 1992-04-28 | Mitsubishi Materials Corp | Manufacture of chip-shaped thermistor |
| JPH07161503A (en) * | 1993-12-02 | 1995-06-23 | Komatsu Ltd | Chip type thermistor |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPWO2022264634A1 (en) * | 2021-06-15 | 2022-12-22 | ||
| WO2022264635A1 (en) * | 2021-06-15 | 2022-12-22 | 株式会社村田製作所 | Electronic component |
| WO2022264634A1 (en) * | 2021-06-15 | 2022-12-22 | 株式会社村田製作所 | Electronic component |
| JPWO2022264635A1 (en) * | 2021-06-15 | 2022-12-22 | ||
| US12557212B2 (en) | 2021-06-15 | 2026-02-17 | Murata Manufacturing Co., Ltd. | Electronic component |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3269404B2 (en) | 2002-03-25 |
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