JPH10107084A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

(57) Abstract: In a semiconductor device in which a semiconductor chip is mounted on a circuit board by gold-gold diffusion bonding, the substantial height of gold bumps for gold-gold diffusion bonding is easily increased. And thermocompression bonding for gold-gold diffusion bonding can be performed at relatively low pressure. SOLUTION: A gold bump 10 on a first connection pad 2 of a sub circuit board 1 is formed by a gold wire. On the other hand, the gold bumps 16 of the semiconductor chip 11 are also formed by gold wires. The semiconductor chip 11 is mounted on the sub-circuit board 1 by gold-gold diffusion bonding of the gold bump 16 to the gold bump 10 of the sub-circuit board 1. In this case, the two gold bumps 10 and 16 after the bonding are used.
Can be about 50 μm or more. Further, a gold bump 1 formed by a gold wire having a high gold purity is used.
Since the hardnesses 0 and 16 are relatively low, thermocompression bonding for gold-gold diffusion bonding can be performed with a relatively small pressure.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a semiconductor chip mounted on a circuit board by gold-gold diffusion bonding and a method of manufacturing the same.

[0002]

2. Description of the Related Art For example, in a mounting technology of a semiconductor chip such as an LSI called a CSP (chip size package),
Semiconductor chips are not mounted directly on a circuit board (main circuit board), but are mounted via a sub-circuit board. In this case, the plane size of the sub-circuit board is substantially the same as the plane size of the semiconductor chip.

FIG. 6 shows an example of such a conventional semiconductor device. The sub-circuit board 1 is formed by laminating a plurality of (for example, three) ceramic substrates 1a. A plurality of first connection pads 2 formed by baking and hardening a conductive paste (for example, a mixed paste of silver and palladium, the same applies hereinafter) are formed in the periphery of the upper surface of the sub-circuit board 1. On the entire lower surface of the sub-circuit board 1,
A plurality of second connection pads 3 formed by firing and curing the conductive paste are arranged in a grid. The corresponding ones of the first connection pad 2 and the second connection pad 3 are:
Each is connected via an internal conduction portion 4 formed by firing and curing a conductive paste formed in the sub-circuit board 1. On the upper surface of the first connection pad 2, a nickel plating layer 5 and a gold plating layer 6 are formed in this order by electroless plating. On the lower surface of the second connection pad 3, a nickel plating layer 7, a gold plating layer 8, and a solder bump 9 are formed in this order.

In the semiconductor chip 11, a plurality of connection pads 13 are arrayed and formed around the lower surface of the chip body 12, and a protective film (passivation film) 14 is formed on the entire lower surface of the chip body 12 except for the center of the connection pads 13. It has a structure in which a gold bump 16 is formed by electroplating under an exposed surface of the connection pad 13 via a base metal layer 15. Then, the gold bump 16 is formed on the gold plating layer 6 on the first connection pad 2 of the sub-circuit board 1.
Are mounted on the sub-circuit board 1 by gold-to-metal diffusion bonding. In this case, a resin sealing material 17 made of epoxy resin or the like is provided between the semiconductor chip 11 and the sub-circuit board 1.

A plurality of main circuit boards 21 (for example, three
) Of glass epoxy substrates 21a. A plurality of connection pads 22 formed by etching copper foil are provided at predetermined positions on the upper surface of the main circuit board 21.
Are arranged in a grid pattern. On the lower surface of the main circuit board 21, a predetermined wiring pattern 23 formed by etching a copper foil is formed. The connection pad 22 and the wiring pattern 23 are connected via an internal conduction portion 24 formed in the main circuit board 21 and made of plating or the like. The sub circuit board 1 is mounted on the main circuit board 21 by joining the solder bumps 9 to the connection pads 22 of the main circuit board 21. Thus, the semiconductor chip 11 is mounted on the main circuit board 21 via the sub circuit board 1.

[0006]

However, in such a conventional semiconductor device, the gold bump 16 formed by electrolytic plating of the semiconductor chip 11 is applied to the gold plating layer 6 on the first connection pad 2 of the sub-circuit board 1. Due to the metal diffusion bonding with gold, there are the following problems. One is that it is desirable that the height of the gold bump 16 of the semiconductor chip 11 be as high as, for example, about 50 μm or more in order to absorb the warpage of the sub-circuit board 1. In addition, there is a problem that the formation time is long in addition to the limitation in the length. Second, since the hardness of the gold bumps 16 formed by electrolytic plating and the gold plating layer 6 formed by electroless plating are relatively high, a relatively large pressure is applied when thermocompression bonding is performed for gold-gold metal diffusion bonding. It is necessary to add the protective film 14 on the gold bump 16
(Often made of a brittle material such as silicon nitride) and the connection pad 13 may be cracked. An object of the present invention is to make it possible to easily increase the substantial height of a gold bump and to perform thermocompression bonding for gold-gold metal diffusion bonding at a relatively small pressure. That is.

[0007]

According to the present invention, a gold bump formed by a gold wire on a connection pad of a semiconductor chip is joined to a gold bump formed by a gold wire on a connection pad of a circuit board. It was done.

According to the present invention, the total height of the two gold bumps formed by the gold wires is substantially equal to the height of the gold bumps. The substantial height of the gold bump can be easily increased. For example, when the height of each of the two gold bumps after bonding is about 25 μm or more, the substantial height of the gold bumps can be about 50 μm or more.
In addition, since the hardness of the gold bump formed by the gold wire with high gold purity is relatively low, thermocompression bonding for bonding can be performed with a relatively small pressure.

[0009]

FIG. 1 shows a semiconductor device according to an embodiment of the present invention. In this figure,
The same reference numerals are given to the same components as those in FIG. In this embodiment, a nickel plating layer 5, a gold plating layer 6, and a gold bump 10 are formed in this order on the upper surface of the first connection pad 2 of the sub-circuit board 1. In this case, the nickel plating layer 5 is formed by electroless plating, and has a thickness of about 2 to 3 μm. The gold plating layer 6 is also formed by electroless plating.
It is about 2 to 1 μm. As will be described later, the gold bump 10 is formed using a wire bonding technique using a gold wire, and the height after bonding is about 25 μm or more. On the other hand, the semiconductor chip 1
As will be described later, the one gold bump 16 is also formed by using a wire bonding technique using a gold wire, and the height after bonding is about 25 μm or more. Then, the semiconductor chip 11 has its gold bump 16
Are mounted on the sub-circuit board 1 by gold-gold diffusion bonding to the gold bumps 10 of the sub-circuit board 1.

Next, a method of forming the gold bumps 10 and 16 and a bonding state thereof will be described. A method of forming a gold bump using a wire bonding apparatus is well known, and there are several methods. For example, first, as shown in FIG. 2A, a gold wire 33 is passed through a hole 32 of a capillary 31,
By applying thermal energy to the tip of the gold wire 33 by electric discharge or the like, a gold ball 34 is formed at the tip of the gold wire 33. Next, as shown in FIG. 2B, the capillary 31 is moved down so that the gold ball 34 is formed on the gold bump forming surface 35 (specifically, the gold plating layer 6 of the sub-circuit board 1 and the base metal layer of the semiconductor chip 11). 15) and fix it. Next, when the gold wire 33 is cut by a method such as raising the capillary 31, a gold bump 36 is formed as shown in FIG. 2C.

The gold bump 36 formed in this manner depends on the shape of the hole 32 of the capillary 31 and the like.
In the case shown in (C), the middle diameter portion 36b is formed at the center of the upper surface of the large diameter portion 36a, and the small diameter portion 36c formed of the remaining gold wire is formed at the center of the upper surface of the middle diameter portion 36b. Has become. In this case, the large diameter portion 36a and the medium diameter portion 36
The total height of b can be about 35 to 45 μm when the diameter of the gold wire 33 is about 25 μm. Hereinafter, when the height after bonding of the two gold bumps 10 and 16 is described, the initial height is assumed to be about 35 to 45 μm here.

In this way, as shown in FIG. 3A, the gold bumps 10 are formed on the gold plating layer 6 of the sub-circuit board 1 and the base metal layer 15 of the semiconductor chip 11 is formed.
A gold bump 16 is formed thereon. Next, as shown in FIG. 3B, when the two gold bumps 10 and 16 are joined by thermocompression bonding, the semiconductor chip 11 is mounted on the sub-circuit board 1. The thermocompression bonding conditions in this case are as follows.
The temperature of the ceramic substrate 1a of the sub-circuit board 1 is set to 20
0 to 210 ° C and the load per bump is 40 to 5
Approximately 0 g. In this case, each gold bump 10 after bonding,
The height of 16 is about 30 to 40 μm. Therefore,
The total height of the two gold bumps 10 and 16 after bonding is 60 to 80.
It is about μm.

Thus, the two gold bumps 10 and 1 after bonding are
6 can be about 60-80 μm. Therefore, the substantial height of the gold bumps can be easily increased in combination with the formation of the gold bumps 10 and 16 by the gold wires. In addition, the gold purity of the gold bumps 10 and 16 formed by the gold wire is higher than that formed by the plating method. Therefore, the hardness of the gold bumps 10 and 16 formed by the gold wire with high gold purity is relatively low, and thermocompression bonding for metal-diffusion bonding with gold-gold can be performed with a relatively small pressure. As a result, it is possible to make it difficult for cracks to occur in the protective film 14 and the connection pads 13 on the gold bumps 16, and to improve the bonding reliability.

Note that, in the case shown in FIG.
Although the case where the gold bumps 10 and 16 having c and 16c are joined has been described, the present invention is not limited to this.
For example, first, as shown in FIG.
Then, as shown in FIG. 4A, the gold bumps 10 of the sub-circuit board 1 are applied to a glass plate (not shown) having a high flatness or the like, as shown in FIG. By pressing, the protruding surface of the gold bump 10 is flattened, and thereafter, as shown in FIG.
16 may be joined. In this case, FIG.
The height of the gold bump 10 in the state shown in FIG.
When the thickness is about 35 μm, the total height of the two gold bumps 10 and 16 after bonding in the state shown in FIG. 4B can be about 55 to 75 μm.

Note that, instead of pressing the gold bumps 10 of the sub-circuit board 1 to flatten the protruding surfaces thereof, the gold bumps 16 of the semiconductor chip 11 may be pressed to flatten the protruding surfaces. Good. Further, as shown in FIGS. 5A and 5B, both the gold bumps 10 and 16 may be pressed together to make the protruding surfaces thereof flat. In this case, if the height of each of the gold bumps 10 and 16 in the state shown in FIG.
The two gold bumps 10, 1 after bonding in the state shown in FIG.
6 can be about 50-70 μm.

Here, the reason why at least one of the gold bumps 10 and 16 is pressed to flatten its protruding surface will be described. As shown in FIG. 3A, both gold bumps 10, 1
When both 6 have the small diameter parts 10c and 16c,
First, these small diameter portions 10c and 16c are not always formed at the center of each of the gold bumps 10 and 16, and are formed in a fixed manner (such as the inclination direction and length at the time of cutting). Second, when joining, the position of the sub-circuit board 1 and the semiconductor chip 11 is not always surely ensured, and a slight shift may occur. In such a case, the small-diameter portions 10c and 16c of the two gold bumps 10 and 16 are pressed against each other in the left-right direction in FIG. Will be distorted and the joining strength will be reduced. Thus, one reason is to avoid such a decrease in bonding strength. Another reason is that even if the sub-circuit board 1 is warped or undulated and the gold plating layer 6 is inclined with respect to a horizontal plane, the projecting surface of the gold bump 10 is made parallel to the horizontal plane, so that the semiconductor chip 11 Gold bump 16
This is to improve the bonding with the metal.

The sub-circuit board 1 is not limited to a ceramic board, but may be a glass epoxy board or a flexible board such as a polyimide board.
The combination of the semiconductor chip 11 and the sub-circuit board 1 is not limited to the CSP, but may be a BGA (ball grid array) or an LG.
A (land grid array) or the like may be used.

[0018]

As described above, according to the present invention, the total height of the gold bumps formed by the gold wires on both the semiconductor chip and the circuit board is substantially equal to the height of the gold bumps. In combination with forming both gold bumps with gold wires, the substantial height of the gold bumps can be easily increased. In addition, since the hardness of both gold bumps formed by gold wires having high gold purity is relatively low, thermocompression bonding for bonding can be performed with a relatively small pressure. It is possible to prevent cracks from being generated in the pad, and it is possible to improve the bonding reliability.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention.

FIGS. 2A to 2C are cross-sectional views illustrating an example of a method of forming a gold bump using a gold wire.

FIGS. 3A and 3B are views for explaining a first example of bonding by gold bumps, in which FIG.
Is a cross-sectional view of the state after joining.

FIGS. 4A and 4B are views for explaining a second example of bonding by gold bumps, in which FIG. 4A is a cross-sectional view of a state before bonding, and FIG.
Is a cross-sectional view of the state after joining.

5A and 5B are views for explaining a third example of bonding using gold bumps, in which FIG. 5A is a cross-sectional view of a state before bonding, and FIG.
Is a cross-sectional view of the state after joining.

FIG. 6 is a cross-sectional view of an example of a conventional semiconductor device.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Sub-circuit board 2 1st connection pad 3 2nd connection pad 9 Solder bump 10 Gold bump 11 Semiconductor chip 16 Gold bump 21 Main circuit board 21 22 Connection pad

Claims (7)

[Claims] 1. A semiconductor device wherein a gold bump formed by a gold wire on a connection pad of a semiconductor chip is joined to a gold bump formed by a gold wire on a connection pad of a circuit board. 2. A semiconductor device comprising a semiconductor chip mounted on a main circuit board via a sub-circuit board, wherein a gold bump formed by a gold wire on a connection pad of the semiconductor chip is provided on the sub-circuit board. A semiconductor device which is bonded to a gold bump formed by a gold wire on a connection pad. 3. The semiconductor device according to claim 2, wherein a plane size of the sub-circuit board is substantially the same as a plane size of the semiconductor chip. 4. A gold bump is formed on a connection pad of a semiconductor chip by a gold wire, and a gold bump is formed on a connection pad of a circuit board by a gold wire. A method for manufacturing a semiconductor device, comprising joining to a bump. 5. When mounting a semiconductor chip on a main circuit board via a sub circuit board, a gold bump is formed on a connection pad of the semiconductor chip by a gold wire, and the sub circuit board is connected by a gold wire. A gold bump is formed on a pad and the semiconductor chip is mounted on the sub-circuit board by bonding the gold bump of the semiconductor chip to the gold bump of the sub-circuit board. A method for manufacturing a semiconductor device, wherein the method is mounted on a circuit board. 6. The method according to claim 5, wherein a plane size of the sub-circuit board is substantially the same as a plane size of the semiconductor chip. 7. The invention according to claim 4, wherein at least one of the two gold bumps is formed by a gold wire and then pressed to flatten a protruding surface thereof. Manufacturing method of a semiconductor device.