JPH1011904A - Information recording / reproducing device - Google Patents

Abstract

(57) [Problem] The conventional cache technology has a system overhead due to the presence of the MPU firmware, and reduces the performance. SOLUTION: In an information recording / reproducing apparatus having a drive for recording and reproducing data on a disk and an ODC 7 for controlling data between a host computer and the drive, a memory 12 for registering address information and data of defective sectors on the disk. And a control circuit 11 provided between the ODC 7 and the drive for controlling data access to the memory 12 or the disk. When there is a recording or reproduction request from the host computer, the memory 12
Is searched for whether or not the sector requested is registered, and the memory 12 or the disk is accessed based on the search result.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an information recording / reproducing apparatus for recording information recorded on an information recording medium such as an optical disk or reproducing recorded information.

[0002]

2. Description of the Related Art Conventionally, in an information recording / reproducing apparatus, when data is recorded on a recording medium such as a magnetic disk (HDD (Hard Disk)) or an optical disk, it is determined whether or not the recorded data has been reproduced and whether the data has been correctly recorded. Verify to verify. As a result of the verification, if a recording error occurs, a replacement process is performed in which the sector is set as a defective sector, another sector on the recording medium is replaced with the defective sector, and data is recorded again.
By the way, PC / WS (Personal Computer / WorkStatio
When reproducing data by accessing a plurality of sectors including the sector subjected to the replacement process from n), it is necessary to seek the recording / reproducing head to a replacement sector in which a defective sector is replaced from a normal sector during data playback. Therefore, the processing speed is inevitably reduced.

Therefore, conventionally, a cache technique has been considered as a method for solving such a problem. As cache technology, for example, Japanese Patent Application Laid-Open No. 58-19 / 1983
No. 4143. FIG. 5 is a block diagram showing a configuration of a system controller disclosed in the publication. In FIG. 5, reference numeral 1 denotes an MPU that controls each unit in the apparatus, 2 denotes a work memory of MUP1, and 3 denotes an MPU1.
Storing a program / data for operating the
OM and 4 are buses of MPU1. 5 is SCSI
The interface of FIG. 5 is an interface (SC).
It is connected to a host computer (not shown) via the SII / F5.

The SPC 6 controls the SCSII / F5.
CSI protocol controller, ODC 7 is a disk controller for controlling data between the host computer and the drive (information recording / reproducing device), buffer RAM 8
Is a buffer memory used in the ODC 7, a modulation / demodulation circuit 9
Is a circuit for modulating recording data and demodulating reproduction data. The modulation / demodulation circuit 9 is connected to a drive via a drive I / F 10. Figure 6 shows the buffer RAM
8 shows a recording area. In FIG. 6, 13 is MP
U1 is a system area used, 14 is a data buffer area for buffering data to be recorded / reproduced, 1
Reference numeral 5 denotes a replacement processing area for replacement processing.

Next, the operation will be described. First, when data is recorded, a SCSI
The recording data is transmitted through the I / F 5. The recording data is stored in the data buffer area 14 of the buffer RAM 8 under the control of the ODC 7, and then modulated by the modulation / demodulation circuit 9.
It is sent to the drive via the drive I / F10. In the drive, the recording data is recorded in the designated sector of the recording medium, and when the recording is completed, the ODC 7 reads the recording data from the drive, and performs verification whether or not the data was recorded normally. Specifically, the number of data errors occurring in a sector is checked, and if the number of errors is equal to or greater than a predetermined reference value, the sector is determined to be a defective sector. That is, by comparing the number of errors with the reference value, it is determined whether or not the sector can be normally recorded and reproduced, and whether or not it can be normally recorded and reproduced even after a change over time.

As a result of the verification, if it is determined that the sector is a defective sector, a sector in a spare processing area prepared in advance on the recording medium is assigned as a substitute for the defective sector, and data is recorded in the spare sector by the drive again. .
Then, the address information of the defective sector of the recording medium and the address of the replacement sector in the replacement processing area are registered in the replacement processing area 15 of the buffer RAM 8, and the data of the replacement sector is also recorded at the same time. Thus, the recording of one sector is completed, and thereafter, the same processing is performed for each sector, thereby recording a series of data on the recording medium.

On the other hand, when a defective sector is detected when reproducing data, it is searched whether or not data of a replacement sector is registered in the replacement processing area 15 in the buffer RAM 8. Here, if no data is registered in the replacement processing area 15, the data of the replacement sector is reproduced from the replacement processing area of the disk and transferred to the host computer. This data is also recorded in the replacement processing area 15. If the data of the replacement sector is registered in the replacement processing area 15, the corresponding data is read from the replacement processing area 15 and read from the host or
Transfer to computer. Thus, the replacement processing area 1
If the data of the replacement sector is registered in No. 5, the recording / reproducing head does not have to seek to the replacement processing area of the recording medium, so that the data can be reproduced at a high speed.

[0008]

Conventionally, when a defective sector is detected during data reproduction as described above, the data in the replacement processing area of the buffer RAM is transferred. In order to execute such control, the intervention of the firmware of the MPU that controls the device is required. That is, the firmware of the MPU reproduces data of continuous sectors on the recording medium in response to a reproduction request from the host computer. At this time, when a defective sector is detected, the information is transmitted to the firmware, and the firmware performs control to search the replacement processing area and process the data as reproduction data.

Conventionally, various other cache technologies are known, but all of them involve processing by firmware as described above. However, when such firmware processing is interposed, there is a problem that a considerable system overhead is generated and the performance of the apparatus is reduced. In particular, at the present time when the processing speed of the host computer is increasing, the intervention of the firmware of the MPU has hindered the improvement of the processing speed of the apparatus.

SUMMARY OF THE INVENTION In view of the above-mentioned conventional problems, an object of the present invention is to provide an information recording / reproducing apparatus capable of maximizing the processing speed without the intervention of firmware. is there.

[0011]

SUMMARY OF THE INVENTION An object of the present invention is to provide a recording / reproducing means for recording or reproducing data on a recording medium, and a data control means for controlling data between a host computer and the recording / reproducing means. An information recording / reproducing apparatus which records data on the recording medium in response to a request from the host computer or reproduces recorded data,
Storage means for registering address information and data of a defective sector of the recording medium; means provided between the data control means and the recording / reproduction means for controlling access to data to the storage means or the recording medium; When there is a recording or reproduction request from the host computer, a search is made as to whether the requested sector is registered in the storage means, and the storage means or the recording medium is accessed based on the search result. This is achieved by an information recording / reproducing apparatus characterized by the above-mentioned features.

[0012]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram showing an embodiment of the information recording / reproducing apparatus of the present invention. In addition,
In FIG. 1, the same parts as those of the conventional apparatus of FIG. That is, MPU1, RAM2,
ROM3, bus 4, SCSII / F5, SPC6, OD
C7, buffer RAM 8, modulation / demodulation circuit 9, drive I /
F10 is the same as that of FIG. The information recording / reproducing apparatus according to the present embodiment is connected to a host computer (not shown) via the SCSII / F5 as in FIG. 5, and the drive / I / F10 is connected to the next stage of the modulation / demodulation circuit 9. It is assumed that a drive (not shown) is connected. Further, in the present embodiment, a magneto-optical disk device is taken as an example.
It has a direct verify function as disclosed in Japanese Patent No. 4817.

In the present embodiment, a replacement processing control circuit 11 is provided between the ODC 7 and the modulation / demodulation circuit 9, and the replacement processing control circuit 11 stores address information and data of defective sectors on a disk (recording medium). A memory 12 for replacement processing for registration is connected. The replacement processing control circuit 11 registers the address information and data of the defective sector in the memory 12 when a defective sector occurs on the disk serving as a recording medium as described later in detail, and when an access request is issued from the host computer. Has a function of detecting the address information of the disk and searching whether or not the address information of the requested sector is registered in the memory 12. When the target sector is already registered in the memory 12, the replacement processing control circuit 11 performs access to the defective sector to the memory 12, and controls access to the disk when the target sector is not registered. Is what you do.

FIG. 2 is a block diagram showing a detailed configuration of the replacement control circuit 11. As shown in FIG. In FIG. 2, ODCI /
F16 is an interface circuit with the ODC 7, and 1
Reference numeral 7 denotes data between the ODC 7 and the access control circuit 11. Further, a strobe signal (ST) for transferring data from the ODC 7 to the access control circuit 11 is provided.
B) 18, data input / output signal (DIR) 19,
Gate signal (IDRG) 2 indicating the ID information portion of the sector
0, a gate signal (DTRG) 21 indicating a data portion when reproducing sector data, a gate signal (DTWG) 22 indicating a data portion when recording sector data, and a signal (ATN) 23 indicating a defective sector. , A reference clock (CLK) 24, a system reset signal (RST) 25, and the like.

The MPU I / F 26 is an interface circuit with the MPU 1, 27 is a data bus, and 28 is an address bus. Also, the chip select signal (C
S) 29, a read / write signal (RD / RW) 30 and the like are sent to the alternation processing control circuit 11. Modulation / demodulation circuit I / F3
Reference numeral 1 denotes an interface circuit with the modulation / demodulation circuit 9;
Indicates data flowing to and from the modulation / demodulation circuit 9. The memory I / F 33 is an interface circuit with the memory 12, 34 is a data bus, and 35 is an address bus. 36 denotes a chip select signal, and 37 denotes a read / write signal.

The timing controller 38 is a circuit for generating various timing signals for controlling access. Reference numeral 39 denotes a register for latching disc ID information from the modulation / demodulation circuit 9 in accordance with a control signal from the timing controller 38, and reference numeral 40 denotes a register for adding 1 to the ID information latched in the register 39 in response to a control signal 41 from the timing controller 38. An addition circuit 42 is a determination circuit that compares the ID information of the addition circuit 40 with the ID information 43 from the timing controller 38 and determines whether or not they match.

The ID information 43 from the timing controller 38 is ID information registered in the memory 12.
The register 39, the adding circuit 40, and the determining circuit 42
Records data for each sector as described in detail later,
At the time of reproduction, it is used for searching for ID information for searching whether or not ID information of a sector to be recorded and reproduced from now on is already registered in the memory 12. Further, the switch circuit 44 operates according to the control signal of the timing controller 38, and the ODC 7 / modulation / demodulation circuit 9 / MPU1 / memory 1
2 is a circuit for switching the data flow.

FIG. 3 is a diagram showing the contents of data in the memory 12 for replacement processing. The memory 12 is used as a memory for registering ID information and data of defective sectors on the disk as described above. In FIG. 3, blocks 1, 2, 3,... Are areas in which data of defective sectors on the disk is recorded. Each block includes an ID information section 45 in which a sector address of a defective sector is recorded and a data section 49 in which sector data is recorded. The number at the top of the memory 12 indicates the number of registered defective sectors.

Next, a specific operation of the present embodiment will be described. First, the recording operation will be described. When the disk (recording medium) is set in the apparatus, the ID information and data of all the replacement sectors recorded in the replacement processing area of the disk are read and recorded in the memory 12. In the case of recording in the memory 12, it is desirable to sort the data of the sector that has been subjected to the replacement process in ascending order of the address of the replacement sector so that the search can be performed at a high speed. The start-up process is performed in this manner, and the apparatus is in a state where recording and reproduction are possible.

Next, when a recording command is issued from the host computer, the ODC 7 temporarily stores the data transferred from the host computer in the buffer RAM 8. In the drive, the recording / reproducing head accesses a target track of the disk. At this time, the ID information of the disk being rotated by the recording / reproducing head is sequentially reproduced and sent to the modulation / demodulation circuit 9. The ODC 7 fetches this ID information from the modulation / demodulation circuit 9 and waits until a target sector address IDn to be recorded is detected. FIG.
(A) shows the flow of data to and from the drive.
Numeral 45 is an ID information part, and numeral 46 is a data part. Here, data of the sector address IDn is recorded.

On the other hand, when the replacement processing control circuit 11 detects the sector address IDn-1 immediately preceding the target sector address IDn, the target sector address IDn.
Before the message comes, the ID information registered in the memory 12 is searched. That is, a search is made as to whether the sector address IDn designated to be recorded in the memory 12 has already been registered. More specifically, the replacement processing control circuit 11 latches the disk ID information from the modulation / demodulation circuit 9 into the latch 39 when IDn-1 is detected as described above. Further, the control signal 41 is output from the timing controller 38 to the addition circuit 40, and 1 is added to the value of the ID information of the latch 39.

In this state, the timing controller 38
Sequentially outputs the ID information registered in the memory 12 to the determination circuit 42. In the judgment circuit 42, the ID information of the addition circuit 40 and the I
It is determined whether the D information matches, and the result of the determination is output to the timing controller 38. In this manner, the ID information of the memory 12 is searched. If there is no ID information registered in the memory 12 that matches the target sector address IDn, the replacement control circuit 11 The target sector address IDn is written, and the data of the sector address is prepared to be recorded in the memory 12.

On the other hand, in the ODC 7, the modem 9
When the target ID information of the disk is detected from the
As shown in (c), the recording gate signal (DTWG) 22 is activated, and then the data to which the ECC parity and the like are added is transferred from the buffer RAM 8 to the modulation / demodulation circuit 9. The modulation / demodulation circuit 9 modulates the transferred data by a predetermined modulation method, and records data at a target sector address IDn by a recording / reproducing head in a drive. Further, the replacement processing control circuit 11 records the same data in a block in which the ID information is recorded earlier in the memory 12. Since the data recorded on the disk has the direct verify function in the present embodiment as described above, the data is reproduced at the same time as the recording, and is sent to the ODC 7 through the modulation / demodulation circuit 9. O
The DC 9 compares the reproduced data with the recording data to perform verification, and determines whether the data has been recorded normally before the next ID information of the disk comes.

As a result of the verification, if the data can be normally recorded and it is determined that the sector is a normal sector, the recording of one sector is completed. In this case, the recording pointer in the memory 12, that is, the pointer indicating the position of the ID information in FIG. 3 is not updated. Therefore, at this time, the ID information of IDn and the sector data currently recorded in the memory 12 are overwritten and erased when recording the data of the next sector. If the result of the verification indicates that the sector is a defective sector, the recording pointer of the memory 12 is updated to the next block, and IDn is registered as a defective sector. Therefore, at this time, the ID information and the sector data of IDn currently recorded in the memory 12 are registered in the current block of the memory 12 as they are. Next, the number of registrations is updated by setting the number of NUMBERs indicating the number of registrations of defective sectors in the memory 12 to +1.

On the other hand, the replacement processing control circuit 11
As a result of searching for the ID information of the disc, if any of the ID information registered in the memory 12 matches the target sector address IDn, the corresponding sector of the disk has already been determined as a defective sector, Since the information and the sector data are registered in the memory 12, the replacement processing control circuit 11 prepares so that the data portion of the corresponding block in the memory 12 can be overwritten. When the target sector address IDn of the disk is detected, the ODC 7 activates the recording gate signal DTWG. However, no data is recorded on the disk, and the ODC 7 stores the target sector address I stored in the buffer RAM 8.
The data of Dn is transferred to the replacement processing control circuit 11, and the replacement processing control circuit 11 overwrites the transferred data with the already recorded data of the corresponding block in the memory 12.

When the recording is completed, the replacement processing control circuit 11
Transfers the data recorded in the memory 12 to the ODC 7 as verify data, and the ODC 7 performs verification using the transferred data. ODC7 is the result of the verification,
If the recording has been performed normally, the recording of one sector is completed. In this case, since the data is not recorded on the disk, it can be considered that no defective sector occurs. Thus, the recording of one sector is completed, and thereafter, recording is performed by the same operation for each sector, and when all the data from the host computer is recorded, the recording process is completed.

When the host computer issues a disc eject command, all data registered in the memory 12 is transferred to the drive, and the data is recorded in the replacement processing area of the disc. To the outside of the machine. The number of defective sectors allowed in a 3.5-inch ISO-compliant magneto-optical disk (128 MB) is about 1,000. Memory 1 for all defective sectors
In order to register data in the sector 2, the ID information is 3 bytes and the data to which information such as ECC is added is 600 bytes per sector.
A capacity of K bytes is required.

Next, a data reproducing operation will be described. When a playback command is issued from the host computer, the drive accesses the recording / playback head to a target track on the disc. In the case of reproduction, the sector address IDn is reproduced as in the case of recording. O
The DC 7 fetches ID information sequentially reproduced by the recording / reproducing head from the modulation / demodulation circuit 9 in the same manner as at the time of recording.
It is waiting for the sector address IDn specified by the computer to be detected.

On the other hand, in the replacement control circuit 11, the sector address (ID) immediately before the target sector address IDn is set.
When (n-1) is detected, the ID information of the memory 12 is searched to determine whether or not the sector address IDn is already registered in the memory 12. This search operation is the same as the previous search at the time of recording. The ID information (IDn-1) from the modulation / demodulation circuit 9 is latched in the register 39, and 1 is added to the ID information latched by the addition circuit 40. In this state, the ID information registered in the memory 12 is sequentially output to the determination circuit 42. The judging circuit 42 compares the address information of the adding circuit 40 with the address information of the memory 12 each time to judge whether or not they match.

As a result of this search, if none of the ID information registered in the memory 12 matches IDn, the data on the disk is reproduced and transferred to the host computer. That is, when the ODC 7 detects the target sector address IDn of the disk from the modem circuit 9,
As shown in FIG. 4C, the reproduction gate signal (DTRG) 21
Activate. At this time, the replacement processing control circuit 11 outputs the data from the modulation / demodulation circuit 9, that is, the data of the target sector address IDn reproduced from the disk to the OD.
Transfer to C7. The ODC 7 performs ECC decoding while writing the transferred data to the buffer RAM 8 and transfers the decoded data from the buffer RAM 8 to the host computer.

On the other hand, as a result of the search, if any of the ID information registered in the memory 12 matches the IDn, the replacement control circuit 11 transfers the corresponding data in the memory 12 to the ODC 7. Be prepared. ODC
7, when the target sector address IDn is detected from the ID information of the modulation / demodulation circuit 9, the reproduction gate signal DT is similarly generated.
RG 21 is activated. At this time, the replacement processing control circuit 11 synchronizes with the STB signal 18 from the ODC 7 in FIG.
The data of Dn is read and transferred to the ODC 7. After that, the same as described above, the ODC 7 performs ECC decoding while writing the transferred data to the buffer RAM 8, and transfers the decoded data to the host computer. 1
The reproduction of the sector is completed, and thereafter the reproduction is performed by the same operation for each sector.

Next, in the above embodiment, the apparatus has the direct verify function. However, an embodiment in which the apparatus does not have the direct verify function will be described. If there is no direct verify function, it is basically the same as having the direct verify function, or the difference is that after recording a series of data on the disk, the recorded data is played back from the disk and verified. I have. More specifically, first, the operation of recording data on the disk is almost the same as that of the previous embodiment, and the memory 12 is searched for each sector to determine whether the target ID information has already been registered. Is determined. If not registered, the data is recorded at the target sector address of the disk, and the ID information and the sector data are also recorded in the memory 12. On the other hand, if it is registered, the data is overwritten on the corresponding block in the memory 12.

In this manner, recording is performed for each sector. For example, when data of 10 sectors for one track is recorded, the ODC
7 issues a verify command and reproduces the recorded data with the drive. The ODC 7 performs verification by comparing the reproduction data with the recording data. Also, I
When the D information is registered and the data is overwritten on the corresponding block of the memory 12, the verification is performed using the data. As a result of the verification, the sectors determined to be defective are stored in the memory 12 from the buffer RAM 8 by the MPU 1 to the
Record through / F26. Then, as described above, the recording pointer of the memory 12 is moved to the block next to the corresponding block, registered as a defective sector in the memory 12, the number of registrations is updated, and the recording operation is completed. If there is no defective sector, the recording operation ends without registering the defective sector in the memory 12. Since the data overwritten in the memory 12 has already been registered as a defect in the memory 12, the process ends without newly forming a defective sector.
Thereafter, when recording data continuously, recording is performed in exactly the same operation.

Next, the data reproducing operation is exactly the same as in the previous embodiment. That is, when there is a reproduction request from the host computer, the memory 1 is stored for each sector.
2 is searched for ID information, and if not, the disk data is reproduced and the host
Transfer to computer. If registered, the corresponding data in the memory 12 is transferred to the host computer.

[0035]

As described above, according to the present invention, M
When viewed from the PU, when data is recorded on the recording medium, a defective sector does not occur.
Firmware structure can be simplified, and the system overhead time can be reduced. Therefore, a desired amount of data can be recorded and reproduced at one time, and there is no time loss of command processing for replacement processing, for example, re-issuance of a command, a rotation waiting time of a recording medium associated therewith, and the like. Processing time can be greatly reduced as compared with the conventional case.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of an information recording / reproducing apparatus of the present invention.

FIG. 2 is a block diagram showing in detail a replacement processing control circuit 11 of the embodiment of FIG. 1;

FIG. 3 is a diagram showing the contents of data in a replacement processing memory 12 according to the embodiment of FIG. 1;

FIG. 4 is a diagram showing data and signals of a main part of the embodiment of FIG. 1;

FIG. 5 is a block diagram showing a system controller of a conventional information recording / reproducing system.

FIG. 6 is a diagram showing a recording area of a buffer RAM of FIG. 5;

[Explanation of symbols]

 1 MPU 2 RAM 3 ROM 6 SPC 7 ODC 8 Buffer RAM 9 Modulation / demodulation circuit 11 Alternating processing control circuit 12 Memory

Claims (2)

[Claims] A recording / reproducing means for recording or reproducing data on a recording medium; and a data control means for controlling data between a host computer and the recording / reproducing means.
In an information recording / reproducing apparatus that records data on the recording medium in response to a request from the host computer or reproduces recorded data, storage means for registering address information and data of a defective sector of the recording medium, Means for controlling data access to the storage means or the recording medium, provided between the data control means and the recording / reproducing means, wherein when the host computer issues a recording or reproduction request, the storage means An information recording / reproducing apparatus which searches whether or not the sector requested by the means is registered, and accesses the storage means or the recording medium based on the search result. 2. An information recording / reproducing apparatus according to claim 1, wherein said access control means performs a replacement process on said storage means when a defective sector occurs when data is recorded on said recording medium. Information recording and reproducing apparatus.