JPH10123489A - Liquid crystal display element mounting structure - Google Patents

Abstract

(57) Abstract: To reduce the number of mounting substrates and downsize an LCD cell substrate. SOLUTION: A liquid crystal display element (referred to as an LCD) is an LC.
The scanning substrate 8 and the signal substrate on which the D-cell substrate 14 and the FPC (connected to the peripheral terminals of the LCD cell substrate) are integrally led, and the scanning electrode driving circuit component and the signal electrode driving circuit component are respectively mounted. It consists of ten. In this invention, in particular, at least one of the scanning electrode driving IC chip 7 and the signal electrode driving IC chip 9 (the former in FIG. 1)
It is surface-mounted on the scanning substrate 8 or the signal substrate 10 by, for example, a flip chip method. Scanning board 8 or signal board 10
Is composed of a multilayer FPC or a flex-rigid substrate. The FPC 9a or 10a is bonded using, for example, an ACF (anisotropic conductive bonding film). The scanning substrate 8 or the signal substrate 10 is divided into a plurality, and the divided substrate is
You may connect integrally with C.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mounting structure of a liquid crystal display element, and more particularly to a reduction in size and economy.

[0002]

2. Description of the Related Art A liquid crystal display device (hereinafter referred to as an LCD) has T
A conventional LC is used as an example of an FT matrix LCD.
The mounting structure of D will be described with reference to FIGS. LCD
The cell substrate 14 includes a glass substrate (referred to as a TFT array substrate) 1 and a glass substrate (referred to as a common electrode substrate) 2 having a smaller vertical and horizontal dimension than the glass substrate (referred to as a TFT array substrate) 2, and a liquid crystal (not shown) therebetween. Is enclosed. On the inner surface of the glass substrate 1, signal electrodes Y1 to Yn and scanning electrodes X1 to Xm shown in FIG. A TFT (thin film transistor) 3 is provided in the vicinity of each intersection point, and its gate G and source S
Are scanning electrodes (also called gate buses) Xi (i =
1 to m) and signal electrodes (also called source buses) Yj (j
= 1 to n), and the drain D is connected to the display electrode 4.

The scanning electrode Xi and the signal electrode Yj are extended around the glass substrate 1, and ACF (An) is connected to a terminal (electrode) at one end of the gate TAB substrate 5 and the source TAB substrate 6.
It is electrically and mechanically connected using an isotropic conductive film (anisotropic conductive adhesive film). As is well known, the ACF is an adhesive tape having a characteristic that a current flows in a thickness direction of a film and does not flow in a direction perpendicular to the thickness direction, and electrically and mechanically connects substrates. It is used in such a case and has an advantage that the workability (productivity) of the connection can be improved.

A gate TAB (Tape Automated Bonding;
A gate driver IC chip (generally, a scanning electrode driving IC chip) 7 is mounted on a flexible TCP (Tape Carrier Package) 5a on a substrate 5 by bonding using a tape carrier method by ILB (Inner Lead Bonding). A terminal (electrode) provided at the other end of the gate TAB substrate 5 is soldered to a gate substrate (also referred to as a scanning substrate) 8.

A source driver IC chip (generally a signal electrode driving IC chip) 9 is mounted on a TCP 6a on the source TAB substrate 6, and a terminal (electrode) provided at the other end of the source TAB substrate 6 is connected to the source. It is soldered to a board (also called a signal board) 10. The source TAB substrate 6 is bent in a U-shape, and the source substrate 10 is disposed so as to partially overlap the lower side of the glass substrate 1.

The gate substrate 8 includes a scan electrode drive circuit 11 (see FIG. 4) excluding the gate driver IC chip 7, an interface connector, a graphic controller,
A power supply circuit, a DC / DC converter, and the like are mounted. On the other hand, the source substrate 10 has the source driver IC chip 9
, A power supply circuit, a signal processing circuit and the like are mounted. Scan electrode Xi (i = 1 to m) and signal electrode Y formed on the inner surface of glass substrate 1
j (j = 1 to n), TFTs 3 formed in a matrix
The display electrode 4 forms a TFT matrix circuit 13.

The mounting structure of the LCD shown in FIG. 3 is characterized by using a TAB, and is called a TAB mounting method. In this method, the LCD is an LCD composed of glass substrates 1, 2, etc.
It is composed of a total of seven substrates including a cell substrate 14, two gate TABs 5, a gate substrate 8, two source TABs 6, and a source substrate 10. In the TAB mounting method, as many as six substrates are required in addition to the LCD cell substrate, so the division loss increases, the manufacturing cost of the total of these substrates increases, and a connection for connecting these substrates is required. There is a disadvantage that the number of steps is increased and the cost of the LCD is increased.

In order to eliminate this disadvantage, a COG (Chip On Glass; mounting an IC chip on a glass substrate) mounting method shown in FIG. 6 has been considered. In the COG mounting method, the gate driver IC chip 7 and the source driver IC chip 9 are mounted directly around the inner surface of the glass substrate 1 by the COG method without using the gate TAB and the source TAB. The gate substrate 8 and the source substrate 10 are not limited to the rigid substrate as shown in FIG.
le Print Circuit) and a multi-layer FPC or flex-rigid substrate. Terminals (electrodes) at the ends of the FPC 8a derived from the gate substrate 8 and the FPC 10a derived from the source substrate 10 are connected to the glass substrate 1 using ACF (anisotropic conductive adhesive film).

In the above-described COG mounting method, the gate driver IC chip 7 and the source driver IC chip 9 are mounted on the glass substrate 1 while the LCD cell substrate 14, the gate substrate 8, and the source substrate 10 can be constituted by only three substrates. Therefore, the size of the substrate increases, the number of substrates to be removed from the work decreases, and the cost of the glass substrate 1 increases.

[0010]

The present invention is based on the T
The drawback that the number of component boards in the AB mounting method increases,
An object of the present invention is to solve the disadvantage that the glass substrate 1 in the COG mounting method shown in FIG. 6 becomes large, and to reduce the cost of the LCD.

[0011]

[Means for Solving the Problems]

(1) The invention according to claim 1 is an LCD cell substrate in which two glass substrates having electrodes formed on the inner surface are integrally laminated with a liquid crystal layer interposed therebetween, and connected to terminals around the LCD cell substrate. The present invention relates to a mounting structure of an LCD having a scanning board and a signal board on which a scanning electrode driving circuit component and a signal electrode driving circuit component are mounted, respectively.

According to the first aspect, at least one of the scan electrode driving IC chip and the signal electrode driving IC chip includes:
It is mounted on a scanning board or a signal board. (2) In the invention of claim 2, at least one of the scanning substrate and the signal substrate is a first substrate adjacent to the LCD cell substrate.
Other second substrate: divided into a p-th substrate (p ≧ 2), and the divided substrates are integrally connected by an FPC;
The scanning electrode driving IC chip or the signal electrode driving IC chip is mounted on the first substrate.

(3) In the invention of claim 3, in the above (1) or (2), the scanning substrate or the signal substrate is a multilayer F
It is composed of a PC or a flex-rigid substrate. (4) In the invention of claim 4, in the above (1) or (2), the FPC derived from the scanning substrate or the signal substrate
Is adhered to the LCD cell substrate using ACF (anisotropic conductive adhesive film).

(5) In the invention of claim 5, in the above (1) or (2), the scanning electrode driving IC chip or the signal electrode driving IC chip is bonded to the scanning substrate or the signal substrate by a flip chip method. (6) In the invention according to claim 6, in the above (2), the scanning substrate is a first substrate from which an FPC to be connected to the LCD cell substrate is led, an intermediate second substrate, and a terminal third substrate. Is divided into The first substrate is disposed parallel to the outside of the LCD cell substrate, the second substrate is disposed substantially perpendicular to the first substrate on the side opposite to the LCD cell substrate, and the third substrate is disposed substantially perpendicular to the second substrate. , And are arranged so as to substantially overlap the first substrate.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to the embodiment of FIG. FIG. 1 shows FIGS.
The same reference numerals are given to the portions corresponding to and the description will be omitted. In FIG. 1, the gate driver IC chip (scan electrode driving IC) mounted on the TFT array substrate 1 in FIG.
The size of the glass substrate (TFT array substrate) 1 is reduced by mounting the C chip 7 on the gate substrate (scanning substrate) 8 while maintaining the same small number of substrates as in the COG method of FIG. The cost of LCD is reduced by increasing the number of glass substrates to be manufactured.

Similarly, a source driver IC chip (signal electrode driving IC chip) 9 is connected to a source substrate (signal substrate) 10.
May be implemented. Recently, there has been a new request to downsize the LCD of FIG. In order to meet this new demand, an embodiment of claim 2 shown in FIG. Also in the LCD of FIG. 1, the FPC 8a is bent downward at a substantially right angle in FIG.
4, the front surface of the LCD, that is, the size of the surface on which the display surface exists can be reduced.
On the other hand, the thickness of the LCD is undesirably increased because of the gate substrate 8. Therefore, in the embodiment of FIG. 2, the gate substrate 8 is divided into 8-1, 8-2, and 8-3, and the divided substrates are integrally connected by the FPCs 8b and 8c. The scanning electrode driving IC chip 7 is mounted on the divided scanning substrate 8-1 (claim 2).

In the example of FIG. 2, the scanning substrate 8-1 is an LCD
The scanning substrate 8-2 is arranged in parallel outside the cell substrate 14 and
Is on the opposite side of the scanning substrate 8-1 from the LCD cell substrate 14,
The scanning substrate 8-3 is disposed substantially at a right angle, and the scanning substrate 8-2
And at a right angle to the scanning substrate 8-1 (claim 6). By arranging each of the divided substrates so as to form a U-shape, the front surface and the thickness of the LCD can be reduced, and components such as a backlight can be appropriately arranged in a space surrounded by each divided substrate, thereby reducing the size of the LCD. Thus, a compact LCD can be realized.

In FIG. 2, the gate substrate 8 is divided.
Similarly, the signal substrate 10 may be divided and the signal electrode driving IC chip 9 may be moved to the signal substrate 10. Gate substrate 8 of FIG.
In the initial step, as shown in FIG. 3B, a rigid U-shaped discarded substrate 8-4 is integrally attached to the periphery, and between the rigid substrates 8-4 and 8-1, and 8-1. 8-2
The space between them and between 8-2 and 8-3 is closed with FPC. Unnecessary portions of the gate substrate 8 are cut off as shown in FIG. 3A before connecting the FPC 8a to the LCD cell substrate 14, but in order to facilitate the cut-out, perforations or V-shaped portions are cut off in dotted lines in FIG. 3B. A groove 15 is formed.

On one or both sides of the gate substrate 8 before the division provided with the perforations or the V-grooves 15, a gate driver IC chip 7 is provided on a portion 8-1, and 8-2 and 8-3.
In this part, an interface connector, a graphic controller, a power supply circuit, a DC / DC converter, and the like are mounted by a flip chip method, wire bonding, or another surface mount technology (SMT).

After the parts are mounted, the scanning substrate 8 is
-4 and unnecessary FPCs are cut off at the locations indicated by the dotted lines, as shown in FIG. 3A. In this state, after inspecting the function, appearance, etc., it is connected to the LCD cell substrate 14. FIG.
The gate substrate 8 of B is composed of a multi-layer FPC or a flex-rigid substrate, and a portion of the FPC that blocks between the rigid portions is a small number of M layers (1 ≦ M < N) are stacked. The same applies to the source substrate 10 of FIG. 2, the gate substrate 8 of FIG. 1, and the source substrate 10 (claim 3).

The gate driver IC chip 7 or the source driver IC chip 9 (the former in FIGS. 1 to 3) is mounted on the scanning substrate 8 or the signal substrate 10 by, for example, a flip chip method. In the flip chip method, a driver IC is surface-mounted in the form of a bare chip (IC chip). As is well known, a chip electrode formed on a connection surface of an IC chip is formed, for example, by forming a metal thin film such as Cr or Cu on an aluminum pad and forming a solder bump thereon by plating or vapor deposition. ing. IC
The chip is bumped on the gate substrate 8 or the source substrate 1
The solder is reflowed by aligning it with the metal electrode pad provided on top of the soldering pad and passing it through a furnace.
flow) for bonding. This method has an advantage that a large number of pad electrodes can be laid out on the connection surface of the chip and a plurality of chips can be bonded at a time (claim 5).

In FIGS. 1 and 2, FPCs 8a and 8
The tip of a is, for example, ACF (anisotropic conductive adhesive film)
(Claim 4). In the above description, the LCD is of the TFT matrix type. However, it is apparent that the present invention is not limited to this, and can be applied to a passive type simple matrix type (XY matrix type) LCD.

[0023]

According to the mounting structure of the present invention, similarly to the conventional COG method, in addition to the LCD cell substrate 14, the FPC can be constituted by a small number of scanning substrates 8 and signal substrates 10 which are integrally led out. Therefore, the cost of the LCD can be reduced by reducing the division loss and reducing the total manufacturing cost of each substrate and the number of steps for connecting the substrates.

By mounting at least one of the scanning electrode driving IC chip 7 or the signal electrode driving IC chip 9 mounted on the glass substrate 1 in the COG method on the scanning substrate 8 or the signal substrate 10, the glass substrate 1 is downsized. The number of substrates to be taken from the work increases, and the cost can be reduced. Scan electrode drive IC chip 7 or signal electrode drive IC
When the scanning substrate 8 or the signal substrate 10 on which the chip 9 and the like are mounted is divided into a plurality of parts and the divided substrates are integrally connected by the FPC, the outer shape of the LCD can be made small and compact.

[Brief description of the drawings]

FIG. 1 is a perspective view showing an embodiment of the present invention.

FIG. 2 is a perspective view showing an embodiment of the invention of claim 2;

FIG. 3 is a plan view of the gate substrate 8 of FIG. 2;

FIG. 4 is an electrical block diagram of a TFT matrix LCD.

FIG. 5 is a perspective view of a TFT matrix LCD using a conventional TAB mounting method.

FIG. 6 is a perspective view of a TFT matrix LCD using a conventional COG mounting method.

Claims (6)

[Claims] 1. An LCD cell substrate in which two glass substrates having electrodes formed on the inner surface are integrally laminated with a liquid crystal layer interposed therebetween, and an FPC connected to peripheral terminals of the LCD cell substrate.
And a scanning board and a signal board on which a scanning electrode driving circuit component and a signal electrode driving circuit component are respectively mounted. A mounting structure of a liquid crystal display element, wherein at least one of a scanning electrode driving IC chip and a signal electrode driving IC chip is mounted on the scanning substrate or the signal substrate. 2. An LCD cell substrate in which two glass substrates having electrodes formed on an inner surface thereof are integrally laminated with a liquid crystal layer interposed therebetween, and an FPC is integrally led out to terminals around the LCD cell substrate. A scanning substrate and a signal substrate on which the scanning electrode driving circuit component and the signal electrode driving circuit component are mounted, respectively, wherein at least one of the scanning substrate or the signal substrate includes: Said L
The first substrate adjacent to the CD cell substrate, other second substrates, etc.
It is divided into a p-th substrate (p ≧ 2), the divided substrates are integrally connected by an FPC, and a scan electrode driving IC chip or a signal electrode driving IC chip is mounted on the first substrate. Mounting structure of the liquid crystal display element. 3. The mounting structure of a liquid crystal display element according to claim 1, wherein the scanning substrate or the signal substrate comprises a multilayer FPC or a flex-rigid substrate. 4. The method according to claim 1, wherein the FPC derived from the scanning substrate or the signal substrate is an ACF.
A mounting structure for a liquid crystal display element, wherein the liquid crystal display element is bonded to the LCD cell substrate by using (anisotropic conductive adhesive film). 5. The liquid crystal display element according to claim 1, wherein the scanning electrode driving IC chip or the signal electrode driving IC chip is bonded to the scanning substrate or the signal substrate by a flip chip method. Mounting structure. 6. The scanning substrate according to claim 2, wherein the scanning substrate is divided into a first substrate from which an FPC to be connected to the LCD cell substrate is led, an intermediate second substrate, and a third terminal substrate. The first substrate is disposed parallel to the outside of the LCD cell substrate, the second substrate is disposed substantially at a right angle on the opposite side of the first substrate from the LCD cell substrate, and the third substrate is: Substantially perpendicular to the second substrate, the first substrate
A mounting structure of a liquid crystal display element, which is arranged so as to substantially overlap with a substrate.