JPH1012791A - Lead frame, method of manufacturing lead frame, and method of manufacturing semiconductor device - Google Patents

Abstract

(57) [Summary] (with correction) [PROBLEMS] To reduce the lead pitch of a lead frame and secure sufficient strength. SOLUTION: In a lead frame in which an inner end 4a is connected to an external electrode of a semiconductor chip and an outer end 4c is integrated with a plurality of leads to be external terminals of the semiconductor device, an inner end 4a of each lead is included. An inner lead frame 6 having an integrated inner portion and an outer lead frame 8 having an outer portion including an outer end 4c of each lead are connected to form an inner lead frame 6. The thickness is made thinner than 8. [Effect] By reducing the thickness of the inner end portion of the lead that requires miniaturization, the lead pitch can be miniaturized.
By increasing the thickness of the outer end of the lead that requires strength, the strength of the outer end is ensured.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a lead frame and a method of manufacturing a semiconductor device using the same, and more particularly, to a technique which is effective when applied to miniaturization of a tip pitch of an inner lead.

[0002]

2. Description of the Related Art In the manufacture of a semiconductor device, a plurality of leads each composed of an inner lead connected to a pad serving as an external electrode of a semiconductor chip to be mounted and an outer lead serving as an external terminal of the semiconductor device are formed by a frame, a dam bar, or the like. Lead frames are integrated.

[0003] Such a lead frame is 42 alloy,
It is formed by stamping or etching a thin metal plate such as copper. The processing limit of the stamping process is that the processing pitch is limited by the plate thickness, the lead width is 85% of the plate thickness, and the lead interval is the plate thickness. 75% is the minimum processing size. For example, when the lead frame thickness is 0.15 mm, the pitch is limited to about 0.20 mm. This limit is almost the same in the case of etching.

The number of pins, which are external terminals of a semiconductor device, is increasing with the increase in the number of functions of a semiconductor chip due to the progress of miniaturization, and the miniaturization of a lead frame is required in accordance with the increase in the number of pins. ing.

Also, with the miniaturization of semiconductor chips due to the progress of miniaturization, the external dimensions of semiconductor devices are also required to be miniaturized, and the miniaturization of lead frames is also required in accordance with such miniaturization. . Such narrowing of the lead pitch is described in “VLSI Packaging Technology”, Vol. 165 to 167, published by Nikkei BP.

[0006]

However, as described above, the conventional lead pitch of about 0.2 mm requires a pad pitch of the semiconductor chip of 0.12 mm.
It is about. In order to reduce the lead pitch, it is conceivable to reduce the plate thickness. However, in this method, the rigidity of the lead frame becomes weak and handling becomes difficult. In particular, the outer leads after the lead molding are easily deformed, the product yield is reduced, and the quality is adversely affected.

In the future, it is conceivable that the pad pitch must be reduced to about 0.06 mm, and in order to realize this, it is necessary to improve the lead frame.

An object of the present invention is to provide a technique capable of reducing the lead pitch of a lead frame and securing sufficient strength.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0010]

Means for Solving the Problems Among the inventions disclosed in the present application, the outline of typical inventions will be briefly described.
It is as follows.

In a lead frame in which an inner end is connected to an external electrode of a semiconductor chip and an outer end is integrated with a plurality of leads serving as external terminals of the semiconductor device, an inner portion including the inner end of each lead And forming an inner lead frame by connecting an outer lead frame integrating an outer portion including the outer end portion of each lead, and forming the inner lead frame to have a thickness greater than that of the outer lead frame. make it thin.

According to the above-mentioned means, the lead pitch can be made finer by reducing the thickness of the inner end portion of the lead which requires miniaturization, and the thickness of the outer end portion of the lead which requires strength can be increased. By doing so, the strength of the outer end is ensured.

Hereinafter, embodiments of the present invention will be described.

In all the drawings for describing the embodiments, those having the same functions are denoted by the same reference numerals, and their repeated description will be omitted.

[0015]

FIG. 1 is a plan view showing a lead frame according to an embodiment of the present invention.

The lead frame of this embodiment is a QFP
(Quad Flat Package) Lead frame for a semiconductor device, in which a tab 1 for mounting a semiconductor chip (not shown) is provided at the center, and the tab 1 is fixed to the first frame 3 by a tab suspension lead 2. Have been. The first frame 3 plays a role of a dam bar at its inner edge to prevent the outflow of sealing resin during resin sealing.

Around the tub 1, there are provided inner ends 4a of a plurality of leads 4 connected to external electrodes of the semiconductor chip. Each of the leads 4 has an inner end 4a, an intermediate portion 4b, and an outer end. An intermediate portion 4b connects two plate members having different thicknesses, and the outer end portion 4c is fixed to the second frame 5.

The second frame 5 is an outer frame of the lead frame. The normal lead frame has a multiple structure in which a plurality of lead frame patterns shown in FIG. 1 are formed in the same direction.

Next, a method of manufacturing the lead frame will be described.

The lead frame of the present invention is formed by connecting an inner lead frame in which the inner part of each lead 4 is integrated and an outer lead frame in which the outer part of each lead is integrated.

FIG. 2 is a plan view showing the inner lead frame 6. In this embodiment, the inner end 4, which is the inner portion of the lead 4, is provided by a rectangular frame-shaped tie bar 7 provided on the outer periphery.
a and a part of the intermediate portion 4b are integrated.

FIG. 3 is a plan view showing the outer lead frame 8. In this embodiment, the first frame 3 and the second frame 5 having a rectangular frame shape are used to cover the outer portion of the lead 4. The other part of the intermediate part 4b and the outer end part 4c are integrated.

Inner lead frame 6 and outer lead frame 8
As shown in FIG. 4, a part of the tie bar 7 and an inner end of the lead 4 of the outer lead frame 8 are overlapped with the inner lead frame 6 facing down as shown in FIG. FIG. 5 shows a cross section along the line AA in FIG.

In this state, the inner lead frame 6 is spot welded in the shaded area in FIG.
And the outer lead frame 8 are connected. This state is shown in FIG.

Thereafter, as shown in FIG.
The tie bars 7 are cut between the respective leads 4 by a laser or the like, and the respective leads 4 of the inner lead frame 6 are made independent from each other, and the lead frame shown in FIG.

In the manufacture of a semiconductor device using this lead frame, as shown in FIG.
Then, the semiconductor chip 9 is fixed by resin bonding, eutectic bonding, solder bonding, or the like, and the external electrodes of the fixed semiconductor chip 9 and the inner ends 4a of the leads 4 are connected by bonding wires 10 of gold or aluminum. FIG. 10 is a vertical sectional side view taken along line BB in FIG.

Thereafter, as shown by a broken line, a resin sealing body 11 is formed up to the inner edge of the first frame 3 with a sealing resin such as an epoxy resin, and the first frame 3 and the second frame 3 are formed. The body 5 is cut to make each lead 4 independent, and the lead outer end 4c is formed into a required shape.

In the present invention, by reducing the thickness of the inner lead frame 6 on which the lead inner ends 4a that need to be miniaturized are formed, the lead pitch can be made finer, and the outer ends of the leads that require strength are reduced. By increasing the thickness of the outer lead frame 8 on which the portion 4c is formed, the strength of the outer end portion 4c is ensured.

For example, as a lead frame structure which can cope with a pitch between external electrodes of the semiconductor chip 9 of 0.06 mm, when a 42 alloy (Fe-42Ni alloy) is used as a plate material, the pitch of the lead end portions 4a is 0.1 mm. 13mm
The width and spacing of the tip 4a are each 0.07m
m, 0.06 mm, and the plate thickness of the inner lead frame 6 is about 0.08 mm. In this case, since the thickness of the inner lead frame 6 is reduced, the rigidity is reduced, which may cause a problem in handling. Therefore, an H material having a higher hardness than a generally used lead frame is used. The thickness of the outer lead frame 8 is set to a normal value of 0.
It is about 15 mm.

As described above, the invention made by the present inventor is:
Although a specific description has been given based on the above-described embodiment, the present invention is not limited to the above-described embodiment, and it is needless to say that various modifications can be made without departing from the gist of the invention.

For example, in the above-described embodiment, the tie bar 7 is provided on the outer circumference. However, as shown in FIG. 11, a rectangular frame-shaped tie bar 12 provided on the inner circumference forms the inner end 4a of the lead 4 and the intermediate portion. 4b may be integrated.

It is also possible to constitute the inner lead frame by integrating each lead with an insulating film or the like instead of the tie bar. Further, an anisotropic conductive film is used as the film, and The present invention can be implemented as a configuration for connecting the inner lead frame and the outer lead frame. In these configurations, the cutting of the tie bar is unnecessary.

[0033]

The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows.

(1) According to the present invention, since the inner lead frame and the outer lead frame are provided separately, there is an effect that the thickness of the inner lead frame can be reduced.

(2) According to the present invention, the effect (1) has an effect that the lead pitch can be miniaturized.

(3) According to the present invention, the effect (2) has an effect that it is possible to cope with an increase in the number of pins of a semiconductor device.

(4) According to the present invention, since the inner lead frame and the outer lead frame are provided separately, there is an effect that the thickness of the outer lead frame can be increased.

(5) According to the present invention, the effect (4) has an effect that the strength of the outer end of the lead can be secured.

(6) According to the present invention, the effect (5) has an effect that handling becomes easy.

(7) According to the present invention, the effect (5) has an effect of preventing deformation of the lead and improving the yield.

[Brief description of the drawings]

FIG. 1 is a plan view showing a lead frame according to an embodiment of the present invention.

FIG. 2 is a plan view showing an inner lead frame of the lead frame shown in FIG. 1;

FIG. 3 is a plan view showing an outer lead frame of the lead frame shown in FIG. 1;

FIG. 4 is a partially enlarged plan view showing an arrangement of an inner lead frame and an outer lead frame.

FIG. 5 is a partial cross-sectional view in FIG.

FIG. 6 is a partially enlarged plan view showing a connection state between an inner lead frame and an outer lead frame.

FIG. 7 is a plan view showing a state where an inner lead frame and an outer lead frame are connected.

FIG. 8 is a partially enlarged plan view showing a tie bar cut state of the inner lead frame.

FIG. 9 is a plan view showing a state where a semiconductor chip is mounted on a lead frame.

FIG. 10 is a vertical sectional side view in FIG. 9;

FIG. 11 is a plan view showing a modification of the inner lead frame.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Tab, 2 ... Tab suspension lead, 3 ... 1st frame, 4 ...
Lead, 4a: Lead inner end, 4b: Lead middle, 4
c: Lead outer end, 5: Second frame, 6: Inner lead frame, 7, 12: Tie bar, 8: Outer lead frame, 9
... semiconductor chip, 10 ... bonding wire, 11 ... resin sealing body.

Claims (9)

[Claims] 1. A lead frame having an inner end connected to an external electrode of a semiconductor chip and an outer end integrated with a plurality of leads serving as external terminals of a semiconductor device, wherein the lead frame includes the inner end of each lead. A lead frame formed by connecting an inner lead frame in which one side portion is integrated with an outer lead frame in which an outer portion including the outer end portion of each lead is integrated. 2. The lead frame according to claim 1, wherein the inner lead frame has a smaller thickness than the outer lead frame. 3. The lead frame according to claim 2, wherein the inner lead frame is made of a material having higher strength or hardness than the outer lead frame. 4. A method for manufacturing a lead frame in which an inner end is connected to an external electrode of a semiconductor chip and an outer end is integrated with a plurality of leads serving as external terminals of a semiconductor device, wherein the inner end of each lead is Forming an inner lead frame integrating an inner portion including: an outer lead frame integrating an outer portion including the outer end of each lead; and forming the inner lead frame and the outer lead. Connecting a lead frame to the lead frame. 5. The method according to claim 4, wherein the inner lead frame is integrated with a tie bar. 6. After the step of connecting the inner lead frame and the outer lead frame, cutting the tie bar,
6. The method according to claim 5, further comprising a step of separating the inner end portion for each lead. 7. A method of manufacturing a semiconductor device using a lead frame in which an inner end is connected to an external electrode of a semiconductor chip and a plurality of leads whose outer ends are external terminals of the semiconductor device are integrated by a frame. Using an inner lead frame integrating an inner portion including the inner end of each lead, and a lead frame connecting an outer lead frame integrating an outer portion including the outer end of each lead, After fixing the semiconductor chip to the lead frame, connecting the inner end of the lead and the external electrode of the semiconductor chip, and sealing the lead and the semiconductor chip except the outer end, the frame of the lead frame And a method of manufacturing a semiconductor device. 8. The method according to claim 7, wherein the inner lead frame has a smaller thickness than the outer lead frame. 9. The method according to claim 8, wherein the inner lead frame is made of a material having higher strength or hardness than the outer lead frame.