JPH1012897A - Glass-coated semiconductor device and method of manufacturing the same - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To increase the breakdown voltage of a mesa-type glass-coated semiconductor device coated with lead-based glass, to minimize leakage current, and to achieve high reliability. SOLUTION: An n-type semiconductor region 1 is used as a semiconductor base, a high impurity concentration p + type semiconductor region 2 is formed on one main surface, and a high impurity concentration n + type semiconductor region 3 is formed on the other main surface. Pn is formed in a predetermined region from one main surface.
A mesa groove is provided so that the junction is exposed, and a first insulating film 6 and a glass film 5 made of a silicon nitride film are sequentially formed in the mesa portion. [Effect] By interposing a silicon nitride film between a glass film and a semiconductor, it is possible to prevent aluminum in the glass from diffusing into the semiconductor, to prevent generation of a leak current due to a channel current, and to prevent leakage. The current can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a glass-coated semiconductor device and a method for manufacturing the same, and more particularly, to a glass-coated semiconductor device with reduced reverse leakage current and a method for manufacturing the same.

[0002]

2. Description of the Related Art Various techniques for increasing the breakdown voltage of a mesa semiconductor device (a semiconductor device in which at least one groove is formed by etching from the main surface of the semiconductor device and a pn junction is exposed on the side wall of the groove). Has been conventionally proposed.

[0003] As a prior art relating to increasing the breakdown voltage of this type of mesa type semiconductor device, for example, Japanese Patent Application Laid-Open No. Sho 60-1860.
A technique described in, for example, Japanese Patent Application Publication No. 71 is known. This prior art is a method of manufacturing a semiconductor device in which the inner wall of a mesa groove is covered with glass. In a method of manufacturing a semiconductor device, a pn junction exposed in the mesa groove is moved from an initial position by heat treatment or the like after forming the mesa groove. It is intended to increase the breakdown voltage of the device.

Further, as another prior art relating to a high breakdown voltage of a mesa type semiconductor device, for example, Japanese Patent Application Laid-Open No. 7-2210
A technique described in, for example, Japanese Patent Publication No. 49 is known. This prior art provides two adjacent mesa grooves within a certain width,
(2) A convex portion is provided in the middle of the mesa groove for communication, and this convex portion is formed by etching so as to be lower than the surface of the semiconductor substrate so that cracks do not enter the glass during dicing. Another object of the present invention is to improve the reliability of the semiconductor device and increase the breakdown voltage.

[0005]

The prior art described above is
In the case where the semiconductor device is a diode, in a blocking state in which a reverse bias voltage is applied to the diode, no consideration is given to a problem related to an increase in leakage current due to a channel current caused by an inversion layer formed on the semiconductor surface of the mesa portion. There is a problem that the leakage current at the time of reverse bias is large.

An object of the present invention is to provide a glass-coated semiconductor device capable of solving the above-mentioned problems of the prior art and reducing a leakage current in a blocking state to which a high reverse voltage is applied, and a method of manufacturing the same. It is in.

[0007]

According to the present invention, the object is to provide a semiconductor device having a pair of main surfaces by diffusing impurities of a conductivity type opposite to that of the semiconductor substrate from one of the main surfaces.
A glass coating formed by forming a bond, forming a mesa portion by forming a groove in a mesa shape so that the pn junction is exposed in a predetermined region from the one main surface, and forming a glass film on the mesa portion. In a semiconductor device, this is achieved by interposing a silicon nitride film, a laminated film of a silicon nitride film and a silicon oxide film, or a silicon nitride oxide film between the glass film and the semiconductor substrate.

The object is achieved by forming a semiconductor region of the same conductivity type as the substrate and having a high impurity concentration so as to surround the exposed pn junction and to be isolated from the pn junction.

Further, the object is to form a first conductive type first semiconductor region having a pair of main surfaces from one main surface of a semiconductor substrate forming the first conductive region and extending to the first semiconductor region. Forming a pn junction by diffusing a second semiconductor region of the second conductivity type, which is a second conductivity type, and forming a third impurity of the same conductivity type as the first semiconductor region and having a high impurity concentration from the other main surface.
A step of forming a semiconductor region, a step of forming a mesa portion by forming a mesa-shaped groove so that a pn junction is exposed in a predetermined region from one main surface, and a silicon nitride film and a silicon oxide film on one main surface Forming a stacked film of silicon and a silicon nitride film or a silicon nitride oxide film, forming a glass film on the mesa portion, and exposing a part of the second semiconductor region on one main surface. Exposing a part of the third semiconductor region on the other main surface, and exposing the second semiconductor region;
The step of forming an ohmic-connected electrode in each of the third semiconductor regions is achieved by manufacturing a glass-coated semiconductor device.

The object of the present invention is to expose a part of the second semiconductor region on the one main surface, using a glass coating as a mask, a silicon nitride film, a laminated film of a silicon nitride film and a silicon oxide film, or This is achieved by removing the silicon nitride oxide film.

Further, the above object is the same as the first semiconductor region extending from one main surface to the first semiconductor region so as to surround the pn junction before the step of forming the mesa groove and forming the mesa portion. A step of selectively forming a conductive type fourth semiconductor region having a high impurity concentration is added, and a step of forming a mesa portion by providing the mesa groove is performed by using a first semiconductor region and a second semiconductor region from one main surface. And a step of providing a mesa-shaped groove such that a junction between the first semiconductor region and the fourth semiconductor region is exposed. The step of forming the ohmic-connected electrodes in each of the semiconductor regions is achieved by performing any one of a vapor deposition method, an electrolytic plating method, and an electroless plating method.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of a glass-coated semiconductor device and a method of manufacturing the same according to the present invention will be described in detail with reference to the drawings.

FIG. 1 is a sectional view showing the configuration of a glass-coated semiconductor device according to a first embodiment of the present invention, and FIG. 2 is a plan view showing the configuration of the glass-coated semiconductor device according to the first embodiment of the present invention. . 1 and 2, 1 is an n-type semiconductor region, 2 is a p + type semiconductor region, 3 is an n + type semiconductor region,
5 is a glass coating, 6 is a first insulating film, 12 is a pn junction end, 20 is an anode electrode, and 30 is a cathode electrode.
Note that the cross-sectional view shown in FIG. 1 shows a cross-section of a portion indicated by an AA ′ section in FIG.

As shown in FIGS. 1 and 2, the glass-coated semiconductor device according to the first embodiment of the present invention has an n-type semiconductor region 1 as a semiconductor substrate, and has one of its main surfaces having a high impurity concentration of p +. A semiconductor region 2 is formed, an n @ + -type semiconductor region 3 having a high impurity concentration is formed on the other main surface, and a mesa groove is provided so as to expose a pn junction from one main surface to a predetermined region. The first insulating film 6 and the glass coating 5 according to the present invention are sequentially formed on the portion. An anode electrode 20 is formed in the p + -type semiconductor region 2 serving as an anode layer, and a cathode electrode 30 is formed in ohmic contact with the n + -type semiconductor region 3 serving as a cathode layer.

FIG. 2 is a plan view of one main surface of the glass-coated semiconductor device according to the first embodiment of the present invention, which shows an anode electrode 20, a glass coating 5, and a first insulating film 6.
, A pn junction end 12 composed of an n-type semiconductor region 1 as a first semiconductor region and ap + -type semiconductor region 2 as a second semiconductor region. 1 and 2
In the glass-coated semiconductor device according to the first embodiment of the present invention, the end 12 of the main pn junction has a quadrangular shape having curvature at the four corners, and is located below the glass coating 5. .

Next, the fact that the glass-coated semiconductor device having the structure shown in FIGS. 1 and 2 is effective in reducing the leak current will be described.

Now, in the glass-coated semiconductor device according to the first embodiment shown in FIGS.
It is assumed that a reverse voltage having a negative polarity and a positive polarity at the cathode electrode 30 is applied. At this time, the p + type semiconductor region 2
And the n-type semiconductor region 1 is in a reverse bias state, and the depletion layer extends from the main pn junction to the p + -type semiconductor region 2 and the n-type semiconductor region 1. When the impurity concentration of the n-type semiconductor region 1 is significantly lower than that of the p + -type semiconductor region 2, it can be considered that the depletion layer almost entirely expands toward the n-type semiconductor region 1. Normally, the leak current consists of a current caused by carriers thermally generated inside the depletion layer and a diffusion current caused by diffusion of minority carriers thermally generated in a neutral region other than the depletion layer. Most of the leakage current is caused by a current caused by carriers thermally generated inside the depletion layer.

The present inventors have found that, when lead-based glass is used as the glass coating 5 as the coated glass, the cause of the leak current is not only the above-mentioned current due to the carrier but also the channel current composed of the resistance component. This is because
Aluminum in the lead glass (main component: PbO, SiO ₂ , Al ₂ O ₃ ) diffuses into the surface of the n-type semiconductor region 1,
It has been found that the surface of the n-type semiconductor region 1 is a p-type inversion layer.

Therefore, the first embodiment of the present invention is directed to the first embodiment.
As the insulating film 6, a film having a small diffusion coefficient of aluminum, for example, a silicon nitride film is used. According to the first embodiment of the present invention, the formation of the above-described p-type inversion layer can be prevented, the component of the leak current due to the channel current is reduced to only the current due to the carrier, and the increase in the leak current is prevented. can do.

FIG. 3 is a sectional view showing the structure of a glass-coated semiconductor device according to a second embodiment of the present invention. In FIG. 3, reference numeral 4 denotes an n @ + type semiconductor region, and other reference numerals are the same as those in FIG.

The glass-coated semiconductor device according to the second embodiment of the present invention is adjacent to the n-type semiconductor region 1 so as to surround the p + -type semiconductor region 2 around the chip of the glass-coated semiconductor device according to the first embodiment. Thus, an n + type semiconductor region 4 is formed. With such a configuration, the glass-coated semiconductor device according to the second embodiment of the present invention can not only prevent the depletion layer extending from the main pn junction from extending to the chip end, but also cut the glass during dicing. Since it is not necessary, the effect of reducing the withstand voltage failure due to the occurrence of cracks in the glass can also be obtained.

FIG. 4 is a sectional view showing the structure of a glass-coated semiconductor device according to a third embodiment of the present invention. In FIG. 4, reference numeral 7 denotes a second insulating film, and other reference numerals are the same as those in FIG.

The glass-coated semiconductor device according to the third embodiment of the present invention is different from the first embodiment of the present invention described with reference to FIG. 1 in that the distance between the first insulating film 6 made of a silicon nitride film and the semiconductor surface is different. Second insulating film 7 of silicon dioxide film
Are interposed. According to the third embodiment of the present invention, the interface level on the semiconductor surface can be reduced by adding the second insulating film 7 to the first embodiment shown in FIG. Can be reduced.

FIG. 5 is a sectional view showing the configuration of a glass-coated semiconductor device according to a fourth embodiment of the present invention, and the reference numerals in the figures are the same as those in FIGS.

The fourth embodiment of the present invention shown in FIG. 5 is different from the first embodiment of the present invention described with reference to FIG. 1 in that a high impurity concentration n + type semiconductor region 4 described with reference to FIG. In addition to the above, the second insulating film 7 shown in FIG. 4 is added. According to the fourth embodiment of the present invention, it is possible to prevent an increase in leak current due to the depletion layer extending from the main pn junction extending to the end of the chip, and it is not necessary to cut the glass at the time of dicing. Withstand voltage failure due to the occurrence of cracks can be reduced, the interface state on the semiconductor surface can be reduced, and the surface current flowing on the semiconductor surface can be reduced.

FIG. 6 is a sectional view showing the structure of a glass-coated semiconductor device according to a fifth embodiment of the present invention. 6, reference numeral 8 denotes a third insulating film, and other reference numerals are the same as those in FIG.

In the glass-coated semiconductor device according to the fifth embodiment of the present invention, a third silicon nitride oxide film is used instead of the first insulating film 6 in the first embodiment of the present invention described with reference to FIG. The insulating film 8 is used, and only by forming a third insulating film 8 as a base film of the glass film 5, the first insulating film 6 described with reference to FIG. 2 and the interface state reducing effect of the second insulating film 7 described with reference to FIG.

FIG. 7 is a sectional view showing the structure of a glass-coated semiconductor device according to a sixth embodiment of the present invention. The reference numerals in FIG. 7 are the same as those in FIGS.

The glass-coated semiconductor device according to the sixth embodiment of the present invention is different from the first embodiment of the present invention described with reference to FIG. 1 in that the n + -type semiconductor region having a high impurity concentration described with reference to FIG. 4, and a third insulator 8 which is a silicon nitride oxide film is used instead of the first insulating film 6 in the first embodiment described with reference to FIG.

According to the sixth embodiment of the present invention, the effect of preventing the diffusion of aluminum from the glass film 5 and the effect of the interface can be obtained only by forming the third insulating film 8 as a base film of the glass film 5. The effect of reducing the level, the effect of preventing an increase in leak current due to the depletion layer extending from the main pn junction extending to the end of the chip, and the effect of reducing the withstand voltage failure due to the occurrence of cracks in glass are combined. You can have.

FIG. 8 is a sectional view of each step for explaining main steps for manufacturing the glass-coated semiconductor device according to the first embodiment of the present invention described with reference to FIG. Next, a method for manufacturing the glass-coated semiconductor device according to the first embodiment of the present invention will be described.

(1) An n-type CZ (111) n-type semiconductor substrate 1 of 35 Ωcm to 45 Ωc
m is prepared, and B (boron) having a surface impurity concentration of 1 × 10 ¹⁹ / cm ² or more is added to one main surface of the
It is formed at a depth of 5 μm by ion implantation or thermal diffusion using boron nitride as a diffusion source, and P (phosphorus) having a surface impurity concentration of 1 × 10 ²⁰ / cm ² or more is formed on the other main surface at 45 ± 10 μm. Is formed by ion implantation or phosphorus hypochlorite to a depth of about 2 .mu.m, and silicon oxide films 7a and 7b of about 2 .mu.m to 3 .mu.m are formed by dry oxidation or wet oxidation (step a).

(2) Next, after removing a part of the silicon dioxide film 7a on one main surface by ordinary photolithography, etching is performed with a U01 etchant to about 60 μm, and the p + type semiconductor region 2 and the n + type A mesa groove is formed so that a pn junction formed with the semiconductor region 1 is exposed (step b).

(3) Thereafter, the silicon dioxide films 7a and 7b used in the step b were removed with an acid containing HF, and thermal nitridation in an ammonia gas atmosphere, monosilane gas and ammonia gas, or dichlorosilane and ammonia gas were used. The silicon nitride film serving as the first insulating film 6 is formed to a thickness of about 5 nm to 10 nm by a CVD method or a plasma CVD method using a monosilane gas and a nitrogen gas or an ammonia gas.
It is formed to a thickness of 0 nm (step c).

(4) Next, a lead-based glass in paste form (main components: PbO, SiO ₂ , Al
₂ O ₃ ) is applied at 55 ± 10 μm and heat treated at 800 ° C. to 850 ° C. for 40 minutes in an oxygen atmosphere as glass baking to form a glass coating 5 (step d).

(5) Thereafter, the first insulating film 6 formed on the surface of the p + type semiconductor region 2 serving as an anode layer and the surface of the n + type semiconductor region 3 serving as a cathode layer is subjected to photolithography and wet etching or dry etching. To form an anode electrode 20 and a cathode electrode 30 of Cr—Ni—Ag electrodes by ordinary photolithography and vapor deposition and lift-off processes (step e,
f).

FIG. 9 is a sectional view of each step for explaining main steps for manufacturing the glass-coated semiconductor device according to the second embodiment of the present invention described with reference to FIG. Next, a method for manufacturing the glass-coated semiconductor device according to the second embodiment of the present invention will be described. The description of the same steps as those described with reference to FIG. 8 will be omitted.

(1) As a silicon substrate to be the n-type semiconductor region 1, an n-type CZ (111) of 35Ωcm to 45Ωc
m, and a part of the oxide film on one main surface is
After removing the window by photolithography and removing the oxide film formed on the other main surface, P (phosphorus) having an impurity concentration of 1 × 10 ²⁰ / cm ² or more on the surface is subjected to the final diffusion heat treatment. The n + type semiconductor regions 4 and 3 are formed by ion implantation or phosphorus hypochlorite so that the depth becomes 45 ± 10 μm, and the n + type semiconductor region 4 on one main surface is not formed. B (boron) having a surface impurity concentration of 1 × 10 ¹⁹ / cm ² or more from the surface of the n-type semiconductor region 1
Is formed by ion implantation or thermal diffusion using boron nitride as a diffusion source so that the depth becomes 40 ± 5 μm after the final diffusion heat treatment. Further, silicon dioxide films 7a and 7b of about 2 μm to 3 μm are formed by dry oxidation or wet oxidation (step a).

(2) Next, after a part of the silicon dioxide film 7a on one main surface is removed by ordinary photolithography, the silicon oxide film 7a is etched by about 60 μm with a U01 etchant, and the p + -type semiconductor region 2 and the n-type A mesa groove is formed so that a pn junction formed with the semiconductor region 1 and an n + n junction formed with the n + type semiconductor region 4 and the n type semiconductor region 1 are exposed (step b).

(3) Thereafter, steps c to f are performed, but the specific contents of these steps are substantially the same as those in FIG.

In the manufacturing method according to the present invention described above with reference to FIGS. 8 and 9, the step of forming the first insulating film of the silicon nitride film includes the step of forming the third insulating film of the silicon nitride oxide film. By doing so, a glass-coated semiconductor device can be manufactured in substantially the same manner.

As a method for forming the third insulating film which is a nitrided oxide film, a plasma excitation reaction using monosilane gas and N ₂ O gas as raw materials may be used, and about 5 nm to 50 nm by dry oxidation or wet oxidation. After forming the silicon dioxide film, a method of nitriding at a temperature of 900 ° C. to 1100 ° C. for 1 minute to 10 minutes by lamp heating in an NO gas atmosphere can also be used. Alternatively, N ₂ O
800 ° C to 1000 ° C by lamp heating in gas atmosphere
By performing heat treatment at a temperature of 10 seconds to 10 minutes, a nitrided oxide film can be formed.

The method of forming a nitrided oxide film according to the present invention is not limited to the method described here, but may be any combination of monosilane gas, ammonia gas, NO gas, N ₂ O gas, oxygen gas, nitrogen gas and the like. May be used, or a photo-excitation reaction or a photo-assisted CVD method may be used.

FIG. 10 shows the third embodiment of the present invention described with reference to FIG.
It is sectional drawing for every process explaining the main process for manufacturing the glass-coated semiconductor device by 3rd Embodiment, Hereinafter, with reference to this figure, manufacture of the glass-coated semiconductor device by 3rd Embodiment of this invention The method will be described.

The manufacturing method shown in FIG. 10 basically corresponds to FIG.
Since the process c for forming the first and second insulating films is different from the method described with reference to FIG. 8, only the process c will be described here, and the other processes will be described. Is omitted.

After the step b for forming the mesa groove is completed, a silicon dioxide film to be the second insulating film 7 is formed to a thickness of about 5 nm to 50 nm by dry oxidation or wet oxidation, and then the first insulating film 6 is formed. CVD method using monosilane gas and ammonia gas or dichlorosilane and ammonia gas, or plasma C using monosilane gas and nitrogen gas or ammonia gas.
Formed to a thickness of about 5 nm to 100 nm by VD method,
Steps d to f are performed.

FIG. 11 shows the fourth embodiment of the present invention described with reference to FIG.
It is a sectional view for every process explaining a main process for manufacturing a glass-covered semiconductor device according to the embodiment of the present invention. Hereinafter, with reference to this figure, manufacture of the glass-coated semiconductor device according to the fourth embodiment of the present invention The method will be described.

Of the steps shown in FIG. 11, steps a and b are the same as those described with reference to FIG.
Similarly to the step c described with reference to FIG.
And a silicon nitride film to be the first insulating film 6 are formed. Subsequent steps d to f are the same as those described with reference to FIG.

The glass-coated semiconductor device according to each of the embodiments of the present invention described above and the glass-coated semiconductor device obtained by the method for manufacturing the same can obtain a withstand voltage of about 800 V and a leakage current of the glass-coated semiconductor device. The reverse applied voltage was 10 nA or less at 400 V, and the blocking characteristics were extremely excellent. Further, a high-temperature reverse bias test (DC 400 V, junction temperature 150 ° C., time 1000 h) was performed.
Only an increase of 0% was confirmed, indicating high reliability.

FIGS. 12 to 14 are sectional views showing the structure of the glass-coated semiconductor device according to the seventh to ninth embodiments of the present invention. 12 to 14, reference numeral 200 denotes an anode electrode, reference numeral 300 denotes a cathode electrode, and other reference numerals are the same as those in FIGS. 1, 4, and 6.

The glass-coated semiconductor device according to the seventh embodiment of the present invention shown in FIG. 12 includes an anode electrode 200 formed in ohmic contact with ap + type semiconductor region 2 serving as an anode layer, and an n + type The cathode electrode 300 formed in ohmic contact with the semiconductor region 3 is formed on the first insulating film 6 from one main surface by using the glass coating 5 as a mask.
Is removed by wet etching or dry etching, and then formed by electrolytic plating or electroless plating. Also in the eighth and ninth embodiments of the present invention shown in FIGS. 13 and 14, a part of the first insulating film 6 and a part of the second insulating film 7 are wet-etched or dry-etched using the glass coating 5 as a mask. Or a part of the third insulating film 8 is removed by wet etching or dry etching, and then the anode electrode 200 and the cathode electrode 300 are formed by electrolytic plating or electroless plating.

As described above, by using the glass coating 5 as a mask for removing a part of the insulating film, FIG.
In manufacturing the glass-coated semiconductor device described with reference to FIGS. 4 and 6, the advantage that the photoresist patterning step can be omitted can be obtained, and the electrode forming step is performed twice on the front surface and the back surface. Advantageously, it is possible to reduce the number of plating steps to one.

FIGS. 15 to 17 show the tenth to twelfth embodiments of the present invention.
FIG. 3 is a cross-sectional view illustrating a configuration of a glass-coated semiconductor device according to an embodiment. 15 to 17, reference numeral 200 denotes an anode electrode, and reference numeral 300 denotes a cathode electrode, and the reference numerals in the drawings are the same as those in FIGS. 3, 5, and 7. FIG.

The tenth to twelfth embodiments of the present invention shown in FIGS. 15 to 17 have been described with reference to FIGS. 12 to 14 for the manufacture of the glass-coated semiconductor device shown in FIGS. 3, 5 and 7. The manufacturing method is applied, and an n + -type semiconductor region 4 is formed adjacent to the n-type semiconductor region 1 so as to surround the p + -type semiconductor region 2 around the chip of the glass-coated semiconductor device. Providing the n + type semiconductor region 4 not only prevents the depletion layer extending from the main pn junction from extending to the chip end, but also eliminates the need to cut the glass at the time of dicing. It is possible to reduce the withstand voltage failure caused by the occurrence. In addition, by employing the same manufacturing method as described with reference to FIGS. 12 to 14, the anode electrode 200 and the cathode electrode 300 can be formed by electrolytic plating or electroless plating. However, there is an advantage that it is possible to reduce the number of times of performing the process to two times to one plating step.

FIG. 18 is a sectional view of each step for explaining main steps for manufacturing the glass-coated semiconductor device according to the seventh embodiment of the present invention described with reference to FIG.
The method for manufacturing the glass-coated semiconductor device according to the seventh embodiment of the present invention will be described with reference to FIG. Steps a to d in FIG. 18 are the same as those described with reference to FIG. 8, and a description thereof will be omitted.

After the glass film 5 is formed in step d, a part of the first insulating film 6 is removed by wet etching or dry etching using the glass film 5 as a mask material, and then the surface is treated with hydrofluoric acid, hydrochloric acid or the like in a buffer. Process,
Wash with water (step e).

Thereafter, Ni is plated by an electrolytic plating method or an electroless plating method to form an anode electrode 200 and a cathode electrode 300 (step f).

FIG. 19 is a sectional view for explaining the main steps for manufacturing the glass-coated semiconductor device according to the eighth embodiment of the present invention described with reference to FIG.
The method of manufacturing the glass-coated semiconductor device according to the eighth embodiment of the present invention will be described with reference to FIG. Steps a to d in FIG. 19 are the same as those described with reference to FIG. 10 and will not be described.

After the glass film 5 is formed in step d, a part of the first insulating film 6 and the second insulating film 7 is removed by wet etching or dry etching using the glass film 5 as a mask material. The surface is treated with hydrofluoric acid, hydrochloric acid or the like, and washed with water (step e).

Thereafter, Ni is plated by an electrolytic plating method or an electroless plating method to form an anode electrode 200 and a cathode electrode 300 (step f).

The manufacturing method described with reference to FIGS. 18 and 19 can also be applied to the manufacture of a glass-coated semiconductor device having the structure described with reference to FIGS. Forming by plating or electroless plating has the advantage of reducing the need to perform the electrode process twice on the front and back surfaces to a single plating process, thereby significantly reducing the manufacturing process and reducing the cost. Then, a glass-coated semiconductor device can be manufactured.

[0062]

As described above, according to the present invention, the breakdown voltage of the mesa-type glass-coated semiconductor device coated with lead-based glass can be increased, the leakage current can be extremely reduced, and the reliability can be improved. Can be achieved.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a configuration of a glass-coated semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a plan view showing the configuration of the glass-coated semiconductor device according to the first embodiment of the present invention.

FIG. 3 is a cross-sectional view illustrating a configuration of a glass-coated semiconductor device according to a second embodiment of the present invention.

FIG. 4 is a sectional view showing a configuration of a glass-coated semiconductor device according to a third embodiment of the present invention.

FIG. 5 is a sectional view showing a configuration of a glass-coated semiconductor device according to a fourth embodiment of the present invention.

FIG. 6 is a sectional view showing a configuration of a glass-coated semiconductor device according to a fifth embodiment of the present invention.

FIG. 7 is a sectional view showing a configuration of a glass-coated semiconductor device according to a sixth embodiment of the present invention.

FIG. 8 is a cross-sectional view for each step explaining main steps for manufacturing the glass-coated semiconductor device according to the first embodiment of the present invention described with reference to FIG. 1;

FIG. 9 is a sectional view of each step for explaining main steps for manufacturing the glass-coated semiconductor device according to the second embodiment of the present invention described with reference to FIG. 3;

FIG. 10 is a sectional view for each main step for explaining main steps for manufacturing the glass-coated semiconductor device according to the third embodiment of the present invention described with reference to FIG. 4;

FIG. 11 is a cross-sectional view for each step explaining main steps for manufacturing the glass-coated semiconductor device according to the fourth embodiment of the present invention described with reference to FIG. 5;

FIG. 12 is a sectional view showing a configuration of a glass-coated semiconductor device according to a seventh embodiment of the present invention.

FIG. 13 is a sectional view showing a configuration of a glass-coated semiconductor device according to an eighth embodiment of the present invention.

FIG. 14 is a sectional view showing a configuration of a glass-coated semiconductor device according to a ninth embodiment of the present invention.

FIG. 15 is a sectional view showing a configuration of a glass-coated semiconductor device according to a tenth embodiment of the present invention.

FIG. 16 is a sectional view showing a configuration of a glass-coated semiconductor device according to an eleventh embodiment of the present invention.

FIG. 17 is a sectional view showing a configuration of a glass-coated semiconductor device according to a twelfth embodiment of the present invention.

FIG. 18 is a sectional view for each step explaining main steps for manufacturing the glass-coated semiconductor device according to the seventh embodiment of the present invention described with reference to FIG. 12;

FIG. 19 is a cross-sectional view for each step explaining main steps for manufacturing the glass-coated semiconductor device according to the eighth embodiment of the present invention described with reference to FIG. 13;

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 n-type semiconductor region 2 p + -type semiconductor region 3, 4 n + -type semiconductor region 5 glass coating 6 first insulating film 7 second insulating film 8 third insulating film 20, 200 anode electrode 30, 300 cathode electrode

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor, Muneo Tsuruoka 3-1-1, Sachimachi, Hitachi-shi, Ibaraki Pref. Hitachi, Ltd. Hitachi Plant (72) Inventor Minoru Sugano 3-chome, Bentencho, Hitachi-shi, Ibaraki No. 2 Inside Hitachi Haramachi Electronics Co., Ltd.

Claims (12)

[Claims] An pn junction is formed by diffusing impurities of a conductivity type opposite to that of the semiconductor substrate from one main surface of a semiconductor substrate having a pair of main surfaces, and forming the pn junction from the one main surface to a predetermined region. In a glass-coated semiconductor device formed by forming a mesa-shaped groove so that a junction is exposed and forming a mesa portion and forming a glass film on the mesa portion, a silicon nitride film is formed between the glass film and the semiconductor substrate. A glass-coated semiconductor device characterized by interposing. 2. A pn junction is formed by diffusing an impurity of a conductivity type opposite to that of the semiconductor substrate from one main surface of a semiconductor substrate having a pair of main surfaces, and forming the pn junction from the one main surface to a predetermined region. In a glass-coated semiconductor device formed by forming a mesa-shaped groove so that a junction is exposed and forming a mesa portion and forming a glass film on the mesa portion, a silicon nitride film is formed between the glass film and the semiconductor substrate. A glass-coated semiconductor device characterized by interposing a laminated film of a silicon oxide film and a silicon oxide film. 3. A pn junction is formed by diffusing an impurity of a conductivity type opposite to that of the semiconductor substrate from one main surface of a semiconductor substrate having a pair of main surfaces, and forming the pn junction from the one main surface to a predetermined region. In a glass-coated semiconductor device formed by forming a mesa portion by forming a groove in a mesa shape so that a junction is exposed, and forming a glass film on the mesa portion, silicon nitride oxide is provided between the glass film and the semiconductor substrate. A glass-coated semiconductor device comprising a film. 4. The semiconductor device according to claim 1, wherein a semiconductor region having the same conductivity type as that of the semiconductor substrate and having a high impurity concentration is formed separately from the pn junction so as to surround the exposed pn junction. 4. The glass-coated semiconductor device according to 2 or 3. 5. A first conductive type first having a pair of main surfaces.
From one main surface of the semiconductor substrate forming the semiconductor region,
A step of forming a pn junction by diffusing a second semiconductor region of a second conductivity type extending to the first semiconductor region and having a conductivity type opposite to that of the first semiconductor region; A step of forming a third semiconductor region having a high impurity concentration of a conductive type; a step of forming a mesa-shaped groove by forming a mesa-shaped groove so that a pn junction is exposed from a main surface to a predetermined region; Forming a silicon nitride film on the surface, forming a glass film on the mesa portion, exposing a part of the second semiconductor region on one main surface, and forming a third semiconductor region on the other main surface A method of manufacturing a glass-coated semiconductor device, comprising: a step of exposing a part of the semiconductor device; and a step of forming ohmic-connected electrodes in each of the exposed second semiconductor region and the third semiconductor region. 6. A first conductive type first having a pair of main surfaces.
From one main surface of the semiconductor substrate forming the semiconductor region,
A step of forming a pn junction by diffusing a second semiconductor region of a second conductivity type extending to the first semiconductor region and having a conductivity type opposite to that of the first semiconductor region; A step of forming a third semiconductor region having a high impurity concentration of a conductive type; a step of forming a mesa-shaped groove by forming a mesa-shaped groove so that a pn junction is exposed from a main surface to a predetermined region; A step of sequentially forming a silicon oxide film and a silicon nitride film on the surface; a step of forming a glass film on the mesa portion; a step of exposing a part of the second semiconductor region on one main surface; Exposing a part of the third semiconductor region, and forming an ohmic-connected electrode to each of the exposed second semiconductor region and the third semiconductor region. Device manufacturing method. 7. A first conductive type first having a pair of main surfaces.
From one main surface of the semiconductor substrate forming the semiconductor region,
A step of forming a pn junction by diffusing a second semiconductor region of a second conductivity type extending to the first semiconductor region and having a conductivity type opposite to that of the first semiconductor region; A step of forming a third semiconductor region having a high impurity concentration of a conductive type; a step of forming a mesa-shaped groove by forming a mesa-shaped groove so that a pn junction is exposed from a main surface to a predetermined region; Forming a silicon nitride oxide film on the surface;
Forming a glass film on the mesa portion, exposing a portion of the second semiconductor region on one main surface, exposing a portion of a third semiconductor region on the other main surface, Forming an ohmic-connected electrode in each of the second semiconductor region and the third semiconductor region thus formed. 8. A first conductive type first having a pair of main surfaces.
From one main surface of the semiconductor substrate forming the semiconductor region,
A step of forming a pn junction by diffusing a second semiconductor region of a second conductivity type extending to the first semiconductor region and having a conductivity type opposite to that of the first semiconductor region; A step of forming a third semiconductor region having a high impurity concentration of a conductive type; a step of forming a mesa-shaped groove by forming a mesa-shaped groove so that a pn junction is exposed from a main surface to a predetermined region; Forming a silicon nitride film on the surface, forming a glass film on the mesa portion, removing the silicon nitride film using the glass film as a mask, and forming a part of the second semiconductor region on one main surface. Exposing, exposing a portion of the third semiconductor region on the other main surface, and forming an ohmic-connected electrode to each of the exposed second semiconductor region and third semiconductor region. A character characterized by becoming Method for producing a scan coating semiconductor device. 9. A first conductive type first having a pair of main surfaces.
From one main surface of the semiconductor substrate forming the semiconductor region,
A step of forming a pn junction by diffusing a second semiconductor region of a second conductivity type extending to the first semiconductor region and having a conductivity type opposite to that of the first semiconductor region; A step of forming a third semiconductor region having a high impurity concentration of a conductive type; a step of forming a mesa-shaped groove by forming a mesa-shaped groove so that a pn junction is exposed from a main surface to a predetermined region; A step of sequentially forming a silicon oxide film and a silicon nitride film on a surface, a step of forming a glass film on the mesa portion, and removing the silicon oxide film and the silicon nitride film using the glass film as a mask; Exposing a part of the second semiconductor region, exposing a part of the second semiconductor region on one main surface, and exposing a part of the third semiconductor region on the other main surface; The exposed second semiconductor region and the third semiconductor Method for producing a glass-coated semiconductor device characterized by comprising a step of forming an electrode which is ohmic connected to the respective band. 10. A semiconductor device having a first conductivity type having a pair of main surfaces and a first semiconductor region forming a first semiconductor region, the first semiconductor region extending from one main surface to the first semiconductor region and having a conductivity type opposite to the first semiconductor region. By diffusing the second conductive type second semiconductor region,
A step of forming a junction, a step of forming a third semiconductor region having the same conductivity type as the first semiconductor region and a high impurity concentration from the other main surface, and exposing a pn junction to a predetermined region from the one main surface. Forming a mesa portion by forming a groove in a mesa mold, forming a silicon nitride oxide film on one main surface, forming a glass film on the mesa portion, and using the glass film as a mask to form the mesa portion. Removing the silicon nitride oxide film,
Exposing a part of the second semiconductor region on one main surface, exposing a part of the second semiconductor region on one main surface, and exposing a part of the third semiconductor region on the other main surface And forming an ohmic-connected electrode to each of the exposed second semiconductor region and third semiconductor region. 11. Prior to the step of forming a mesa portion by providing the mesa groove, a high conductivity type of the same conductivity type as the first semiconductor region extending from the one main surface to the first semiconductor region so as to surround the pn junction. A step of selectively forming a fourth semiconductor region having an impurity concentration is added, and a step of forming a mesa portion by providing the mesa groove is performed by using a bonding portion between the first semiconductor region and the second semiconductor region from one main surface. 11. The method according to claim 5, wherein a step of forming a mesa-shaped groove is provided so that a junction between the first semiconductor region and the fourth semiconductor region is exposed.
A manufacturing method of the glass-coated semiconductor device according to the above. 12. The exposed second semiconductor region and the third semiconductor region.
6. The method according to claim 5, wherein the step of forming the ohmic-connected electrodes in each of the semiconductor regions is performed by any one of a vapor deposition method, an electrolytic plating method, and an electroless plating method.
12. The method for manufacturing a glass-coated semiconductor device according to any one of the first to eleventh aspects.