JPH10177044A - Zero cross detection circuit - Google Patents

Abstract

(57) [Problem] To detect a zero cross point where an audio input signal crosses a reference set voltage, a delay occurs. A voltage amplifier for amplifying an input signal, | V
1-V0 |> | V2-V0 | and | V1-V2 | = | V
2-V0 |, a voltage generation circuit 2 that outputs voltages V1 and V2, voltage comparators 2 and 4 that compare the output signal (a) of the amplifier 1 with the voltages V1 and V2, and an output signal (b) of the voltage comparator. An EX-OR circuit 5 for detecting a first period in which the value of (c) is different and outputting a signal (d); charging for a first period based on the signal (d); , A voltage generation circuit 7 that generates a voltage V3 equal to the voltage of the charge / discharge signal (e) when the same period as the first period has elapsed from the end of the first period, and a signal (e). And a voltage V3, and a voltage comparator 8 that outputs a zero-cross detection signal when the signal (e) becomes equal to the voltage V3 after the first period has elapsed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a zero-cross detection circuit, and more particularly to a zero-cross detection circuit which is constituted by CMOS transistors and is suitable for use in an audio device.

[0002]

2. Description of the Related Art In an audio device or the like, a zero-cross detection circuit is used to detect a timing at which a voltage of an input signal crosses a reference voltage. FIG. 5 shows a configuration of a conventional zero-crossing detection circuit, and FIG. 6 shows output signals (g) to (i) of respective elements and a waveform of the zero-crossing detection signal in this circuit.

An audio input signal is input to a voltage amplifier 101 via a capacitor 100, amplified and output as a signal (g), and applied to a Schmitt trigger circuit 102 to generate a waveform-shaped signal (h). The Schmitt trigger circuit 102 receives the reference voltage V0 as shown in FIG.
In the vicinity, a circuit threshold voltage VIH is set as a high potential point, and a circuit threshold voltage VIL is set as a low potential point.

When the voltage of the signal (g) supplied to the Schmitt trigger circuit 102 drops from a voltage higher than the reference voltage V0 toward the reference voltage V0, the reference voltage V
A high level signal (h) is output until the signal becomes lower than the reference voltage V0 by 0, and the signal (g) is higher than the reference voltage V0 by the circuit threshold voltage VIH from the voltage lower than the reference voltage V0. Until the low level signal (h)
Is output.

The signal (h) output from the Schmitt trigger circuit 102 and the signal (i) obtained by delaying the signal (h) by the delay circuit 103 are combined with an EX-OR circuit 104.
Is input to The EX-OR circuit 104 is at the high level for a delay time from when the level of the signal (h) and the level of the signal (i) are different, that is, when the signal (g) becomes lower than the reference voltage V0 by the voltage | Further, it outputs a zero-cross detection signal which becomes high level for the delay time from when the voltage VIH becomes higher than the reference voltage V0.

[0006]

However, in the conventional zero-crossing detection circuit, the output signal (g) from the voltage amplifier 101 reaches the reference voltage V0 (hereinafter referred to as the zero-crossing point), and the circuit threshold voltage is further increased. Unless it becomes lower or higher than VIL or VIH, the zero cross detection signal is not output. Therefore, as shown in FIG. 6, a delay occurs by the time t1 or t2 from the zero cross point at which the signal (g) reaches the reference voltage VO. Although a detection error occurs due to the delay time t1 or t2, there is a problem that the detection accuracy is low because the delay time varies depending on the amplitude voltage or frequency of the audio input signal.

The present invention has been made in view of the above circumstances, and provides a zero cross detection circuit capable of outputting a zero cross detection signal without delay at a zero cross point crossing an audio input signal and a reference set voltage V0. The purpose is to provide.

[0008]

A zero cross detection circuit according to the present invention is provided with a reference voltage and an input signal. The zero cross detection circuit detects whether the input signal crosses the reference voltage. A voltage amplifier that is input, amplifies and outputs, and an absolute value of a difference between a first voltage and the reference voltage is larger than an absolute value of a difference between a second voltage and the reference voltage with respect to the reference voltage; And the first and second voltages having an equal relationship between an absolute value of a difference between the first voltage and the second voltage and an absolute value of a difference between the second voltage and the reference voltage. A first voltage generation circuit that generates the signal, compares the signal output from the voltage amplifier with the first voltage, outputs a first comparison signal, and outputs the signal output from the voltage amplifier and the second signal. , And outputs a second comparison signal. 1 of a voltage comparator, said first, second
And a logic circuit that detects a first period having a different value and outputs a detection signal, and a detection circuit that receives the detection signal and charges for the first period, and then discharges and charges and discharges. A charge / discharge circuit for outputting a signal; and a second circuit for generating a third voltage equal to the voltage of the charge / discharge signal when the same period as the first period has elapsed from the end of the first period.
, The charge / discharge signal and the third voltage are given and compared, and a zero-cross detection signal is output when the charge / discharge signal becomes equal to the third voltage after the first period has elapsed. And a second voltage comparator.

A one-shot pulse generating circuit which receives the zero-cross detection signal and outputs one pulse signal triggered by the zero-cross detection signal may be further provided.

When the signal crosses the reference voltage from a voltage higher than the reference voltage, both the first and second voltages are higher than the reference voltage. The first voltage is higher than the second voltage, and when the signal crosses the reference voltage from a voltage lower than the reference voltage, the first and second voltages are higher than the reference voltage. The first and second voltages are lower than each other, and the first voltage is lower than the second voltage.
The second voltage may be generated.

The first voltage generation circuit includes first, second, and second power supply terminals connected in series from a power supply terminal to a ground terminal.
A third resistor configured to generate the first voltage from a connection node between the first resistor and the second resistor when the signal crosses the reference voltage from a voltage higher than the reference voltage; And generating the second voltage from a connection node between the second resistor and the third resistor. When the signal crosses the reference voltage from a voltage lower than the reference voltage, the first resistor Generating the second voltage from a connection node between the second resistor and the second resistor, generating the first voltage from a connection node between the second resistor and the third resistor, and the logic circuit includes: EX that receives the first and second comparison signals output from the first voltage comparator and outputs the detection signal
An OR circuit, wherein the charge / discharge circuit includes a resistor having both ends connected between an input terminal to which the detection signal is input and an output terminal to output the charge / discharge signal; and the output terminal and the ground terminal. And a capacitor having both ends connected between them.

When a one-shot pulse generation circuit is provided,
A delay circuit that receives the zero-cross detection signal and delays the output for a predetermined time and outputs the zero-cross detection signal to one input terminal; an output of the delay circuit to another input terminal; And an EX-OR circuit that outputs the pulse signal having the pulse width of the predetermined time.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows a configuration of a zero-cross detection circuit according to an embodiment of the present invention. An audio input signal is input to the capacitor 10, input to the voltage amplifier 1 as a signal from which low-frequency components have been removed, amplified, and output as a signal (a). The output signal (a) is input to the non-inverting input terminals of the voltage comparators 3 and 4, respectively.

On the other hand, a constant voltage V
1 and V2 are generated, the voltage V1 is input to the inverting input terminal of the comparator 3, and the voltage V2 is input to the inverting input terminal of the comparator 4.
Is entered. Here, the voltages V1 and V2 are near the reference voltage V0 and higher than the voltage V0, and | V1-V0 |>
| V2-V0 | and | V1-V2 | = | V2-V0 |.

The signal (a) is compared with the voltage V1 in the comparator 3, and the result of the comparison is output as a signal (b) to one input terminal of the EX-OR circuit 5, and the signal (a) is compared with the signal (a) in the comparator 4. The voltage V2 is compared, and the comparison result is output to the other input terminal of the EX-OR circuit 5 as a signal (c). The EX-OR circuit 5 outputs the high-level signal (d) while the voltage of the signal (b) is different from the voltage of the signal (c).
And outputs it to the charge / discharge circuit 6.

Here, the period in which the voltage of the signal (b) is different from the voltage of the signal (c) means that when the output signal (a) from the voltage amplifier 1 drops from a voltage higher than the reference voltage V0,
This is a period during which the signal (a) is at the high level during the period from when the voltage V1 is reached to the voltage V2, and when the signal (a) is
The case where the voltage rises from a voltage lower than 0 is a period in which the voltage rises to the voltage V1 and then rises to the voltage V1 at a high level.

The charge / discharge circuit 6 charges an output terminal for outputting the signal (e) during a period when the signal (d) is at a high level,
Discharge occurs at the timing of falling from the high level to the low level. Here, from | V1−V2 | = | V2−V0 |, a charging period in which the signal (e) changes from the voltage V1 to the voltage V2;
This is equal to the subsequent discharge period. The voltage of the signal (e) at the end of the discharge period is set to V3.

This voltage V3 is generated from the voltage generation circuit 7 and input to the non-inverting input terminal of the comparator 8, and the output signal (e) from the charging / discharging circuit 6 is input to the inverting input terminal of the comparator 8. . The comparator 8 compares the voltage of the signal (e) with the voltage V3, and outputs a signal (f) which becomes a high level when they match. This signal (f) is input to the one-shot pulse generation circuit 9 and output as a zero-cross detection signal.

FIG. 2 shows an example of a more specific configuration of the zero-cross detection circuit according to the first embodiment. In correspondence with FIG. 1, the voltage generation circuit 2 includes resistors 2a, 2b, and 2 connected in series between a power supply voltage Vcc terminal and a ground terminal.
The voltage V1 is output from a connection node between the resistors 2a and 2b, and the voltage V2 is output from a connection node between the resistors 2b and 2c.

The charge / discharge circuit 6 includes a resistor 6a having both ends connected between the output terminal of the EX-OR circuit 5 and the inverting input terminal of the comparator 8, and a charge / discharge circuit 6 connected between the output terminal of the resistor 6a and the ground terminal. Connected to the capacitor 6b. Voltage generation circuit 7
Has resistors 7a and 7b connected in series between a power supply voltage Vcc terminal and a ground terminal, and generates a voltage V3 from a connection node between the resistors 7a and 7b. Pulse generation circuit 9
A delay circuit 9a having an input terminal connected to the output terminal of the comparator 8, one input terminal connected to the output terminal of the comparator 8, and the other input terminal connected to the output terminal of the delay circuit 9a; An EX-OR circuit 9b for outputting a zero-cross detection signal from an output terminal.

Each of the signals (a) to (e) when an audio signal higher than the reference voltage V0 and falling toward the reference voltage V0 is input to the zero-cross detection circuit shown in FIG. FIG. 3 shows a time chart of the signal, and the detection operation at this time will be described. In the output signal (a) of the voltage amplifier 1 shown in FIG. 3A, a period T1 at which the reference voltage V0 crosses zero is shown in FIG.
(B) shows an enlarged view. When the signal (a) gradually decreases and reaches the voltage V1 at time t1, the comparator 3
Output signal (b) changes from high level to low level. Further, the signal (a) changes to the voltage V at time t2.
When it drops to 2, the output signal (c) of the comparator 4 changes from high level to low level. This signal (c) is input to the control terminal of the comparator 8 as described later.

The signals (b) and (c) are input to the EX-OR circuit 5, and the period when the voltages are different, that is, while the signal (a) is from the voltage V1 to the voltage V2 (from the time t1 to the time t2). During this period, the signal (d) which becomes high level is output. When such a signal (d) is input to the charging / discharging circuit 6, charging starts at time t1, and discharging starts at time t2. As a result, the charge / discharge circuit 6 outputs FIG.
A signal (e) as shown in (e) is output. As described above, the time t1 when the signal (a) reaches the voltage V1
The charging time of the signal (e) from time t2 to when the signal (e) reaches the voltage V2 is equal to the discharging time of the signal (e) from time t3 when the signal (a) reaches the voltage V0 from the voltage V2. The voltage of the signal (e) at the time point t3 is equal to the voltage V3 output from the voltage generation circuit 7, and the comparator 8 outputs the signal (f) which rises to a high level at the time point t3.
Is output. Here, the signal (c) is input to the control terminal of the comparator 8. Since the signal (c) falls from the high level to the low level at the time point t2, the comparator 8
Becomes active after time t2. This is because when the comparator 8 is in the operating state during the charging period before the time point t2, the output signal of the comparator 8 when the signal (e) reaches the voltage V3 even though the zero cross point has not been reached, Since f) rises to a high level, the non-operation / operation state of the comparator 8 is switched to prevent this.

When this signal (f) is input, the one-shot pulse generation circuit 9 rises from the low level at time t3 and outputs a pulse-like zero-cross detection signal having a pulse width corresponding to the delay time of the delay circuit 9a. .

As described above, according to the present embodiment, when the audio input signal drops from a voltage higher than the reference voltage V0 and reaches the reference voltage V0, the zero-cross detection that rises at the zero-cross point without delay occurs. A signal can be generated. Furthermore, zero-cross detection without delay is possible without being affected by the voltage or frequency of the audio input signal.

Next, the audio input signal is changed to the reference voltage V0.
An operation of detecting a zero-cross point when the voltage rises from a lower voltage and reaches the reference voltage V0 will be described with reference to FIG. 4 showing a time chart of each signal.

In this case, the voltage generation circuit 2 generates a voltage V2 from a connection node between the resistors 2a and 2b,
A voltage V1 is generated from a connection node between the resistor and the resistor 2c. The voltages V1 and V2 are near the reference voltage V0 and
| V1-V0 |> | V2-V0 | and | V1
-V2 | = | V2-V0 |.

In the output signal (a) of the voltage amplifier 1 shown in FIG. 4A, a period T1 near zero crossing with the reference voltage V0 is shown in an enlarged scale in FIG. 4B. Signal (a)
Gradually rises and reaches the voltage V1 at time t1, the output signal (b) from the comparator 3 changes from low level to high level. Further, when the signal (a) rises to the voltage V2 at the time t2, the output signal (c) of the comparator 4 changes from a low level to a high level.

The signals (b) and (c) are input to the EX-OR circuit 5, and a signal (d) which becomes a high level from time t1 to time t2 is output. When this signal (d) is input to the charging / discharging circuit 6, charging starts at time t1 and discharging starts at time t2. The charge / discharge circuit 6 outputs a signal (e) as shown in FIG. As described above, the charging period and the discharging period are equal,
The voltage of the signal (e) at time t3 is equal to the voltage V3 output from the voltage generation circuit 7. From the comparator 8,
At time t3, a signal (f) rising to a high level is output.

When this signal (f) is input, the comparator 9 outputs a pulse-like zero-cross detection signal rising from a low level at time t3.

As described above, according to the present embodiment, even when the audio input signal rises from a voltage lower than the reference voltage V0 and crosses zero to the voltage V0, the zero cross detection signal is generated without delay. be able to.

The above-described embodiment is merely an example, and does not limit the present invention. The circuit configurations shown in FIGS. 1 and 2 are examples, and various modifications are possible. For example, in this circuit configuration, a one-shot pulse generation circuit 9 is used to generate a pulse-like zero-cross detection signal. However, depending on the application, the zero-crossing detection signal does not need to be pulse-like, and the level may change at the zero-crossing point as in the output signal (f) of the comparator 8, so that the one-shot pulse generation circuit is not necessarily required. Is not necessary. Further, in the present embodiment, the level of the zero-crossing detection signal changes from a low level to a high level, but may be configured to change conversely.

[0033]

As described above, in the zero cross detection circuit of the present invention, the difference between the first voltage and the second voltage and the difference between the second voltage and the reference voltage become equal to each other near the reference voltage. The first and second voltages are set as described above, and when the input signal reaches the first voltage, the charge / discharge circuit starts charging, and the second
Is performed until the reference voltage is reached, and the point at which the input voltage crosses the reference voltage is detected because the lengths of the charging period and the discharging period are equal. It is possible to output a zero-cross detection signal without delay.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a zero-cross detection circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing an example of a circuit configuration that further embodies the zero-cross detection circuit.

FIG. 3 is a time chart showing the waveform of each signal when the audio input signal drops from a voltage higher than a reference voltage and crosses zero in the zero cross detection circuit.

FIG. 4 is a time chart showing waveforms of respective signals when the audio input signal rises from a voltage lower than a reference voltage and crosses zero in the zero cross detection circuit.

FIG. 5 is a circuit diagram showing a configuration of a conventional zero-cross detection circuit.

FIG. 6 is a time chart showing the waveform of each signal when the audio input signal zero-crosses the reference voltage in the zero-cross detection circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Voltage amplifier 2, 7 Voltage generation circuit 2a, 2b, 2c, 6a, 7a, 7b Resistance 3, 4, 8 Voltage comparator 5, 9b EX-OR circuit 6 Charge / discharge circuit 6b, 10 Capacity 9 Pulse generation circuit V0 reference Voltage

Claims (5)

[Claims] 1. A zero-crossing detection circuit that receives a reference voltage and an input signal and detects that the input signal crosses the reference voltage, a voltage amplifier that receives, amplifies, and outputs the input signal; An absolute value of a difference between a first voltage and the reference voltage is larger than an absolute value of a difference between a second voltage and the reference voltage with respect to a reference voltage, and the first voltage and the second voltage A first voltage generating circuit for generating the first and second voltages, wherein the absolute value of the difference between the first voltage and the second voltage is equal to the absolute value of the difference between the second voltage and the reference voltage; Comparing the signal output from the amplifier with the first voltage to output a first comparison signal; comparing the signal output from the voltage amplifier with the second voltage to generate a second comparison signal; A first voltage comparator that outputs the first and second comparison results. A logic circuit receiving a signal and detecting a first period having a different value and outputting a detection signal; and receiving the detection signal, charging the first period and then discharging to output a charge / discharge signal. A second voltage generation circuit that generates a third voltage equal to the voltage of the charge / discharge signal when the same period as the first period has elapsed from the end of the first period; The charge / discharge signal and the third voltage are given and compared, and the charge / discharge signal is changed to the third voltage after the lapse of the first period.
And a second voltage comparator that outputs a zero-crossing detection signal when the voltage becomes equal to the voltage of the zero-crossing detection circuit. 2. The zero-crossing detection circuit according to claim 1, further comprising a one-shot pulse generation circuit receiving said zero-crossing detection signal and outputting one pulse signal triggered by said zero-crossing detection signal. 3. The first voltage generating circuit, when the signal crosses the reference voltage from a voltage higher than the reference voltage, the first and second voltages are both higher than the reference voltage; The first voltage is higher than the second voltage, and when the signal crosses the reference voltage from a voltage lower than the reference voltage, the first and second voltages are higher than the reference voltage. 3. The zero-crossing detection circuit according to claim 1, wherein the first and second voltages are generated such that the first voltage and the second voltage are both lower than the second voltage. 4. The first voltage generation circuit includes a first, a second, and a second voltage generation circuit connected in series from a power supply terminal to a ground terminal.
A third resistor configured to generate the first voltage from a connection node between the first resistor and the second resistor when the signal crosses the reference voltage from a voltage higher than the reference voltage; And generating the second voltage from a connection node between the second resistor and the third resistor. When the signal crosses the reference voltage from a voltage lower than the reference voltage, the first resistor Generating the second voltage from a connection node between the second resistor and the second resistor and generating the first voltage from a connection node between the second resistor and the third resistor; An EX-OR circuit that receives the first and second comparison signals output from a first voltage comparator and outputs the detection signal, wherein the charge / discharge circuit receives an input that receives the detection signal. Both ends between the terminal and the output terminal for outputting the charge / discharge signal Claim and having a resistor connected, and a capacitor whose both ends are connected between the ground terminal and the output terminal 1
4. The zero cross detection circuit according to any one of claims 1 to 3. 5. A one-shot pulse generating circuit, comprising: a delay circuit that receives the zero-cross detection signal and delays the signal for a predetermined time to output the one-shot pulse generation signal;
The zero-crossing detection circuit according to claim 2, further comprising: an EX-OR circuit that receives the output of the delay circuit at the other input terminal and outputs the pulse signal having the pulse width of the predetermined time.