JPH10177433A - Pc card power source stabilization detecting circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a PC card power source stabilization detecting circuit by which the stabilization of a power source to be supplied to two PC cards can be monitored. SOLUTION: When each PC card is inserted into PC card slots 11 and 12, card detection signals acd1, acd2, bcd1, and bcd2 indicate activation. When stabilization detection signals apg and bpg indicate activation, an output signal S14 indicates activation, and this is transmitted to a PC card controller 20. The PC card controller 20 detects that the output signal S14 indicates activation, confirms that the stabilization detection signals (apg) and (bpg) indicate activation, and transmits it to a host computer 30. The host computer 30 performs access to each PC card inserted into the PC card slots 11 and 12. Also, for example, when the PC card is inserted only into the PC card slot 11, it is confirmed that each stabilization detection signal (apg) and (bpg) indicates activation even when the PC card is inserted into the PC card slot 12 afterwards.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a PC card power supply stability detecting circuit for detecting a stable state of power supplied to two PC cards.

[0002]

2. Description of the Related Art A PC card is a PCMCIA (Personal Computer Memory Card), an American PC card standardization organization.
International Association) and Japan Electronic Industry Development Association
(JapanElectronic Industry Development Association
n, hereafter referred to as JEIDA)
This is a general term for peripheral devices of personal computers that conform to the “Standard”. The PC card has a power supply for operation (hereinafter, referred to as Vcc) and a power supply for program (hereinafter, referred to as Vcc).
Vpp). "PC
The "Card Standard" specification states that power is transmitted between the host computer and the PC card using eight of the 68-pin PC card connectors. This 8-pin power interface is composed of two Vcc terminals, two Vpp terminals, and four ground terminals.

When supplying power to a PC card,
The time during which Vcc and Vpp stabilize depends on the PC card power interface switch and the characteristics of the PC card. Therefore, the host computer side
When the power supply to the C card rises, Vc
It is necessary to wait for access to the PC card until c and Vpp are stabilized. As a method of accessing the PC card after the power supply to the PC card becomes stable, the rise time and fall time of the power supply are checked based on the characteristics of the PC card power interface switch, and the rise time and fall time are determined. There is a method of performing actual measurement of time, performing a wait (wait) by an amount obtained by adding a margin to the actual measured value, and then accessing the PC card. In general, 5 V is used for Vcc and 12 V is used for Vpp, so that the time required for stabilizing Vpp is longer than the time required for stabilizing Vcc. Therefore, there is a PC card power supply interface switch having a function of monitoring a stable state of Vpp and informing the PC card controller of the stable state. This PC card power supply interface switch has two power good indicator terminals for detecting and outputting a stable state of Vpp for two slots.
After confirming the stability of the pp, it is sent to a PC card controller which controls the operation of each PC card. Next, this will be described.

FIG. 2 is a configuration diagram showing an example of a conventional PC card power supply stability detection circuit. This PC card power supply stability detection circuit 1 includes two PC card slots 1a and 1b, a power supply interface switch 1c, and a two-input OR circuit 1d.
It has. Vcc and Vpp are supplied to the PC card slots 1a and 1b from a power supply unit (not shown) via a power supply interface switch 1c. The power supply interface switch 1c has a function of detecting a stable state of Vpp supplied to the PC card slots 1a and 1b. These detection results are output from detection result output terminals Apwrgood and Bpwrgood. Detection result output terminal Apwrgoo
d and Bpwrgood are connected to the respective input terminals of the OR circuit 1d. The output terminal of the OR circuit 1d is connected to the detection result input terminal Vpp-Valid of the PC card controller 2. The control signal input terminal group cont of the power supply interface switch 1c is connected to the control signal output terminal group cont of the PC card controller 2. Further, the PC card controller 2 is connected to the host computer 3.

In this PC card power supply stability detection circuit 1,
A PC card is inserted into, for example, the PC card slot 1a of the PC card slots 1a and 1b. Thereafter, when the Vpp supplied to the PC card slot 1a is stabilized, this stabilization is detected by the power supply interface switch 1c, and the detection result is output as a high level (hereinafter referred to as "H") signal. Output from terminal Apwrgood. This detection result is sent to the PC card controller 2 via the OR circuit 1d. After confirming the stability of Vpp based on the detection result, the PC card controller 2 controls the operation of the PC card inserted into the PC card slot 1a.

[0006]

However, the PC card power supply stability detecting circuit 1 shown in FIG. 2 has the following problems. That is, in the method based on the actual measurement of the rise and fall times of the power supply potential by the power supply interface switch 1c, it is necessary to carry out the actual measurement work and study the variation of the element characteristics and the value of the margin. Depending on the value of this margin, the PC card controller 2
May spend extra time before starting access. In the PC card power supply stability detection circuit 1, Vp
The stability at the rise when supplying p is determined by the detection signal input terminal Vpp-Valid input signal S1d of the PC card controller 2.
There is a limit to judge in the state of. That is, even when the PC card is inserted only into the PC card slot 1a and the PC card is not inserted into the PC card slot 1b, the input signal S1d is valid. Therefore, even if a PC card is later inserted into the PC card slot 1b, the input signal S1d remains valid.
It cannot be determined whether Vpp of 1b has stabilized. That is, there is a limitation that the stability of Vpp supplied to the PC card can be monitored based on the state of the input signal S1d only when the PC card is inserted into one PC card slot.

[0007]

In order to solve the above-mentioned problems, the present invention provides two operating power supplies respectively supplied to two PC cards and two operating power supplies having higher potentials than the respective operating power supplies.
Detecting the stable state of each of the program power supplies of the two program power supplies, and transmitting the detection result to a PC card controller which controls the operation of each of the PC cards after confirming the stability of each of the program power supplies. The PC card power supply stability detection circuit includes the following means. That is, two PC card slots having a function of outputting a card detection signal indicating activation when the PC card is normally inserted, and a power supply indicating activation of each stability detection signal when each of the program power supplies is stabilized. When all the card detection signals output from the monitoring means and each of the PC card slots indicate activation, the logical product of the stability detection signals is used as the detection result, and one of the card detection signals is inactive. Is indicated, the logical product of the other card detection signal and the stability detection signal corresponding to the other card detection signal is used as the detection result, and when all of the card detection signals indicate inactive, A logic circuit for sending a logical sum of a card detection signal to the PC card controller as the detection result.

According to the present invention, since the PC card power supply stability detecting circuit is configured as described above, the PC card is properly inserted into each of the two PC card slots, and the Vpp supplied to each PC card is adjusted. When all have become stable, a detection result indicating this stability is sent from the logic circuit to the PC card controller. If a PC card is not properly inserted into one of the PC card slots,
V supplied to the other normally inserted PC card
pp stability detection signal from the logic circuit as a detection result to PC
Sent to the card controller. If a PC card is not properly inserted into all PC card slots, V
A detection result indicating that pp is not stable is sent from the logic circuit to the PC card controller. Therefore, the above problem can be solved.

[0009]

FIG. 1 is a block diagram showing an example of a PC card power supply stability detecting circuit according to an embodiment of the present invention. This PC card power supply stability detection circuit 10 includes two PCs.
It has card slots 11 and 12, a power supply interface switch 13 as power supply monitoring means, and a logic circuit 14. Vcc is supplied from a power supply unit (not shown) to the PC card slots 11 and 12 through a power supply interface switch 13.
And Vpp. Power supply interface switch 13 is connected to PC card slots 11 and 12
Has a function of detecting a stable state of Vpp supplied to the power supply. Then, these detection results (that is,
Stability detection signals) apg and bpg are detection result output terminals Apwrgoo
Output from d, Bpwrgood. The detection result output terminals Apwrgood and Bpwrgood are connected to the detection result input terminals Apwrgood and Bpwrgood of the logic circuit 14, respectively. The card detection signal output terminals ACD1 and ACD2 of the PC card slot 11 are connected to the card detection signal input terminals ACD1 and ACD2 of the logic circuit 14, respectively. Similarly, PC
Card detection signal output terminals BCD1, BCD2 of card slot 12
Are connected to the card detection signal input terminals BCD1 and BCD2 of the logic circuit 14, respectively. Output terminal Vpp-Va of logic circuit 14
lid is the detection result input terminal of PC card controller 20
Connected to Vpp-Valid. Power supply interface
The control signal input terminal group cont of the switch 13 is connected to the control signal output terminal group cont of the PC card controller 20. This PC card controller 20 has one detection result input terminal Vpp-Valid, and has a “PC Card Standard” ver.
It is based on 4.1 and above. Further, the PC card controller 20 is connected to the host computer 30.

FIG. 3 is a circuit diagram showing an example of the logic circuit 14 in FIG. This logic circuit 14 is a two-input NOR circuit 14
a, 14b, two-input AND circuits 14c, 14d, 14e, 14f, a two-input OR circuit 14g, and a two-input, one-output selector 14d. Card detection signal input terminals ACD1 and ACD2 are NO
It is connected to each input terminal of the R circuit 14a. The card detection signal input terminals BCD1 and BCD2 are connected to the respective input terminals of the NOR circuit 14b. NOR circuit 14a
Is connected to a first input terminal of the AND circuit 14d and to a first input terminal of the AND circuit 14e. The output terminal of the NOR circuit 14b is an AND circuit.
14d is connected to a second input terminal and an AND circuit
14f is connected to the first input terminal. The detection result input terminal Apwrgood is connected to the first input terminal of the AND circuit 14c and to the second input terminal of the AND circuit 14e. The detection result input terminal Bpwrgood is connected to the second input terminal of the AND circuit 14c and to the second input terminal of the AND circuit 14f. AND circuit 1
The output terminal of 4d is connected to the selection signal input terminal of the selector 14h. The output terminal of the AND circuit 14e is connected to the first input terminal of the OR circuit 14g. AND circuit
The output terminal of 14f is connected to the second input terminal of the OR circuit 14g. The output terminal of the OR circuit 14g is connected to the selector 14
h is connected to the first input terminal (0). The output terminal of the AND circuit 14c is connected to the second input terminal (1) of the selector 14h. The output terminal of the selector 14h is
Connected to output terminal Vpp-Valid. This selector 14
h is the selection signal (ie, the output signal S14 of the AND circuit 14d).
When d) is at a low level (hereinafter, referred to as "0"), the first input terminal is connected to the output terminal. When the selection signal is at a high level (hereinafter, referred to as "1"), the second input terminal is connected to the first input terminal. It has a function of connecting to the output terminal.

FIG. 4 is a diagram for explaining the operation of FIG. The operations (1) to (4) of FIG. 1 will be described with reference to FIG. (1) When the PC card is not inserted or is not securely inserted into both the PC card slots 11 and 12, the card detection signals acd1 and acd2 of the PC card slot 11 are inactive (that is,
"1") or indefinite (that is, either "1" or "0" and indicated by "x"). Similarly, the card detection signals bcd1 and bcd2 of the PC card slot 12 become inactive (that is, “1”) or indefinite (that is, “x”). At this time, the logical level on the output side of the NOR circuit 14a becomes "0", the output signal S14d of the AND circuit 14d becomes "0", and the logical level on the output side of the AND circuit 14e becomes "0". Similarly, the logic level on the output side of the NOR circuit 14b becomes "0", and the logic level on the output side of the AND circuit 14f becomes "0". Therefore, the logic level on the output side of the OR circuit 14g becomes "0". The logic level on the output side of the OR circuit 14g is output via a selector 14h. Therefore, the output signal S14 of the logic circuit 14 is inactive (ie,
"0"), and no access is made to each PC card. (2) When a PC card is inserted only into the PC card slot 11, the card detection signal ac
d1, acd2 indicates activity (that is, “0”). Further, the card detection signals bcd1 and bcd2 are inactive (ie, “1”) or indefinite (ie, “x”). At this time, since the logic level on the output side of the NOR circuit 14a is "1", if the stability detection signal apg indicates active (ie, "1"), the AND circuit
The logic level on the output side of 14e becomes "1". for that reason,
The logic level on the output side of the OR circuit 14g becomes "1".
The logic level on the output side of the OR circuit 14g is determined by the selector 14g.
output via h. Therefore, the output signal S1 of the logic circuit 14
4 indicates active (ie, “1”) and is sent to the PC card controller 20. PC card controller 20
Detects that the output signal S14 is active and confirms that the stability detection signal apg is active (ie, "1"), and then transmits it to the host computer 30. The host computer 30 accesses the PC card inserted in the PC card slot 11.

(3) PC only in PC card slot 12
When a card is inserted, the card detection signals bcd1 and bcd2 of the PC card slot 12 indicate active (ie, “0”).
Also, the card detection signals acd1 and acd2 are inactive (that is,
"1") or indefinite (ie, "x"). At this time, N
Since the logic level on the output side of the OR circuit 14b is "1", when the stability detection signal bpg indicates active (that is, "1"), the logic level on the output side of the AND circuit 14f becomes "1". Become. Therefore, the logic level on the output side of the OR circuit 14g becomes "1". The logic level on the output side of the OR circuit 14g is output via a selector 14h. Therefore, the output signal S14 of the logic circuit 14 indicates active (ie, “1”),
It is sent to the PC card controller 20. The PC card controller 20 detects that the output signal S14 is active, so that the stability detection signal bpg is activated (ie,
After confirming that “1”) is indicated, the host computer 30 is notified. The host computer 30 accesses the PC card inserted in the PC card slot 12.

(4) PC card slots 11 and 12
When each card is inserted, the card detection signal acd
1, acd2, bcd1, bcd2 all show activity (ie, "0"). At this time, since the logic levels on the output sides of the NOR circuits 14a and 14b are both "1", the output signal S14d of the AND circuit 14d becomes "1". In this state, the stability detection signal apg,
When bpg indicates active, the logic level on the output side of the AND circuit 14c becomes "1". The logic level on the output side of the AND circuit 14c is output via a selector 14h. Therefore, the output signal S14 of the logic circuit 14 is active (that is, "1").
Is transmitted to the PC card controller 20. P
The C card controller 20 detects that the output signal S14 is active, thereby confirming that the stability detection signals apg and bpg are active.
Tell The host computer 30 accesses each PC card inserted into the PC card slots 11 and 12.

As described above, in the present embodiment, when the PC cards are inserted into the PC card slots 11 and 12, respectively, the stability detection signals apg and bpg are respectively detected by detecting that the output signal S14 is active. Since the activation can be confirmed, there is no need to consider the margin value by actually measuring the rise time of Vpp before accessing each PC card. Therefore, the rising status of each Vpp in the PC card slots 11 and 12 can be confirmed on the host computer 30 side.
Access processing time for 1,12 can be reduced. Furthermore,
For example, when a PC card is inserted only into the PC card slot 11, even if a PC card is inserted into the PC card slot 12 later, it can be confirmed that the stability detection signals apg and bpg show the respective activities. It is possible to determine whether Vpp supplied to the inserted PC card is stable. still,
The configuration of the logic circuit in FIG. 3 may be another configuration as long as it has a similar function.

[0015]

As described in detail above, according to the present invention, when all the PC cards are inserted into the two PC card slots, each of the logic circuits is detected by detecting that the output signal of the logic circuit is active. Since each stability detection signal of the program power supply can be confirmed to be active, there is no need to measure the rise time of Vpp before accessing each PC card and to consider a margin value. Therefore, the rise state of each Vpp in each PC card slot can be confirmed on the host computer side, so that the access processing time for each PC card can be reduced. Furthermore, if a PC card is inserted in only one of the PC card slots, even if a PC card is later inserted in the other PC card slot, it is possible to confirm that the stability detection signals indicate the respective activities. It is possible to determine whether or not Vpp supplied to the selected PC card is stable.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a PC card power supply stability detection circuit showing an embodiment of the present invention.

FIG. 2 is a configuration diagram of a conventional PC card power supply stability detection circuit.

FIG. 3 is a circuit diagram of a logic circuit in FIG. 1;

FIG. 4 is an operation explanatory diagram of FIG. 1;

[Explanation of symbols]

Reference Signs List 10 PC card power supply stability detection circuit 11, 12 PC card slot 13 Power supply interface switch (power supply monitoring means) 14 Logic circuit 20 PC card controller acd1, acd2, bcd1, bcd2 Card detection signal apg, bpg Stability detection signal S14 Detection result

Claims (1)

[Claims] 1. Two operating power supplies respectively supplied to two PC cards and two operating power supplies having higher potentials than the respective operating power supplies.
Detecting the stable state of each of the program power supplies of the two program power supplies, and transmitting the detection result to a PC card controller which controls the operation of each of the PC cards after confirming the stability of each of the program power supplies. A PC card power supply stability detection circuit, comprising: two PC card slots having a function of outputting a card detection signal indicating activation when the PC card is normally inserted; and detecting each stability when the program power supply is stabilized. A power supply monitoring means for indicating the activation of each of the signals, and when all the card detection signals output from the respective PC card slots indicate an activation, the logical product of the respective stability detection signals is used as the detection result, and the respective card detection signals When one of them indicates inactive, the other card detection signal and a stable detection signal corresponding to the other card detection signal A logic circuit for taking a logical product as the detection result, and when all the card detection signals indicate inactive, sending a logical sum of the card detection signals to the PC card controller as the detection result. PC card power supply stability detection circuit characterized by the above-mentioned.