JPH10200399A - Phase synchronizer - Google Patents

Abstract

(57) Abstract: An object of the present invention is to reduce the noise of a phase synchronizer when positive and negative symmetric waveform noises are superimposed on an input signal. A phase synchronizer includes a phase comparator, a lube filter, and a voltage controlled oscillator (VCO).
a, a moving average filter 2c, and a first-order lag filter 2b.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase synchronizer used for a power converter or the like.

[0002]

2. Description of the Related Art FIG. 29 shows a configuration diagram of a conventional phase synchronizer. In FIG. 29, 1 is a phase comparator, 2 is a loop filter, 3 is a voltage controlled oscillator (VCO), 4 is a ROM,
5 is a counter. The phase comparator 1 receives the three-phase input signals Va, Vb, and Vc and the feedback signals Vaf, Vbf, and Vcf from the VCO 3 output from the ROM, and calculates the sum of the products of the two signals to obtain a feedback signal. Is obtained. The loop filter 2 is a filter for reducing noise such as harmonics superimposed on the phase difference, and includes a proportional-integral filter 2a and a first-order lag filter 2b. The VCO 3 converts the output of the loop filter 2 into a frequency. The counter 5 integrates the output of the VCO 3 and divides the frequency. The ROM 4 converts the output of the VCO 3 into a three-phase AC voltage waveform, and its output frequency changes according to the output of the VCO 3.
Vbf and Vcf.

Next, the operation of the conventional apparatus will be described. If the phase of the input signal changes, the input signal and the feedback signal have a phase difference. If the input signal is sin (ωt + φ1) and the feedback signal is sin (ωt + φ2), the phase comparator 1
Output is sin (φ1−φ2), whereby V
The output frequency of CO3 changes, and the advance speed of the counter 5 changes. Since the output frequency of VCO3 changes, RO
The output of M4 also changes, and at the point where it matches the input phase, the phase difference between the input signal and the feedback signal becomes zero.

In the phase synchronizer according to the prior art, when the three-phase voltages, which are input signals, are not balanced, for example, when the three phases are not balanced due to a one-wire short circuit, the phase difference of the phase comparator 1 is reduced. Various harmonics are superimposed on the output. Also, various high-order harmonics may be superimposed on the input signal itself, and in this case also, the harmonics are superimposed on the output of the phase comparator 1.

[0005] Such high-order harmonic noise cannot be completely removed by the conventional loop filter 2. The first-order lag filter 2b only has the effect of reducing the noise amplitude of the harmonic, and in order to increase the effect, 1
It is necessary to increase the time constant of the second delay filter 2b, but in this case, there is a disadvantage that the response of the phase synchronizer becomes slow. If the output of the phase comparator 1 receives harmonic noise, the output of the VCO 3 will be modulated by harmonics, making it impossible to perform correct phase control.

[0006]

In the prior art, as described above, high-order harmonic noise cannot be completely removed by the conventional first-order lag filter 2b. For this reason, there has been a problem that a gate pulse cannot be output with an accurate phase.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems. Even if harmonics and noise are superimposed on the VCO input, these harmonics and noise are removed and the gate is gated with an accurate phase. An object is to obtain a device that outputs a pulse.

[0008]

A phase synchronizer according to the present invention receives a three-phase AC voltage, compares the three-phase input voltage with the three-phase output, and outputs a phase deviation signal. , A loop filter including a proportional-integral filter, a moving average filter, and a first-order lag filter to which the phase deviation output is input, and a voltage controlled by an output of the loop filter to supply a phase-locked output to the phase comparator It has a control oscillator (hereinafter referred to as VCO).

A phase comparator for inputting a three-phase AC voltage, comparing the three-phase input voltage with the three-phase phase-locked output, and outputting a phase deviation signal; A loop filter comprising a filter and a moving average filter, and a VCO controlled by an output of the loop filter and supplying a phase-locked output to the phase comparator.

A phase comparator for inputting a three-phase AC voltage and comparing the three-phase input voltage with the three-phase synchronous output to output a phase deviation signal; A loop filter including a filter, a moving average filter, and a first-order lag filter, a phase storage device (hereinafter referred to as MEMP) for storing an output of the loop filter, an accident detection device for detecting an accident on the input side of the phase comparator, A VCO controlled by an output of the loop filter or the MEMP and supplying a phase locked output to the phase comparator;
And a switching means for switching the output of the loop filter at all times and the output of the MEMP at the time of occurrence of an accident by the accident detection output of the accident detection device and adding it to the VCO.

A phase comparator for inputting a three-phase AC voltage and comparing the three-phase input voltage with the three-phase synchronous output to output a phase deviation signal; Loop filter comprising a filter and a moving average filter, and a MEM for storing an output of the loop filter
P, a fault detection device for detecting a fault on the input side of the phase comparator, a VC controlled by an output of the loop filter or the MEMP, and supplying a phase-locked output to the phase comparator
O, and switching means for switching the output of the loop filter at all times and the output of the MEMP at the time of occurrence of an accident by the accident detection output of the accident detection device and adding the output to the VCO.

A phase comparator for inputting a three-phase AC voltage and comparing the three-phase input voltage with the three-phase synchronous output to output a phase deviation signal; A loop filter composed of a filter, a moving average filter, and two first-order lag filters having different time constants, an accident detection device for detecting an accident on the input side of the phase comparator, and controlled by an output of the loop filter or the MEMP; A VCO that supplies a phase locked output to a phase comparator,
A switching means for switching the output of the first-order lag filter having a small time constant at all times and the output of the first-order lag filter having a large time constant at the time of an accident by the accident detection output of the accident detection device and adding the output to the VCO. It is provided.

Further, in the above configuration, when the accident detecting device detects the recovery from the accident, the switching means is returned to the loop filter side.

Further, when the fault detecting device detects recovery from the fault, the switching means is returned to the first-order lag filter having a small time constant.

Further, the switching means is returned to the loop filter after a predetermined time after the accident detecting device detects the recovery from the accident.

Further, after the accident detecting device detects the recovery from the accident, the switching means is returned to the first-order lag filter having a small time constant after a predetermined time.

A phase comparator for inputting a three-phase AC voltage and comparing the three-phase input voltage with the three-phase synchronous output to output a phase deviation signal; A loop filter including a filter, a moving average filter, and a first-order lag filter; a MEMP that stores an output of the loop filter; a fault detection device that detects a fault on the input side of the phase comparator; A harmonic amount calculating device for calculating and calculating a harmonic amount, a VCO controlled by an output of the loop filter or the MEMP to supply a phase-locked output to the phase comparator, and an output of the loop filter which is always in an accident. Sometimes M above
Switching means for switching the output of the EMP according to the fault detection output of the fault detection device and adding the output to the VCO, the fault detection device detecting recovery from the fault, and the output of the harmonic amount calculating device falling below a predetermined value. When this happens, the switching means is returned to the loop filter side.

A phase comparator for inputting a three-phase AC voltage and comparing the three-phase input voltage with the three-phase phase-locked output to output a phase deviation signal; Loop filter comprising a filter and a moving average filter, and a MEM for storing an output of the loop filter
P, an accident detecting device for detecting an accident on the input side of the phase comparator, a harmonic amount calculating device for calculating and calculating a harmonic amount in an input voltage of the phase comparator, the loop filter or M
A VCO that is controlled by the output of the EMP and supplies a phase-locked output to the phase comparator, and always switches the output of the loop filter and the output of the MEMP in the event of an accident by the accident detection output of the accident detection device. V above
Switching means added to the CO, wherein the fault detecting device detects the recovery of the fault and returns the switching means to the loop filter side when the output of the harmonic amount calculating device becomes a predetermined value or less. It is.

A phase comparator for inputting a three-phase AC voltage and comparing the three-phase input voltage with the three-phase phase-locked output to output a phase deviation signal; A loop filter including a filter, a moving average filter, and two first-order lag filters having different time constants, an accident detection device for detecting an accident on the input side of the phase comparator, and a harmonic amount in an input voltage of the phase comparator Calculation device, the above-mentioned loop filter or MEMP
VCO that supplies a phase-locked output to the phase comparator and the output of the first-order lag filter having a small time constant, and the output of the first-order lag filter having a large time constant when an accident occurs. A switching means for switching to the VCO by an accident detection output of the accident detection device, wherein the accident detection device detects the recovery of the accident and the output of the harmonic amount calculating device becomes equal to or less than a predetermined value. The switching means is returned to the first-order lag filter having the small time constant.

Further, after the accident detecting device detects the recovery from the accident, the switching means is returned to the loop filter side after a predetermined time, and at the same time, the gain of the loop filter is lowered, and after a predetermined time, the gain is returned to the original value. It was done.

Further, after the accident detecting device detects the recovery from the accident, the switching means is returned to the loop filter side after a predetermined time, and at the same time, the gain of the loop filter is lowered, and the output of the harmonic operation device becomes equal to or less than a predetermined value. When the gain is returned to the original value.

When the fault detecting device detects the recovery from the fault, the switching means is returned to the first-order lag filter having a small time constant, and at the same time, the gain of the loop filter is lowered, and after a predetermined time, the gain is returned to the original value. It is like that.

When the fault detecting device detects the recovery from the fault, the switching means is returned to the side of the first-order lag filter having a small time constant, and at the same time, the gain of the loop filter is lowered, and the output of the harmonic calculating device becomes equal to or less than a predetermined value. When it becomes, the gain is returned to the original value.

[0024]

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiment 1 FIG. Embodiment 1 of the present invention will be described below with reference to FIG. In FIG. 1, reference numeral 2 denotes a loop filter, which includes a proportional-integral filter 2a, a moving average filter 2c, and a first-order lag filter 2b. Note that the function of the first-order lag filter is generally K / (1 + T ·
S) is represented by Here, K is a gain and T is a time constant. That is, a moving average filter 2c is provided between a proportional-integral filter 2a and a first-order lag filter 2b of a conventional filter. The other points are the same as those in FIG.

Next, the operation will be described. Generally, as described above, the three-phase voltages Va, Vb, and Vc that are input signals
Loop filter 2
In many cases, various high-order harmonic noises are superimposed on the output of the proportional integration filter 2a. This harmonic noise can be removed as shown in FIG. 2B by digitally moving-averaging one cycle as shown in FIG. 2A. In the present invention, the provision of the moving average filter 2c eliminates harmonic noise. The moving average filter 2c can be easily realized by a microprocessor (hereinafter referred to as μP), and its program is shown in FIG. First-order lag filter 2 after moving average
b is a filter for adjusting the response speed and the gain, and for removing noise that could not be removed by the moving average. This first-order lag filter 2b can also be easily realized with μP. Software (hereinafter, referred to as S / W) for implementing the first-order lag filter 2b may be a conventional software. FIG. 3A is a memory configuration of the moving average filter 2c, and FIG. 3B is a flowchart of the moving average. By configuring the loop filter as described above, it is possible to remove a harmonic noise and obtain a phase synchronizer whose response speed can be adjusted. Embodiment 1
In, even when harmonics are superimposed on the input voltage by the moving average filter, noise can be effectively cut and the response speed can be made variable.

Embodiment 2 FIG. Hereinafter, a second embodiment of the present invention will be described with reference to FIG. In FIG. 4, reference numeral 2 denotes a loop filter, which includes a proportional-integral filter 2a and a moving average filter 2c. Other configurations are the same as those in FIG.

Next, the operation will be described. Generally, as described above, the three-phase voltages Va, Vb, and Vc that are input signals
Are unbalanced or when an accident is recovered, various high-order harmonic noises are often superimposed on the output of the proportional-integral filter 2a of the loop filter 2. This harmonic noise can be removed as shown in FIG. 2 by digitally moving-averaging one cycle. This moving average filter 2c can be easily realized by μP, and its program is shown in FIG. The present embodiment is effective when there is no need to adjust the response speed or the gain. The program is simpler than in the first embodiment, and the calculation time for μP can be reduced. In the second embodiment, noise can be effectively cut even when harmonics are superimposed on the input voltage by the moving average filter. When it is not necessary to make the response speed variable as in the first embodiment, the program is simplified and the calculation time can be reduced.

Embodiment 3 Hereinafter, a third embodiment of the present invention will be described with reference to FIG. In FIG. 5, 6 is a phase storage device (MEMP), 7 is a voltage effective value detection device, 8 is an accident detection device, 9 is a changeover switch, and the other configuration is the same as that of FIG. The changeover switch 9 normally connects the VCO 3 to the loop filter 2 side. The MEMP 6 always stores the phase for one cycle. The accident detecting device 8 monitors the output of the voltage effective value detecting device 7, and when the input signal voltage (V1) falls below a certain value (K2), determines that an accident has occurred and outputs an output. ME
Switching to the MP6 side, the phase one cycle before stored in the MEMP6 is added to the VCO3.

During an accident, the phase output oscillates due to the influence of harmonics or the like.
By locking the input of O3 to the phase one cycle before, it is possible to output a stable phase even during an accident. This method can be easily realized by using μP. FIG. 6 shows a program of this method. In the third embodiment, when the response speed is variable, it is possible to save the phase before the accident when the accident occurs, and to operate stably during the accident by outputting the saved phase during the accident.

Embodiment 4 Hereinafter, a fourth embodiment of the present invention will be described with reference to FIG. This embodiment corresponds to 1 in FIG.
This is a case where there is no next delay filter 2b, and the other is the same as the third embodiment. Compared with the third embodiment, the program is easier and the calculation time is shorter. In the fourth embodiment, when the response speed does not need to be variable, the operation is stabilized by outputting the pre-accident phase stored during the accident.

Embodiment 5 Hereinafter, a fifth embodiment of the present invention will be described with reference to FIG. In FIG. 8, reference numeral 2b1 denotes a first-order lag filter having a small time constant, and 2b2 denotes a first-order lag filter having a large time constant. These are connected in parallel, and their output terminals are connected to the contacts of the changeover switch 9. . The changeover switch 9 is a switch for switching the magnitude of the time constant of the first-order lag filter. Usually, a (T1) first-order lag filter 2b1 having a small time constant is selected, and the output thereof is applied to the VCO 3.

When the accident detecting device 8 outputs an output for judging an accident, the switch 9 is switched from the first-order lag filter 2b1 having a small time constant to the (T2) first-order lag filter 2b2 having a large time constant. As a result, the time constant of the first-order lag system increases, and even if the phase or frequency of the actual system changes immediately after the accident, it operates almost in the phase before the accident without apparent change. 4 has almost the same effect as the phase memory in FIG. According to this method, it is not necessary to store the phase, so that the memory is saved and the algorithm is simplified. In Embodiment 5, 1
By switching the time constant of the next lag filter to the larger one, it is possible to maintain the phase before the accident. According to this method, it is possible to follow the phase of the input signal to some extent by selecting a time constant without using a memory.

Embodiment 6 FIG. Embodiment 3 (FIG. 5)
In the above, during the accident, the phase one cycle before is output, but in the sixth embodiment, the accident is recovered and the input voltage becomes equal to or higher than the fixed value (K1), and the accident detection output of the accident detection device 8 becomes When it has run out, the changeover switch 9 is returned to the original state, and the output of the loop filter 2 is returned to the normal operation output. According to this method, after an accident, the phase can be synchronized with the input voltage by a simple algorithm as in the case before the accident. This control can be realized by μP, and the control program is shown in FIG. In the sixth embodiment, when the input voltage exceeds a certain value after recovery from the fault and the input value to the phase synchronizer becomes a certain value or more, a normal operation is performed from the phase output before the fault output during the fault. Switch to output. By the above method, it is possible to synchronize with the input voltage after recovery from the fault.

Embodiment 7 Embodiment 4 (FIG. 7)
In the above, during the accident, the phase one cycle before is output, but in the seventh embodiment, the accident is recovered and the input voltage becomes equal to or higher than the constant value (K1), and the accident detection output of the accident detection device 8 becomes When it has run out, the changeover switch 9 is returned to the original state, and the output of the loop filter 2 is returned to the normal operation output. According to this method, the program is simple, and after the accident, the phase can be synchronized with the input voltage by a simple algorithm as in the case before the accident. This control can be realized by μP, and the control program is shown in FIG. In Embodiment 7, after the accident recovery,
When the input voltage exceeds a certain value and the input value to the phase synchronizer becomes a certain value or more, the phase output before the accident, which was output during the accident, is switched to the normal operation output. By the above method, it is possible to synchronize with the input voltage after recovery from the fault. In this embodiment, the program is simpler than in the sixth embodiment.

Embodiment 8 FIG. Embodiment 5 (FIG. 8)
In the above, the time constant of the first-order lag filter was increased during the accident, but in the eighth embodiment, the accident is recovered and the input voltage becomes equal to or higher than the constant value (K1), and the accident detection output of the accident detection device 8 When there is no more, the changeover switch 9 is returned to the original state, and the output of the first-order lag filter 2b1 having a small time constant is added to the VCO 3. This method enables a method that requires a small memory capacity. This method can also be realized by μP, and the program is shown in FIG. In the eighth embodiment, the time constant of the filter, which was increased when the input voltage exceeded a certain value at the time of recovery from the accident, is returned to the original value. Thus, after the accident recovery, it is possible to return to the quick response before the accident recovery.

Embodiment 9 Embodiment 6 (FIG. 9)
In the above, when the fault is recovered and the input voltage becomes equal to or higher than a certain value, and the fault detection output of the fault detection device 8 disappears, the changeover switch 9 is returned to the original state and the output of the loop filter is applied to the VCO 3. However, at the time of accident recovery, there are many harmonics in the system. If the output is returned to the normal operation output at the time when there are many harmonics, the phase output is modulated by the harmonics, so that the phase of the gate pulse is modulated. In the ninth embodiment, utilizing the fact that the amount of harmonics decreases with the time of accident recovery, the input voltage exceeds a certain value (K1) at the time of accident recovery, and the output of the accident detection device 8 disappears. By returning the changeover switch 9 to the original state after a certain time t1 from the time point, the influence of harmonics is reduced. This algorithm can also be realized by using μP. This program is shown in FIG. In the ninth embodiment, by utilizing the fact that the amount of harmonics decreases with time, the input voltage is restored to a certain value, and after a lapse of a certain period of time, the output is returned to a normal operation output. Less susceptible to waves.

Embodiment 10 FIG. Embodiment 7 (FIG. 1)
In (0), when the fault is recovered and the input voltage becomes equal to or higher than a certain value, and the fault detection output of the fault detection device 8 disappears, the changeover switch 9 is returned to the original state and the output of the loop filter is applied to the VCO 3. However, at the time of accident recovery, there are many harmonics in the system. If the output is returned to the normal operation output at the time when there are many harmonics, the phase output is modulated by the harmonics, so that the phase of the gate pulse is modulated. In the ninth embodiment, utilizing the fact that the amount of harmonics decreases with the time of accident recovery, the input voltage exceeds a certain value (K1) at the time of accident recovery, and the output of the accident detection device 8 disappears. By returning the changeover switch 9 to the moving average filter 2c side after a certain time t1 from the time point, the influence of harmonics is reduced. This algorithm can also be realized by using μP. This program is shown in FIG. In the tenth embodiment, utilizing the fact that the amount of harmonics decreases with time, the input voltage is restored to a certain value, and after a lapse of a certain period of time, the output is returned to a normal operation output. Less susceptible to waves. This method has a simpler program than the ninth embodiment.

Embodiment 11 FIG. Embodiment 8 (FIG. 1)
In 1), when the fault is recovered and the input voltage becomes equal to or higher than a certain value, and the fault detection output of the fault detecting device 8 disappears, the changeover switch 9 is returned to the original time and the time constant is returned to a small time constant. At the time of accident recovery, the AC system has many harmonics. At this point, when the filter is returned to a filter with a small time constant, the phase output is modulated by harmonics, so that the phase of the gate pulse is modulated. In the eleventh embodiment, the fact that the input voltage exceeds a certain value (K1) and the output of the accident detecting device 8 stops when the accident is recovered, utilizing the fact that the harmonic quantity decreases with the time of the accident recovery. After a certain period of time t1, the changeover switch 9 is set to a first-order lag filter 2b having a small time constant.
By switching to the first side, the influence of harmonics is reduced. This algorithm can also be realized by using μP. This program is shown in FIG. In the eleventh embodiment, the time constant of the filter is returned to the original time constant after a lapse of a certain time after the input voltage recovers to a certain value by utilizing the fact that the amount of harmonics decreases with time. So that it is less susceptible to harmonics.

Embodiment 12 FIG. Embodiment 9 (FIG. 1)
In 2), the normal operation output was returned after a certain period of time from the recovery of the input voltage by utilizing the fact that the harmonics attenuated after a certain period of time after the recovery from the accident. In this case, it is more reliable to return to the normal operation output when the harmonic amount becomes equal to or less than the predetermined value.

FIG. 15 is a block diagram showing the twelfth embodiment. Reference numeral 10 denotes a higher harmonics calculating device, which controls the changeover switch 9 with this output. Other configurations are the same as those in FIG. That is, in the ninth embodiment, it is necessary to determine the elapsed time t1 by predicting the attenuation of the harmonic, but in the present embodiment, the attenuation of the harmonic is obtained by the harmonic operation device 10. Thus, the changeover switch 9 is controlled. Therefore, the accident detection device 8 detects the recovery from the accident and the harmonic amount calculation device 10
The changeover switch 9 is returned to the first-order lag filter 2b side when the amount of harmonics due to is reduced to a constant value (K3), so that more reliable control can be performed. CP of this embodiment
FIG. 16 shows the S / W implemented in U. In the twelfth embodiment, the amount of harmonics is actually monitored, and when the amount of harmonics falls below a certain value, the operation is returned from the mode for outputting the phase before the accident to the normal operation output. More reliable control is possible.

Embodiment 13 FIG. In the tenth embodiment (FIG. 13), the normal arithmetic output is returned after a certain period of time from the recovery of the input voltage by utilizing the fact that the harmonics attenuate after a certain period of time after the accident recovery. It is more reliable to monitor the harmonics of the system before returning to the normal operation output when the amount of the harmonics falls below a certain value.

FIG. 17 is a block diagram showing a thirteenth embodiment. Numeral 10 denotes a higher harmonics calculating device, which controls the changeover switch 9 with this output. In other configurations, the first-order lag filter 2b is omitted from FIG.
That is, in the tenth embodiment, the elapsed time t1 needs to be determined by predicting the attenuation of the harmonic, but in the present embodiment, the attenuation of the harmonic is obtained by the harmonic operation device 10. Thus, the changeover switch 9 is controlled. Therefore, when the accident detecting device 8 detects the recovery from the accident and when the harmonic amount by the harmonic amount calculating device 10 is reduced to a constant value (K3), the changeover switch 9 is returned to the moving average filter 2c side. , More reliable control can be performed. S / W implemented by CPU of the present embodiment
Is shown in FIG. In the thirteenth embodiment, the amount of harmonics is actually monitored, and when the amount of harmonics falls below a certain value, the operation is returned from the mode for outputting the phase before the accident to the normal operation output. More reliable control is possible, and the program is simpler than in the twelfth embodiment.

Embodiment 14 FIG. In the eleventh embodiment (FIG. 14), by utilizing the fact that the harmonics attenuate after a lapse of a certain time after the recovery from the accident, the changeover switch is set to have a small time constant after the lapse of a certain time after the input voltage is recovered. Although it was returned to the first-order lag filter, it is actually better to monitor the system harmonics and return to the first-order lag filter with a smaller time constant when the amount of harmonics falls below a certain value. It is certain.

FIG. 19 is a block diagram showing a fourteenth embodiment in which the changeover switch 9 is controlled by the fault detection device 8 and the harmonic amount calculation device 10, and the changeover switch 9 controls the first-order lag filter 2b1 having a small time constant. And the first-order lag filter 2b2 having a large time constant. That is, in the eleventh embodiment, the elapsed time t1 needs to be determined by predicting the attenuation amount of the harmonic, but in the present embodiment, the attenuation amount of the harmonic is calculated by using the harmonic amount calculating device 1
0, and the changeover switch 9 is controlled by this. Therefore, when the accident detection device 8 detects the accident recovery and the harmonic amount by the harmonic amount calculating device 10 is reduced to a constant value (K3), the changeover switch 9 is moved to the first-order lag filter 2b1 having a small time constant. It is possible to perform more reliable control. FIG. 20 shows the S / W of this embodiment. In the fourteenth embodiment, the amount of harmonics is monitored, and the time constant is returned to the original value when the amount of harmonics becomes equal to or less than a certain value, so that more reliable control is possible. .

Embodiment 15 FIG. In the third embodiment (FIG. 5), the phase before the fault is output during the fault period, and the fault is returned to the original operation output when the input voltage exceeds a certain voltage after the fault recovery. Thus, the effect of the harmonics of the phase output is reduced when the gain of the first-order lag filter is reduced.

In the fifteenth embodiment, therefore, the gain of the first-order lag filter 2b is changed from K1 to K2 at the time of return, and is reduced. As a result, it is possible to synchronize with the system voltage even after recovery from the accident, and to reduce the influence of harmonics. Further, the gain K may be returned to the original value when the amount of harmonics becomes small by detecting that a certain period of time has elapsed after the input voltage has recovered by the timer 20 and switching the changeover switch 9. FIG. 21 shows a block diagram of this embodiment, and FIG. 22 shows S / W. In the fifteenth embodiment, when the input voltage exceeds a certain value, the fixed output phase is released, the gain of the first-order lag filter is reduced, and the gain is returned to the original value after a certain time. In addition, the influence of harmonics due to inrush during accident recovery can be reduced.

Embodiment 16 FIG. In the third embodiment (FIG. 5), the phase before the fault is output during the fault period, and is returned to the original operation output when the input voltage exceeds a certain value after the fault recovery. When the gain K of the first-order lag filter is reduced at the time, the influence of the harmonics of the phase output is reduced.

In the sixteenth embodiment, the gain of the first-order lag filter 2b is changed from K1 to K3 at the point of return, and is reduced. As a result, it is possible to synchronize with the system voltage even after recovery from the accident, and to reduce the influence of harmonics. After the voltage is recovered, the harmonics are monitored by the harmonics calculator 10 and the gain may be returned to the original value by switching the changeover switch 9 when the harmonics become smaller. FIG. 23 is a block diagram of this embodiment. FIG. 24 shows the S / W. In the sixteenth embodiment, when the input voltage exceeds a certain value, the fixed output phase is released, and at the same time, the gain of the first-order lag filter is reduced, and when the amount of harmonics becomes equal to or less than the certain value. Since the gain is restored, the influence of harmonics can be reduced more reliably.

Embodiment 17 FIG. In the fifth embodiment (FIG. 8), the filter time constant T is increased during the fault period, and after the fault recovery, the filter time constant is restored when the input voltage exceeds a certain value. After recovery from the accident, since the amount of harmonics is large, the effect of harmonics can be reduced by changing the filter gain from K to K1 and reducing the filter gain at the same time as returning the filter time constant to the original value, and synchronizing with the system voltage. I can do it. The gain may be returned to the original value by detecting the passage of a predetermined time after the voltage recovery by the timer 20 and switching the changeover switch 9. FIG. 25 is a block diagram of the present embodiment, and FIG. 26 is a control S / W. In the seventeenth embodiment, when the input voltage exceeds a certain value, the time constant is returned to the original value, and at the same time, the gain of the filter is reduced.
Since the gain is restored after a certain period of time, the response after the recovery from the accident can be speeded up and the influence of harmonics can be reduced.

Embodiment 18 FIG. In the seventeenth embodiment (FIG. 25), the gain K is returned to the original value after a certain period of time after the input voltage is recovered. In the eighteenth embodiment, the harmonic amount is reduced. The gain is returned to the original value by switching the changeover switch 9 when the amount of the harmonics becomes equal to or less than the predetermined value (K4). FIG. 2 is a block diagram of the present embodiment.
FIG. 28 shows the control S / W in FIG. In the eighteenth embodiment, when the input voltage exceeds a certain value, the time constant is returned to the original value, and at the same time, the gain of the filter is reduced, and when the amount of harmonics becomes equal to or less than the certain value, the gain is returned to the original value. As a result, the response after the accident recovery can be made faster, and at the same time, the influence of harmonics can be more reliably reduced.

[0051]

According to the present invention, noise can be effectively cut off even when harmonics are superimposed on the input voltage by the moving average filter, so that a phase locked loop device having stable performance can be obtained. Further, when an accident occurs, the phase before the accident is stored and used, so that a malfunction due to the accident can be suppressed.

Further, when an accident occurs, the time constant of the first-order lag filter is increased to store a phase close to the phase before the accident, so that the phase of the input signal can be reduced to some extent even in the event of an accident without using a memory. It is possible to follow. In addition, after the recovery from the accident, after a certain period of time or when the amount of harmonics is reduced to a predetermined value or less, the output is returned to the normal calculation output. Therefore, it is possible to reduce the influence of the remaining harmonics during the recovery from the accident. .

When an accident occurs, the output of the phase storage device before the accident or the output of the first-order lag filter having a large time constant is used. By lowering
The effect of harmonics due to inrush during accident recovery can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a phase synchronizer according to Embodiment 1 of the present invention.

FIG. 2 is a diagram illustrating the principle of a moving average filter.

FIG. 3A is a memory configuration of a moving average filter,
(B) is a flowchart of the moving average.

FIG. 4 is a block diagram showing a phase synchronizer according to Embodiment 2 of the present invention.

FIG. 5 is a block diagram showing a phase synchronizer according to Embodiment 3 of the present invention.

FIG. 6A is a flowchart illustrating an operation of the third embodiment, and FIG. 6B is a diagram illustrating a configuration of a calculation result in a memory;

FIG. 7 is a block diagram showing a phase synchronizer according to Embodiment 4 of the present invention.

FIG. 8 is a block diagram showing a phase synchronizer according to Embodiment 5 of the present invention.

FIG. 9 is a flowchart showing an operation of the phase synchronization device according to the sixth embodiment of the present invention.

FIG. 10 is a flowchart showing an operation of the phase synchronization device according to the seventh embodiment of the present invention.

FIG. 11 is a flowchart showing an operation of the phase synchronization device according to the eighth embodiment of the present invention.

FIG. 12 is a flowchart showing an operation of the phase synchronization device according to Embodiment 9 of the present invention.

FIG. 13 is a flowchart showing an operation of the phase synchronization device according to the tenth embodiment of the present invention.

FIG. 14 is a flowchart showing an operation of the phase synchronization device according to the eleventh embodiment of the present invention.

FIG. 15 is a block diagram showing a phase synchronizer according to Embodiment 12 of the present invention.

FIG. 16 is a flowchart showing an operation of the twelfth embodiment.

FIG. 17 is a block diagram showing a phase synchronizer according to Embodiment 13 of the present invention.

FIG. 18 is a flowchart showing an operation of the thirteenth embodiment.

FIG. 19 is a block diagram showing a phase synchronizer according to Embodiment 14 of the present invention.

FIG. 20 is a flowchart showing an operation of the fourteenth embodiment.

FIG. 21 is a block diagram showing a phase synchronizer according to Embodiment 15 of the present invention.

FIG. 22 is a flowchart showing an operation of the fifteenth embodiment.

FIG. 23 is a block diagram showing a phase synchronizer according to Embodiment 16 of the present invention.

FIG. 24 is a flowchart showing an operation of the sixteenth embodiment.

FIG. 25 is a block diagram showing a phase synchronizer according to Embodiment 17 of the present invention.

FIG. 26 is a flowchart showing an operation of the seventeenth embodiment.

FIG. 27 is a block diagram showing a phase synchronizer according to Embodiment 18 of the present invention.

FIG. 28 is a flowchart showing an operation of the eighteenth embodiment.

FIG. 29 is a block diagram showing a conventional phase synchronizer.

[Explanation of symbols]

Reference Signs List 1 phase comparator, 2 loop filter, 2a proportional integral filter, 2b first-order lag filter, 2b1 first-order lag filter with small time constant, 2b2 first-order lag filter with large time constant, 3 VCO, 4 ROM, 5 counter, 6 MEMP, 7 voltage effective value detection device, 8 accident detection device, 9 changeover switch, 10 harmonic amount calculation device.

Claims (16)

[Claims] 1. A phase comparator for inputting a three-phase AC voltage, comparing a three-phase input voltage with a three-phase synchronous output and outputting a phase deviation signal, and a proportional integral receiving the phase deviation output A loop filter including a filter, a moving average filter, and a first-order lag filter; and a voltage controlled oscillator (hereinafter, referred to as a VCO) controlled by an output of the loop filter and supplying a phase-locked output to the phase comparator. A phase synchronizer characterized by the following. 2. A phase comparator for inputting a three-phase AC voltage, comparing a three-phase input voltage with a three-phase phase-locked output, and outputting a phase deviation signal. A phase synchronization device comprising: a loop filter including a filter and a moving average filter; and a VCO controlled by an output of the loop filter and supplying a phase locked output to the phase comparator. 3. A phase comparator for inputting a three-phase AC voltage, comparing a three-phase input voltage with a three-phase phase-locked output, and outputting a phase deviation signal, and a proportional integration to which the phase deviation output is input. A loop filter including a filter, a moving average filter, and a first-order lag filter, a phase storage device (hereinafter referred to as MEMP) for storing an output of the loop filter, an accident detection device for detecting an accident on the input side of the phase comparator, A VCO that is controlled by the output of the loop filter or the MEMP and supplies a phase-locked output to the phase comparator; and the output of the loop filter at all times, the output of the MEMP when an accident occurs, and the accident detection output of the accident detection device. And a switching means for switching the VCO to the VCO. 4. A phase comparator for inputting a three-phase AC voltage, comparing a three-phase input voltage with a three-phase phase-locked output, and outputting a phase deviation signal, and a proportional integral receiving the phase deviation output A loop filter including a filter and a moving average filter, a MEMP storing an output of the loop filter, an accident detection device for detecting an accident on the input side of the phase comparator, and the phase comparator controlled by an output of the loop filter or the MEMP. VCO that supplies a phase-locked output to
And a switching means for switching the output of the loop filter at all times and the output of the MEMP at the time of occurrence of an accident by the accident detection output of the accident detection device and adding the output to the VCO. 5. A phase comparator for inputting a three-phase AC voltage, comparing a three-phase input voltage with a three-phase synchronous output and outputting a phase deviation signal, and a proportional integration to which the phase deviation output is input Filter, moving average filter, and 2 with different time constants
Loop filter composed of a plurality of first-order lag filters, a fault detection device for detecting a fault on the input side of the phase comparator, a VCO controlled by an output of the loop filter and supplying a phase-locked output to the phase comparator, and Is provided with switching means for switching the output of the first-order lag filter having a small time constant and the output of the first-order lag filter having a large time constant in the event of an accident by the accident detection output of the accident detection device and adding the output to the VCO. A phase synchronization device characterized by the above-mentioned. 6. The phase synchronization device according to claim 3, wherein the switching means is returned to the loop filter side when the fault detection device detects the recovery from the fault. 7. The phase synchronization device according to claim 5, wherein when the fault detection device detects the recovery from the fault, the switching means is returned to the first-order lag filter having a small time constant. 8. The phase synchronizer according to claim 3, wherein the switching means is returned to the loop filter side after a predetermined time has elapsed after the fault detecting device detects the recovery from the fault. 9. The phase synchronizer according to claim 5, wherein the switching means is returned to the side of the first-order lag filter having a small time constant after a predetermined period of time after the fault detecting device detects the recovery from the fault. . 10. A phase comparator for inputting a three-phase AC voltage, comparing a three-phase input voltage with a three-phase synchronous output and outputting a phase deviation signal, and a proportional integration to which the phase deviation output is input. A loop filter including a filter, a moving average filter, and a first-order lag filter; a MEMP that stores an output of the loop filter; a fault detection device that detects a fault on the input side of the phase comparator; A harmonic amount calculating device for calculating and calculating a harmonic amount, a VCO controlled by an output of the loop filter or the MEMP to supply a phase-locked output to the phase comparator, and an output of the loop filter which is always in an accident. Sometimes ME above
Switching means for switching the output of the MP according to the fault detection output of the fault detection device and adding the output to the VCO; the fault detection device detecting the recovery of the fault and the output of the harmonic amount calculating device falling below a predetermined value; The phase synchronizer wherein the switching means is returned to the loop filter side when it becomes. 11. A phase comparator for inputting a three-phase AC voltage, comparing the three-phase input voltage with the three-phase phase-locked output, and outputting a phase deviation signal, and a proportional integration to which the phase deviation output is input. A loop filter including a filter and a moving average filter, a MEMP storing an output of the loop filter,
An accident detection device for detecting an accident on the input side of the phase comparator;
A harmonic amount calculating device for calculating a harmonic amount in the input voltage of the phase comparator, the loop filter or the MEM
A VCO that is controlled by the output of P and supplies a phase-locked output to the phase comparator, and always switches the output of the loop filter and the output of the MEMP when an accident occurs, by using the accident detection output of the accident detection device. The above VCO
Switching means for detecting the recovery of the accident and returning the switching means to the loop filter side when the output of the harmonic amount calculating device becomes equal to or less than a predetermined value. A phase synchronizer characterized by the following. 12. A phase comparator for inputting a three-phase AC voltage, comparing the three-phase input voltage with the three-phase phase-locked output, and outputting a phase deviation signal. A loop filter including a filter, a moving average filter, and two first-order lag filters having different time constants, an accident detection device for detecting an accident on the input side of the phase comparator, and a harmonic amount in an input voltage of the phase comparator And a VC that is controlled by the output of the loop filter and supplies a phase-locked output to the phase comparator.
O, and the output of the first-order lag filter having a small time constant at all times and the output of the first-order lag filter having a large time constant at the time of occurrence of an accident are switched by the accident detection output of the accident detection device and added to the VCO. Means for returning the switching means to the first-order lag filter having the smaller time constant when the fault detecting device detects the recovery of the fault and when the output of the harmonic amount calculating device becomes a predetermined value or less. A phase synchronizer characterized in that: 13. After the accident detecting device detects the recovery of the accident, the switching means is returned to the loop filter side after a predetermined time, and at the same time, the gain of the loop filter is reduced, and after a predetermined time, the gain is returned to the original value. 4. The phase synchronizer according to claim 3, wherein: 14. After the accident detecting device detects the recovery from the accident, the switching means is returned to the loop filter side after a predetermined time, and at the same time, the gain of the loop filter is lowered, and the output of the harmonic operation device becomes equal to or less than a predetermined value. 11. The phase synchronizer according to claim 10, wherein the gain is returned to an original value when the phase shift occurs. 15. When the fault detecting device detects the recovery from the fault, the switching means is returned to the first-order lag filter having a small time constant, and at the same time, the gain of the loop filter is lowered, and after a predetermined time, the gain is returned to the original value. 6. The phase synchronization device according to claim 5, wherein: 16. When the fault detecting device detects the recovery from the fault, the switching means is returned to the side of the first-order lag filter having a small time constant, and at the same time, the gain of the loop filter is lowered. 13. The phase synchronization device according to claim 12, wherein the gain is returned to the original value when the value becomes.