JPH10209148A - Method for forming low dielectric constant insulator film and semiconductor device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve adhesion and processing properties by using a feed gas containing tetrafluoroethylene, silane compound, and H2 O2 and forming a low dielectric constant insulator film on a substrate to be treated by the liquid phase CVD method. SOLUTION: A lower-layer interlayer insulation film 12 consisting of, for example, SiO2 , a wiring layer 13 consisting of, for example, Al-1% Si, and a protection film 14 consisting of, for example, SiO2 for conformally covering the wiring layer 13 are formed on a semiconductor substrate 11. Then, by using a feed gas containing tetrafluoroethylene, silane compound, and H2 O2 , a low dielectric constant insulation film 15 is formed on the semiconductor substrate 11 by the liquid phase CVD method. After that, an insulation film 16 consisting of, for example, SiO2 is formed on the low dielectric constant insulation film 15 by the CVD method, thus improving a gap fill capacity and global flattening capacity, an adhesion property, and an etching characteristic and obtaining a semiconductor device such as a reliable logic IC and a high-integration memory.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a low dielectric constant insulator film and a semiconductor device using the same, and more particularly, to forming a silicon oxide-based insulating film containing a fluorocarbon resin component flat. The present invention relates to a method for forming a low dielectric constant insulator film suitable for use in such a case and a semiconductor device using the same.

[0002]

2. Description of the Related Art As the degree of integration of semiconductor devices such as LSIs increases, the width of an interlayer insulating film between adjacent wirings in the same wiring layer in a multi-layer wiring structure decreases, and the interlayer between different wiring layers decreases. The thickness of the insulating film is also reduced. Due to such a reduction in the wiring interval, an increase in capacitance between wirings is becoming a problem. Therefore, the actual operation speed of the semiconductor device is 1 /
K (K is the reduction ratio) does not match the scaling rule,
The advantage of high integration cannot be fully enjoyed.
Preventing an increase in the capacitance between wirings is one of the elemental technologies that must be solved in order to respond to various demands such as high-speed operation, low power consumption, and low heat generation of a highly integrated semiconductor device. As a method of reducing the capacitance between wirings in a highly integrated semiconductor device, for example, as disclosed in Japanese Patent Application Laid-Open No. 63-7650, the use of an interlayer insulating film of a low dielectric constant material is effective.

As the low dielectric constant material, an inorganic material such as a silicon oxide insulating film containing fluorine (hereinafter referred to as SiOF) is typical. SiOF achieves a low dielectric constant by lowering its density by terminating the Si-O-Si bond network with F atoms and by reducing the polarizability of the Si-F bond. In addition, since the film forming process and the processing process are compatible with the film forming process and the processing process of a conventional inorganic interlayer insulating film such as SiO _2, it is attracting attention because it can be easily adopted even in a current manufacturing facility. Also, since it is an inorganic material, it naturally has excellent heat resistance.

As a method of forming a SiOF film, TEF has been conventionally used.
A method of forming a CVD film by adding, for example, NF ₃ as a fluorine source to the OS (40th Joint Lecture on Applied Physics (19)
1993 Spring Annual Meeting) Lecture abstracts p799, Lecture number 1a-
ZV-9) has been reported. For the purpose of stabilizing the film quality, a method of forming low dielectric constant SiOF by dissociating hardly decomposable SiF ₄ by high-density plasma (No. 40)
Proceedings of the Federation Conference on Applied Physics (Spring Annual Meeting, 1993), p.752, lecture number 31p-ZV-1).

In a high-density plasma CVD method using SiF ₄ as a silicon source, SiOF having a relative dielectric constant of about 3.4 is used.
Is obtained. However, when attempting to introduce a high concentration of fluorine atoms into silicon oxide to achieve a low dielectric constant, free F and HF are incorporated into SiOF. In this case, a connection hole is opened in the interlayer insulating film in a later step, and when a TiN barrier layer or a W plug is buried in the connection hole, S
Free F or HF in iOF reacts with TiN, and TiN
The adhesion of the barrier layer is remarkably reduced, and the W plug or the W layer may be peeled off. This phenomenon is, for example, the 43rd
Proceedings of the Annual Meeting of the Japan Society of Applied Physics (Spring Annual Meeting, 1996), p.672, Lecture No. 28a-K-3.

[0006] Even if it does not become free F or HF,
A SiF ₂ bond in which _two F atoms are bonded to one silicon atom is generated. The SiF ₂ bond is unstable and easily hydrolyzes to form a SiOH bond, and further, adsorbs H ₂ O in the atmosphere by a hydrogen bond to increase the water content in the SiOF. In this case, when a connection hole is opened in the interlayer insulating film in a later step and a metal film is buried in the connection hole, a poisoned via is generated, which results in deterioration of filling characteristics and an increase in contact resistance value. . Regarding the SiOF low-dielectric-constant interlayer insulating film, see, for example, Monthly Semiconductor World Magazine (published by Press Journal), March 1996, p. 76
Etc. are introduced.

On the other hand, as an organic material based low dielectric constant insulator film, an organic SOG (Spin) having a siloxane bond is used.
Organic polymer materials such as On Glass, polyimide, polyparaxylylene (trade name: parylene), benzocyclobutene, and polynaphthalene are known. These materials achieve a low dielectric constant by containing carbon atoms to reduce the density and to reduce the polarizability of the molecule (monomer) itself. In addition, a certain degree of heat resistance is obtained by introducing a siloxane bond, an imide bond, or an aromatic ring. In addition, Flare (trade name of Allied Signal)
Alternatively, in a fluororesin-based organic polymer material such as a perfluoro group-containing polyimide or fluorinated polyallyl ether, further lower dielectric constant and heat resistance can be obtained by introducing a C—F bond having a lower polarizability. It is pointed out that such a fluororesin-based organic polymer material has an extremely low relative dielectric constant of 2.0, but has insufficient adhesion to a silicon substrate or a silicon oxide film. These organic low dielectric constant materials are described, for example, in Nikkei Microdevice Magazine, July 1995, p. 105.

These low dielectric constant material layers having a relative dielectric constant of 3.5 or less are applied not only between adjacent wirings but also between wiring layers of different levels.
₂ (dielectric constant 4), SiON (dielectric constant 4 to 6), Si
_The applicant of the present invention discloses a laminated insulating film having a structure sandwiched between insulating films having excellent film quality such as ₃ N ₄ (relative dielectric constant 6) as disclosed in JP-A-8-1
No. 62528 discloses the possibility of a semiconductor device having an interlayer insulating film having both low dielectric constant and high reliability.

Not only the low dielectric constant insulator film but also an interlayer insulating film between multilayer wirings is required to have a gap fill capability and a global flattening capability in order to fill a recess between adjacent wirings. The gap fill ability is an ability to fill finely spaced spaces without generating voids.
The global flattening ability refers to an ability to fill a large area space region without slack. One example of a method proposed in response to these requests is ETE, a UK company.
PL (Advanced Planarization)
(Layer) technology. This method uses SiH ₄ and H ₂ O ₂ as source gases, cools the substrate to be processed to about 0 ° C., and performs CVD, so that the liquid is dripped on the surface of the substrate having irregularities. This is for forming a film of SiO ₂ . There is no problem with the gap fill capability up to an aspect ratio of about 4, and with regard to global flattening, it is possible to bury a 10 μm space flat. However, when the temperature of the substrate to be processed rises to 10 ° C. or higher, the liquid-like behavior during film formation is lost, and the gap fill ability and the global flattening ability gradually deteriorate.

As described above, the APL technique is an attractive method for forming a film. However, there is no characteristic in terms of low dielectric constant, and the relative dielectric constant is 4 to 5 and the SOG film, O ₃ -TE
It is on par with the OS film. This is because the hydroxyl group (—OH group) contained in the APL film increases the relative dielectric constant, and even if stoichiometric SiO ₂ from which the hydroxyl group has been removed is formed,
The relative dielectric constant is limited to about 3.8. Recently, a method of reducing the relative dielectric constant to about 3.5 by introducing F atoms into the APL film has been reported, but due to a demand for higher integration of a semiconductor device, a low dielectric constant of less than 3.0 has been reported. An insulator film is needed.

[0011]

Under such a technical background, there is a demand for a low dielectric constant insulator film having a high filling capability and a relative dielectric constant of less than 3.0. There are two approaches to achieve this, one is to achieve a low dielectric constant by using a film formation method having a high filling capability such as APL technology, and the other is to achieve a low dielectric constant film. This is a method of developing a film forming technique with high embedding ability. The present invention relates to a liquid phase CV such as the former APL technology.
It is an object of the present invention to provide a method for forming a low dielectric constant insulator film having excellent adhesion and workability by using Method D, and a semiconductor device using the same.

[0012]

SUMMARY OF THE INVENTION The method of forming a low dielectric constant insulator film of the present invention is proposed to solve the above-mentioned problem, and comprises a method of forming a silicon oxide-based insulating film containing a fluorocarbon resin component. In a method for forming a low dielectric constant insulator film formed on a substrate to be processed by a chemical vapor deposition method, at least a tetrafluoroethylene, silane-based compound and H It is characterized by containing ₂ O ₂ .

Further, the method of forming a low dielectric constant insulator film of the present invention is a method of forming a silicon oxide type insulating film containing a fluorocarbon resin component on a substrate to be processed by a chemical vapor deposition method. In the method of forming an insulator film, the raw material compounds used in the chemical vapor deposition method include at least polytetrafluoroethylene, a silane compound, and H ₂ O.
₂ is included. In the present specification, polytetrafluoroethylene means a polymer having a low degree of polymerization which can be vaporized, among polymers of dimer or more of tetrafluoroethylene.

The silane compound employed in the present invention is desirably at least one of silane, disilane, monomethylsilane and dimethylsilane. In the method of forming a low dielectric constant insulator film of the present invention,
The substrate to be processed has a step on the surface thereof, and can be preferably applied when forming a low dielectric constant insulator film having a substantially flat surface by filling the step. At the time of film formation, it is desirable to perform chemical vapor deposition while controlling the substrate to be processed at room temperature or lower. According to the method for forming a low dielectric constant insulator film of the present invention, an insulating film having a relative dielectric constant of less than 3.0 can be formed.

A semiconductor device according to the present invention is characterized in that a low dielectric constant insulator film formed by such a method is provided as an interlayer insulating film.

The low dielectric constant insulator film formed according to the present invention is a copolymer material in which a fluorocarbon resin and silicon oxide are mixed. That is, it has a structure in which a siloxane bond is added to the carbon main chain of the fluorocarbon resin, or a structure in which a perfluorocarbon group is introduced into a silicon atom in a silicon oxide network. For this reason, the relative dielectric constant is about 2.2 to 2.5 and SiOF
Is significantly reduced as compared with about 3.4. In addition, since a silicon oxide component is contained, adhesion to a silicon substrate, a silicon oxide film, or the like is improved. In addition, there is no problem in workability such as a CVD method and an etching method, and the compatibility with the conventional silicon oxide process is excellent. The gap fill ability and the global flattening ability are also excellent in principle because of the liquid phase CVD method.

As described above, by employing the method for forming a low dielectric constant insulator film of the present invention, the adhesion to a silicon substrate, silicon oxide, a barrier layer or a metal wiring is improved, and a high-speed It is possible to provide a highly integrated semiconductor device which operates and consumes low power.

[0018]

Embodiments of the present invention will be described below with reference to the drawings. First, the mechanism of forming a fluorocarbon / siloxane copolymer film by the method of forming a low dielectric constant insulator film of the present invention will be described by taking the most typical case where tetrafluoroethylene, monosilane and H ₂ O ₂ are used as source gases. explain. The raw material compounds are all introduced into the CVD chamber in a gaseous state. In the CVD chamber, for example, a fluorocarbon siloxane copolymer is formed by a reaction mechanism described below. SiH ₄ + 2H ₂ O ₂ → SiH ₂ (OH) ₂ + 2H ₂
O ↑ SiH ₂ (OH) ₂ + C ₂ F ₂ → HOSiH ₂ OCF ₂
CHF ₂ HOSiH ₂ OCF ₂ CHF ₂ + SiH ₂ (OH) ₂ → HOSiH ₂ OSiH ₂ OCF ₂ CHF ₂ + H ₂ O ↑ By repeating the polymerization reaction represented by the above formula, a low dielectric constant composed of a fluorocarbon-siloxane copolymer is obtained. An insulator film is formed. This polymerization reaction is carried out by the reaction by-product H
_This is a relatively slow reaction in which the elimination reaction of ₂ O is rate-determining, and the lower-order copolymer film behaves like a liquid before polymerization proceeds. Therefore, this CVD method (liquid phase CVD method)
Is a film forming method that satisfies both the gap fill capability and the global planarization capability.

Next, an example of the configuration of a CVD apparatus used in the method for forming a low dielectric constant insulator film of the present invention will be described with reference to the schematic sectional view shown in FIG. The present CVD apparatus is basically a single-wafer type low-pressure CVD apparatus. In a CVD chamber 5, a substrate stage 2 on which a substrate 1 to be processed is mounted and a gas diffusion plate 3 are arranged to face each other. The substrate stage 2 can control the substrate 1 to be processed at a low temperature of, for example, 0 ° C. by cooling means (not shown). As the cooling means, for example, a known method of circulating a refrigerant such as ethanol may be employed.
A gas pipe 4 of tetrafluoroethylene, a silane-based compound and H ₂ O ₂ is connected to the gas diffusion plate 3 so that a mixed gas of these compounds can be uniformly supplied to the substrate 1 to be processed. The gas pipe 4 and the gas diffusion plate 3 are provided with a heating means such as a heater that can be heated as necessary so that the raw material compound does not condense or solidify.
In FIG. 2, details of the apparatus such as a loading / unloading port, a gas exhaust port, a vacuum pump, and a temperature controller of the substrate 1 are omitted.

Embodiment 1 This embodiment is an example in which a substrate having a step formed by metal wiring of Al or the like is adopted, and a low dielectric constant insulator film is formed on the substrate to be processed. This will be described with reference to 1 (a) to (c).

The substrate to be processed employed in this embodiment is shown in FIG.
As shown in FIG. 1A, a lower interlayer insulating film 12 made of SiO ₂ or the like and a wiring layer 13 made of Al-1% Si or the like are formed on a semiconductor substrate 11 made of Si or the like in which a MOS transistor (not shown) is formed. , And a protective film 14 made of SiO ₂ or the like that conformally covers the wiring layer 13. The lower interlayer insulating film 12 is made of, for example, SiH ₄ / N
It is formed to a thickness of 500 nm by a plasma CVD method using a ₂ O mixed gas or a TEOS / O ₂ mixed gas. The wiring layer 13 is formed into a 0.25 μm line and space pattern through, for example, steps of sputtering film formation using Al-1% Si as a target, resist mask patterning, and dry etching using a chlorine-based gas. And the thickness is, for example, 50
0 nm, and the aspect ratio is 2. The protective film 14 is a protective layer for preventing corrosion and the like of the wiring layer 13 and improving reliability, and has a thickness of about 50 nm. Protective film 14
Was formed using, for example, a parallel plate type plasma CVD apparatus under the following plasma CVD conditions. SiH ₄ 40 sccm N ₂ O 100 sccm He 50 sccm Gas pressure 100 Pa RF power 1.9 W / cm ² (13.56 MHz) Substrate temperature 350 ° C.

The substrate to be processed is treated with the liquid phase CV shown in FIG.
The substrate is set on the substrate stage 2 of the D apparatus, and as an example, the low dielectric constant insulator film 15 is formed flat to a thickness of, for example, 800 nm (stepped concave portion) under the following CVD conditions. The state after the film formation is shown in FIG. SiH ₄ 50 sccm H ₂ O ₂ 200 sccm C ₂ F ₄ 200 sccm Gas pressure 200 Pa Substrate temperature 0 ° C. In this plasma CVD process, H ₂ O ₂ (mp = −
(0.43 ° C., bp = 152 ° C.) is a liquid source, so the H ₂ O ₂ container is heated and vaporized and introduced into the CVD chamber 5. The gas diffusion plate 3 is controlled at, for example, 100 ° C. to prevent the source gas from condensing here. Note that S
As iH ₄ , disilane (Si ₂ H ₆ ) may be used.

The formed low dielectric constant insulator film 15 has a relative dielectric constant in the range of 2.0 to 2.5, a gap fill capability up to an aspect ratio of 4, and a global planarization capability up to a wiring space interval of 10 μm. It was sufficient, and it was possible to secure a substantially flat surface.

Thereafter, as shown in FIG. 1C, an insulating film 16 made of, for example, SiO ₂ was formed on the low dielectric constant insulating film 15 by a CVD method to a thickness of 0.3 μm. The insulating film 16 may be formed by any method other than the CVD method, such as a sputtering method or a spin-on method, as long as it does not cause a problem in the heat resistance of the wiring layer 13. Next, the liquid phase CV
An annealing process is performed to remove moisture in the low dielectric constant insulator film 15 formed by the method D. As an annealing condition, a normal heat treatment atmosphere furnace is used, for example, 400 N ₂ in N _2.
C may be 30 minutes. This annealing may be performed before the formation of the insulating film 16.

The subsequent steps, that is, the opening of the via contact hole by dry etching of the laminated film composed of the insulating film 16, the low dielectric constant insulator film 15, and the protective film 14, the filling of the contact plug, and the like are performed in accordance with the usual method. You can do it. The etching characteristic of the low dielectric constant insulator film 15 is the conventional S
Since the etching characteristics are almost the same as iO ₂ , dry etching in one step is possible. Thereafter, the formation of the wiring layer and the subsequent steps are repeated as necessary to complete the multilayer wiring structure. According to this embodiment, tetrafluoroethylene,
By using monosilane and H ₂ O ₂ as the source gas, a low dielectric constant insulator film can be formed flat on the substrate to be stepped.

Embodiment 2 This embodiment is based on the previous embodiment 1 and differs only in the method of forming the low dielectric constant insulator film. Therefore, only the differences will be described, and redundant description will be omitted. The source of fluorine in the method for forming a low dielectric constant insulator film of this embodiment is polytetrafluoroethylene CF ₃ (CF ₂ ) _n C
F ₃ (n is an integer) was employed. As described above in the section of the means, polytetrafluoroethylene is selected from those having a relatively low degree of polymerization and capable of being vaporized. Since this polytetrafluoroethylene may be a solid source, it is dissolved in florinate as a solvent and nitrogen is used as a carrier gas.
It was introduced into the VD chamber. Polytetrafluoroethylene, which is amorphous, has high solubility and is suitable for this purpose. As a method for supplying polytetrafluoroethylene, for example, a solid source having a molecular weight of tens of thousands may be provided in a CVD chamber, and this may be heated by laser light irradiation or the like, cracked and vaporized. The gas diffusion plate in the CVD chamber was controlled at 200 ° C. to prevent adhesion of polytetrafluoroethylene. An example of the CVD conditions for the low dielectric constant insulator film is shown below. SiH ₄ 50 sccm (or Si ₂ H ₆ ) H ₂ O ₂ 200 sccm N ₂ 500 sccm (as a carrier gas of polytetrafluoroethylene) Gas pressure 200 Pa Substrate temperature 0 ° C.

Even under these CVD conditions, the formed low dielectric constant insulator film 15 has a relative dielectric constant in the range of 2.0 to 2.5, a gap fill capability up to an aspect ratio of 4, and a global flattening capability. Was sufficient up to a wiring space interval of 10 μm, and it was possible to secure a substantially flat surface. The subsequent steps are the same as in the first embodiment. In this embodiment, in addition to the effects of the first embodiment, there is an advantage that a solid source that is easy to handle can be used as a fluorine source.

Embodiment 3 This embodiment is based on the previous embodiment 2 and differs only in the method of forming the low dielectric constant insulator film. Therefore, here, only the differences will be described, and duplicate description will be omitted. . As the silicon source in the method of forming a low dielectric constant insulator film of this example, methylsilane was used instead of silane. As methylsilane, either monomethylsilane or dimethylsilane may be used. An example of the CVD conditions for the low dielectric constant insulator film is shown below. (CH ₃ ) SiH ₃ 50 sccm H ₂ O ₂ 200 sccm N ₂ 500 sccm (as a carrier gas of polytetrafluoroethylene) Gas pressure 200 Pa Substrate temperature to be treated 0 ° C. N ₂ of the carrier gas is Ar, He or H ₂ may be used.

Even under these CVD conditions, the gap fill ability was sufficient up to an aspect ratio of 4, and the global flattening ability was sufficient up to a wiring space interval of 10 μm, so that a substantially flat surface could be secured. In the present embodiment, since the silicon source is an alkyl group, here, methylsilane having a methyl group, the relative dielectric constant of the formed low dielectric constant insulator film 15 is small in the range of 2.0 to 2.5. Things are easy to obtain. However, a slight decrease in heat resistance is observed, so that it is necessary to use differently depending on the application.

The subsequent steps may be in accordance with the first embodiment.
The annealing condition of the low dielectric constant insulator film is preferably, for example, about 400 ° C. for about 15 minutes in an N ₂ atmosphere.

Although the present invention has been described with reference to three embodiments, the present invention is not limited to these embodiments.

For example, although a substrate to be processed having a step formed by a wiring layer made of an Al-1% Si alloy is employed, polycrystalline silicon, a high melting point metal, or a high melting point metal polycide having a laminated structure thereof may be used. Good. In this case, the temperature condition such as the annealing condition of the low dielectric constant insulator film can be shifted to the higher temperature side. Also, as the structure of the semiconductor device, the case where the interlayer insulating film made of the low dielectric constant insulator film is formed on the wiring layer is exemplified, but the groove is formed in the interlayer insulating film made of the low dielectric constant insulator film, and the groove is formed. It may be used for a semiconductor device structure in which a buried wiring is formed by etching back or polishing. Further, the present invention can be applied to a case where the film is used as a final passivation film, or a case where trench isolation or the like is buried flat without generating voids. It is also effective when a compound semiconductor substrate such as GaAs is used in addition to Si as the semiconductor substrate. In addition to semiconductor devices,
It goes without saying that the present invention can be applied to various high-frequency microelectronic devices such as a thin film head and a thin film inductor.

[0033]

As is apparent from the above description, according to the method for forming a low dielectric constant insulator film of the present invention, a low dielectric constant film having both a better gap fill capability and a higher global flattening capability than the conventional method. A dielectric insulator film is obtained. Also, it has excellent adhesion and etching characteristics as compared with a fluorocarbon resin-based organic low dielectric constant film. Therefore, it is possible to provide a semiconductor device such as a logic IC or a highly integrated memory in which signal delay or power consumption is a problem due to the capacitance between wirings, with high reliability.

[Brief description of the drawings]

FIG. 1 is a schematic cross-sectional view illustrating a process of Examples 1 to 3 of the present invention.

FIG. 2 is a schematic cross-sectional view showing one configuration example of a CVD apparatus employed in Examples 1 to 3 of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Substrate to be processed, 2 ... Substrate stage, 3 ... Gas diffusion plate,
DESCRIPTION OF SYMBOLS 4 ... Gas piping, 5 ... CVD chamber 11 ... Semiconductor substrate, 12 ... Lower interlayer insulating film, 13 ... Wiring layer, 14 ... Protective layer, 15 ... Low dielectric constant insulator film, 16 ... Insulating film

Claims (8)

[Claims] 1. A method for forming a silicon oxide-based insulating film containing a fluorocarbon resin component on a substrate to be processed by a chemical vapor deposition method, the method comprising: Raw material compounds used for the growth method include at least tetrafluoroethylene, a silane-based compound and H ₂
A method for forming a low dielectric constant insulator film comprising O ₂ . 2. A method for forming a low dielectric constant insulator film, wherein a silicon oxide-based insulating film containing an organic component containing fluorine is formed on a substrate to be processed by a chemical vapor deposition method. A method for forming a low dielectric constant insulator film, wherein the raw material compound used for the phase growth method includes at least polytetrafluoroethylene, a silane-based compound, and H ₂ O ₂ . 3. The silane compound according to claim 1, wherein the silane compound is at least one of silane, disilane, monomethylsilane and dimethylsilane.
Or the method for forming a low dielectric constant insulator film according to 2. 4. The low dielectric constant according to claim 1, wherein the substrate to be processed has a step, and a low dielectric constant insulating film having a substantially flat surface is formed by filling the step. A method for forming an insulator film. 5. The method for forming a low dielectric constant insulator film according to claim 1, wherein the chemical vapor deposition is performed while controlling the substrate to be processed to a room temperature or lower. 6. The relative dielectric constant of the low dielectric constant insulator film is 3.0.
The method for forming a low dielectric constant insulator film according to claim 1, wherein the thickness is less than 3. 7. A semiconductor device comprising a low dielectric constant insulator film formed by the method for forming a low dielectric constant insulator film according to claim 1 as an interlayer insulating film. 8. A semiconductor device comprising a low dielectric constant insulator film formed by the method for forming a low dielectric constant insulator film according to claim 2 as an interlayer insulating film.