JPH1022645A - Manufacturing method of printed wiring board with cavity - Google Patents

Manufacturing method of printed wiring board with cavity

Info

Publication number
JPH1022645A
JPH1022645A JP8195226A JP19522696A JPH1022645A JP H1022645 A JPH1022645 A JP H1022645A JP 8195226 A JP8195226 A JP 8195226A JP 19522696 A JP19522696 A JP 19522696A JP H1022645 A JPH1022645 A JP H1022645A
Authority
JP
Japan
Prior art keywords
cavity
organic material
layer substrate
printed wiring
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8195226A
Other languages
Japanese (ja)
Inventor
Tomoiku Nakagawa
智郁 中川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Avionics Co Ltd
Original Assignee
Nippon Avionics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Avionics Co Ltd filed Critical Nippon Avionics Co Ltd
Priority to JP8195226A priority Critical patent/JPH1022645A/en
Publication of JPH1022645A publication Critical patent/JPH1022645A/en
Pending legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】 【課題】 半導体素子を収容するキャビティを有するプ
リント配線板の製造方法において、キャビティの形成を
容易にし、工数を減らし、生産性を工向上させる。 【解決手段】 以下の工程を有する。 a、キャビティの底面を形成する内層基板に熱硬化性で
かつ剥離可能な有機材料を前記キャビティの形状に印刷
により塗布し、 b、前記有機材料を加熱して硬化し、 c、前記キャビティの形状に切り抜いたプリプレグを前
記内層基板に積層し、 d、硬化した有機材料およびプリプレグの上に他の外層
基板を積層し、 e、この積層体の外層基板から前記キャビティの形状部
分を切り抜き、 f、この切り抜いた開口部に現れる前記硬化した有機材
料を剥離する。
(57) Abstract: In a method of manufacturing a printed wiring board having a cavity for accommodating a semiconductor element, the formation of the cavity is facilitated, the number of steps is reduced, and the productivity is improved. The method includes the following steps. a, a thermosetting and peelable organic material is applied to the inner layer substrate forming the bottom surface of the cavity by printing on the shape of the cavity, b, the organic material is cured by heating, and c, the shape of the cavity Laminating the prepreg cut out on the inner layer substrate; d, laminating another outer layer substrate on the cured organic material and the prepreg; e. Cutting out the shape portion of the cavity from the outer layer substrate of the laminate; f. The hardened organic material appearing in the cutout is peeled off.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明は半導体素子を実装
するための上方へ開いたキャビティを有するキャビティ
付きプリント配線板の製造方法に関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board having a cavity having an upwardly open cavity for mounting a semiconductor device.

【0002】[0002]

【従来の技術】ICやLSIなどの半導体素子を収容す
るためのキャビティを一方の面(以下上面という)に持
ち、このキャビティに半導体素子を固着してからこの素
子をプリント配線板のパッドにワイヤボンディングでき
るようにしたプリント配線板が公知である。
2. Description of the Related Art A cavity for accommodating a semiconductor element such as an IC or LSI is provided on one surface (hereinafter referred to as an upper surface), and the semiconductor element is fixed in the cavity, and the element is connected to a pad of a printed wiring board by a wire. Printed wiring boards that can be bonded are known.

【0003】図2はこのようなプリント配線板の断面構
造を示す図である。この図において符号10はプリント
配線板であり、その上面には上方へ開いた矩形の凹部す
なわちキャビティ12が形成されている。このキャビテ
ィ12の底面には、キャビティ12の四辺に近接し各辺
に沿って並んだ多数の電極すなわちパッド14が形成さ
れている。またプリント配線板10の上面には、キャビ
ティ12の四辺に近接し各辺に沿って並んだ多数のパッ
ド16が形成されている。
FIG. 2 is a diagram showing a cross-sectional structure of such a printed wiring board. In this figure, reference numeral 10 denotes a printed wiring board, on the upper surface of which a rectangular recess or cavity 12, which is open upward, is formed. On the bottom surface of the cavity 12, a large number of electrodes, that is, pads 14, are formed adjacent to the four sides of the cavity 12 and arranged along each side. A large number of pads 16 are formed on the upper surface of the printed wiring board 10 and are adjacent to the four sides of the cavity 12 and are arranged along each side.

【0004】18は半導体素子であり、ICやLSIな
どのチップからなる。この半導体素子18はキャビティ
12の底面に接着固定され、その後この半導体素子18
の多数の電極はパッド14、16にワイヤボンディング
される。すなわちワイヤ20によって素子18とパッド
14、16とが接続される。
Reference numeral 18 denotes a semiconductor element, which is formed of a chip such as an IC or an LSI. The semiconductor element 18 is bonded and fixed to the bottom surface of the cavity 12, and then the semiconductor element 18
Are wire-bonded to pads 14,16. That is, the wire 20 connects the element 18 to the pads 14 and 16.

【0005】このようにパッド14と16とをキャビテ
ィ12の底面とプリント配線板10の上面とに2段に設
けるのは、次のような理由による。すなわち素子18の
外部接続電極数の増加に伴いプリント配線板側のパッド
数が増え、パッドピッチを狭くする必要が生じる。しか
しワイヤボンディングに使用する機器(ワイヤボンダ)
の加工精度には限界がある。そこでパッド14、16を
2段に分けてパッドピッチを拡大できるようにしたもの
である。
The reason why the pads 14 and 16 are provided in two steps on the bottom surface of the cavity 12 and the upper surface of the printed wiring board 10 is as follows. That is, as the number of external connection electrodes of the element 18 increases, the number of pads on the printed wiring board side increases, and it becomes necessary to reduce the pad pitch. However, equipment used for wire bonding (wire bonder)
There is a limit to the processing accuracy of Therefore, the pads 14 and 16 are divided into two stages so that the pad pitch can be expanded.

【0006】図3はこのキャビティ12を有するプリン
ト配線板10の従来の製造方法を示す図である。この図
は回路パターンを4層に形成したものである。図で30
は内層基板であり、その両面に貼られた銅箔をエッチン
グ処理することにより第2層および第3層の回路パター
ン2L、3Lが上面と下面にそれぞれ形成されている。
FIG. 3 is a view showing a conventional method of manufacturing the printed wiring board 10 having the cavity 12. As shown in FIG. This figure shows a circuit pattern formed in four layers. 30 in the figure
Is an inner layer substrate, and circuit patterns 2L and 3L of the second layer and the third layer are formed on the upper surface and the lower surface, respectively, by etching a copper foil stuck on both surfaces thereof.

【0007】この内層基板30の上面には、前記キャビ
ティ(図2の12に相当する)の形状に接着剤付き離型
フィルム32が貼られ、またこの離型フィルム32の形
状部分を切抜いたプリプレグ34が置かれる。ここに離
型フィルム32は例えばテフロンのフィルムであり、そ
の厚さはプリプレグ34と略等しい。
On the upper surface of the inner substrate 30, a release film 32 with an adhesive is adhered in the shape of the cavity (corresponding to 12 in FIG. 2), and a prepreg obtained by cutting out a shape portion of the release film 32. 34 is placed. Here, the release film 32 is, for example, a Teflon film, and its thickness is substantially equal to that of the prepreg 34.

【0008】そしてこの離型フィルム32およびプリプ
レグ34の上に外層基板36を重ね、内層基板30の下
面にプリプレグ38および他の外層基板40を重ねる
(図3の(A)の状態)。そして全体を上下方向に加圧
しかつ加熱して積層体42を形成する(図3の
(B))。この状態で外層基板36および40の外面に
予め貼られた銅箔に回路パターンを形成し、それぞれ第
1層および第4層の回路パターン1L、4Lとする。
Then, the outer layer substrate 36 is stacked on the release film 32 and the prepreg 34, and the prepreg 38 and another outer layer substrate 40 are stacked on the lower surface of the inner layer substrate 30 (the state shown in FIG. 3A). Then, the whole is pressed and heated in the vertical direction to form the laminate 42 (FIG. 3B). In this state, a circuit pattern is formed on a copper foil previously adhered to the outer surfaces of the outer layer substrates 36 and 40, thereby forming first and fourth layer circuit patterns 1L and 4L, respectively.

【0009】この積層体42には次にルータ44によっ
て上の外層基板36表面側から、離型フィルム32の外
形に沿って切り込みが入れられ(座ぐり加工)、上の外
層基板36にキャビティの形状と同じ形状の開口部が形
成される(図3の(C))。この開口部に表れる離型フ
ィルム32を除去すれば、キャビティ46が形成された
プリント配線板48ができ上がる(図3の(D))。
Next, a cut is made in the laminated body 42 along the outer shape of the release film 32 from the surface side of the upper outer layer substrate 36 by a router 44 (counterbore processing). An opening having the same shape as the shape is formed (FIG. 3C). By removing the release film 32 appearing in the opening, a printed wiring board 48 in which the cavity 46 is formed is completed (FIG. 3D).

【00010】[00010]

【従来技術の問題点】この従来の製造方法においては、
離型フィルム32の位置合わせが面倒であった。すなわ
ちこの離型フィルム32の接着位置は内層基板30の内
側にあるため、その位置を決めるのが非常に困難である
からである。そこで従来は離型フィルム32を接着する
位置に開口部を設けたテンプレートを用意しておき、こ
のテンプレートを用いて手作業で離型フィルム32の位
置決めを行い接着していた。
Problems of the prior art In this conventional manufacturing method,
The positioning of the release film 32 was troublesome. That is, since the bonding position of the release film 32 is inside the inner layer substrate 30, it is very difficult to determine the position. Therefore, conventionally, a template having an opening at a position where the release film 32 is bonded is prepared, and the release film 32 is manually positioned and bonded using this template.

【0011】また離型フィルム32を接着剤で内層基板
30に接着するため、積層時の加熱および加圧により接
着剤の一部が積層体42側に固着して残る。このため離
型フィルム32を剥離した後、この残って固着した接着
剤を溶剤で清掃しなければならなかった。このように従
来の方法には離型フィルム32の位置合わせや接着剤の
除去に多くの工数が必要となり、生産性が悪くなるとい
う問題があった。
Further, since the release film 32 is adhered to the inner layer substrate 30 with an adhesive, a part of the adhesive is fixed and remains on the laminate 42 side by heating and pressing during lamination. Therefore, after the release film 32 has been peeled off, the remaining and adhered adhesive must be cleaned with a solvent. As described above, the conventional method requires a lot of man-hours for positioning the release film 32 and removing the adhesive, and thus has a problem that productivity is deteriorated.

【0012】[0012]

【発明の目的】本発明はこのような事情に鑑みなされた
ものであり、キャビティを容易に形成でき、工数を減ら
し、生産性を向上させることができるキャビティ付きプ
リント配線板の製造方法を提供することを目的とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and provides a method of manufacturing a printed wiring board with a cavity in which a cavity can be easily formed, the number of steps can be reduced, and productivity can be improved. The purpose is to:

【0013】[0013]

【発明の構成】本発明によればこの目的は、半導体素子
を実装するための上方へ開いたキャビティを有するキャ
ビティ付きプリント配線板の製造方法において、 a、キャビティの底面を形成する内層基板に熱硬化性で
かつ剥離可能な有機材料を前記キャビティの形状に印刷
により塗布し、 b、前記有機材料を加熱して硬化し、 c、前記キャビティの形状に切り抜いたプリプレグを前
記内層基板に積層し、 d、硬化した有機材料およびプリプレグの上に他の外層
基板を積層し、 e、この積層体の外層基板から前記キャビティの形状部
分を切り抜き、 f、この切り抜いた開口部に現れる前記硬化した有機材
料を剥離する、ことを特徴とするキャビティ付きプリン
ト配線板の製造方法により達成される。
According to the present invention, there is provided a method of manufacturing a printed wiring board having a cavity having an upwardly open cavity for mounting a semiconductor element, comprising the steps of: a) applying heat to an inner substrate forming a bottom surface of the cavity; Applying a curable and peelable organic material to the shape of the cavity by printing; b, heating and curing the organic material; c, laminating a prepreg cut into the shape of the cavity on the inner layer substrate; d, laminating another outer layer substrate on the cured organic material and the prepreg; e, cutting out the shape portion of the cavity from the outer layer substrate of the laminate; f, the cured organic material appearing in the cutout opening And a method for manufacturing a printed wiring board with a cavity, characterized in that:

【0014】[0014]

【実施態様】図1は本発明の製造方法を示す図である。
この図では前記図2と同一部分に同符号を付した。図1
で50はメタルマスクであり、これに代えてメッシュス
クリーンを用いてもよい。このメタルマスク50にはキ
ャビティとなる部分の形状に開口部52が形成されてい
る。メタルマスク50は内層基板30の上面に位置合せ
して重ねられ、スキージ(へら)54を用いた公知のス
キージ法により有機材料56が印刷される(図1の
(A))。
FIG. 1 is a view showing a manufacturing method of the present invention.
In this figure, the same parts as those in FIG. 2 are denoted by the same reference numerals. FIG.
Is a metal mask, and a mesh screen may be used instead. An opening 52 is formed in the metal mask 50 in a shape of a portion to be a cavity. The metal mask 50 is superimposed on the upper surface of the inner substrate 30 so as to be aligned, and an organic material 56 is printed by a known squeegee method using a squeegee (spatula) 54 (FIG. 1A).

【0015】ここに有機材料56は熱硬化性であってか
つ剥離可能なものであり、加熱前には液状あるいはペー
スト状である。この有機材料56としては、例えば塩化
ビニルを主成分とし、粘度300〜400(PS)、チ
クソトロピー1.2〜1.8のものが適する。このよう
なものとして、はんだレジストなどとして用いられてい
るストリップマスク(太陽インキ株式会社より販売され
ている有機材料の商品名)がある。
Here, the organic material 56 is thermosetting and peelable, and is liquid or paste before heating. As the organic material 56, for example, a material containing vinyl chloride as a main component, a viscosity of 300 to 400 (PS), and a thixotropy of 1.2 to 1.8 is suitable. As such, there is a strip mask (trade name of an organic material sold by Taiyo Ink Co., Ltd.) used as a solder resist or the like.

【0016】このように内層基板30に印刷した有機材
料56は、加熱により硬化されて、フィルム56Aにな
る(図1の(B))。以後は前記図3で説明した工程と
同じ工程を行う。すなわちこの内層基板30の上面に
は、このフィルム56Aの部分を切り抜いたプリプレグ
34を重ね、その上に外層基板36を重ねる。また内層
基板30の下面にはプリプレグ38を介して他の外層基
板40を重ねる(図1の(C))。
The organic material 56 printed on the inner substrate 30 is cured by heating to form a film 56A (FIG. 1B). Thereafter, the same steps as those described with reference to FIG. 3 are performed. That is, on the upper surface of the inner layer substrate 30, the prepreg 34 obtained by cutting out the film 56A is stacked, and the outer layer substrate 36 is stacked thereon. Further, another outer layer substrate 40 is stacked on the lower surface of the inner layer substrate 30 via the prepreg 38 (FIG. 1C).

【0017】そして全体を上下方向に加圧し、かつ加熱
した後、ルータ44によって外層基板36にフィルム5
6Aの外形に沿った切り込み(座ぐり)を入れて切り抜
く(図1の(D))。この切り抜いた開口部分に表れた
フィルム56Aを除去すればキャビティ46付きのプリ
ント配線板48が得られる(図1の(E))。
After the whole is pressurized and heated in the vertical direction, the film 5 is applied to the outer substrate 36 by the router 44.
A cut (spot facing) along the outer shape of 6A is cut out ((D) in FIG. 1). The printed wiring board 48 with the cavity 46 is obtained by removing the film 56A appearing in the cut-out opening (FIG. 1E).

【0018】なお第2層および第1層の回路パターン2
L、1Lには、前記図2に説明したように多数のパッド
14、16が形成されている。そしてこのキャビティ4
6内に接着した半導体素子18が、これらのパッド1
4、16にワイヤボンディングされるものである(図2
参照)。
The circuit pattern 2 of the second layer and the first layer
As shown in FIG. 2, a large number of pads 14 and 16 are formed on L and 1L. And this cavity 4
The semiconductor element 18 bonded in the pad 6
4 and 16 (see FIG. 2).
reference).

【0019】[0019]

【発明の効果】請求項1の発明は以上のように、内層基
板に熱硬化性であってかつ剥離可能な有機材料をキャビ
ティの形状に印刷し、これを加熱硬化した後、このキャ
ビティ形状に切り抜いたプリプレグを外層基板とを積層
し、この外層基板からキャビティの形状を切り抜いて開
口部を設けてから、硬化した有機材料を剥離するもので
ある。
According to the first aspect of the present invention, as described above, a thermosetting and releasable organic material is printed on the inner layer substrate in the shape of a cavity, which is heated and cured, and then formed into this cavity shape. The cut prepreg is laminated with an outer layer substrate, the shape of the cavity is cut out from the outer layer substrate, an opening is provided, and the cured organic material is peeled off.

【0020】従ってキャビティ形状の離型フィルムを接
着する従来方法に比べて、キャビティを容易に形成でき
る。また離型フィルムの位置合せのような面倒な工程が
不要で単にメタルマスクなどを基板に対して位置決めす
ればよいから、作業能率が高くなり、工数が減ると共に
生産性が向上する。
Therefore, the cavity can be easily formed as compared with the conventional method of bonding the cavity-shaped release film. In addition, since a complicated process such as alignment of a release film is not required and a metal mask or the like can be simply positioned with respect to a substrate, work efficiency is increased, man-hours are reduced, and productivity is improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施態様の工程を説明する図FIG. 1 is a diagram illustrating a process of one embodiment of the present invention.

【図2】キャビティ付きプリント配線板の説明図FIG. 2 is an explanatory view of a printed wiring board with a cavity.

【図3】従来の製造方法を説明する図FIG. 3 is a diagram illustrating a conventional manufacturing method.

【符号の説明】[Explanation of symbols]

10、48 プリント配線板 12、46 キャビティ 14、16 パッド 18 半導体素子 20 ボンディング用ワイヤ 30 内層基板 32 離型フィルム 34、38 プリプレグ 36、40 外層基板 42 積層体 44 ルータ 50 メタルマスク 52 開口部 54 スキージ 56 有機材料 56A フィルム(硬化した有機材料) 10, 48 Printed wiring board 12, 46 Cavity 14, 16 pad 18 Semiconductor element 20 Bonding wire 30 Inner substrate 32 Release film 34, 38 Prepreg 36, 40 Outer substrate 42 Laminated body 44 Router 50 Metal mask 52 Opening 54 Squeegee 56 Organic material 56A Film (cured organic material)

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 半導体素子を実装するための上方へ開い
たキャビティを有するキャビティ付きプリント配線板の
製造方法において、 a、キャビティの底面を形成する内層基板に熱硬化性で
かつ剥離可能な有機材料を前記キャビティの形状に印刷
により塗布し、 b、前記有機材料を加熱して硬化し、 c、前記キャビティの形状に切り抜いたプリプレグを前
記内層基板に積層し、 d、硬化した有機材料およびプリプレグの上に他の外層
基板を積層し、 e、この積層体の外層基板から前記キャビティの形状部
分を切り抜き、 f、この切り抜いた開口部に現れる前記硬化した有機材
料を剥離する、ことを特徴とするキャビティ付きプリン
ト配線板の製造方法。
1. A method of manufacturing a printed wiring board with a cavity having an upwardly open cavity for mounting a semiconductor element, the method comprising the steps of: a) a thermosetting and peelable organic material for an inner substrate forming a bottom surface of the cavity; Is applied to the shape of the cavity by printing; b, the organic material is cured by heating; c, a prepreg cut into the shape of the cavity is laminated on the inner layer substrate; d, the cured organic material and the prepreg E) cutting out the shape of the cavity from the outer layer substrate of the laminate, and f. Peeling off the cured organic material appearing in the cutout opening. Manufacturing method of printed wiring board with cavity.
JP8195226A 1996-07-08 1996-07-08 Manufacturing method of printed wiring board with cavity Pending JPH1022645A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8195226A JPH1022645A (en) 1996-07-08 1996-07-08 Manufacturing method of printed wiring board with cavity

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8195226A JPH1022645A (en) 1996-07-08 1996-07-08 Manufacturing method of printed wiring board with cavity

Publications (1)

Publication Number Publication Date
JPH1022645A true JPH1022645A (en) 1998-01-23

Family

ID=16337576

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8195226A Pending JPH1022645A (en) 1996-07-08 1996-07-08 Manufacturing method of printed wiring board with cavity

Country Status (1)

Country Link
JP (1) JPH1022645A (en)

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002237682A (en) * 2001-02-08 2002-08-23 Cmk Corp Multilayer printed wiring board having recess for component mounting and method of manufacturing the same
US6449168B1 (en) 1998-10-26 2002-09-10 Telefonaktiebolaget Lm Ericcson (Publ) Circuit board and a method for manufacturing the same
EP1635625A2 (en) 2004-09-10 2006-03-15 Fujitsu Limited Substrate manufacturing method and circuit board
JP2008112996A (en) * 2006-10-27 2008-05-15 Samsung Electro-Mechanics Co Ltd Method for manufacturing printed circuit board
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US6449168B1 (en) 1998-10-26 2002-09-10 Telefonaktiebolaget Lm Ericcson (Publ) Circuit board and a method for manufacturing the same
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JP2012516039A (en) * 2009-01-27 2012-07-12 デイー・シー・シー−デイベロツプメント・サーキツツ・エンド・コンポーネンツ・ゲー・エム・ベー・ハー Method of manufacturing multilayer printed circuit board, anti-adhesive material, multilayer printed circuit board, and use of such method
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US9340003B2 (en) 2010-05-19 2016-05-17 Unimicron Technology Corp. Manufacturing method of circuit board
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US9282626B2 (en) 2010-10-20 2016-03-08 Lg Innotek Co., Ltd. Printed circuit board and method for manufacturing the same
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CN103379749A (en) * 2012-04-27 2013-10-30 富葵精密组件(深圳)有限公司 Multilayer circuit board and manufacturing method thereof
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JP2014197596A (en) * 2013-03-29 2014-10-16 京セラサーキットソリューションズ株式会社 Multilayer wiring board and manufacturing method of the same
US20160007442A1 (en) * 2014-07-01 2016-01-07 Isola Usa Corp. Prepregs Including UV Curable Resins Useful for Manufacturing Semi-Flexible PCBs
US9764532B2 (en) * 2014-07-01 2017-09-19 Isola Usa Corp. Prepregs including UV curable resins useful for manufacturing semi-flexible PCBs
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