JPH10270954A - Class B output amplifier circuit - Google Patents

Abstract

(57) [Summary] (with correction) [PROBLEMS] B with low voltage operation, low distortion characteristics, good operation efficiency, and little change in output level due to change in load resistance.
A class output amplifier circuit is provided. SOLUTION: A base is connected to an input terminal In, a collector is grounded, and an emitter is connected to a power supply Vc via an emitter resistor R1.
a third transistor Q3 of NPN type having a base connected to the input terminal, a collector connected to the power supply, an emitter grounded via an emitter resistor R2, and a base connected to the third transistor Q3. NPN-type first transistor Q1 connected to the emitter of the transistor, PNP connected to the emitter of the fourth transistor at the base
An output terminal Out connected to the second transistor Q2, the first and second transistors, and a first terminal connected to the third transistor for raising the positive peak value of the emitter voltage.
And a second capacitor C2 connected to the fourth transistor to reduce the negative peak value of the emitter voltage.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention can operate with a low-voltage power supply, has good distortion characteristics, operates with high efficiency,
Also, the present invention relates to a class B output amplifier circuit in which the output level does not change much due to a change in load.

[0002]

2. Description of the Related Art Conventionally, for example, a crystal oscillation circuit having a circuit configuration as shown in FIG. 5 is used. In this oscillation circuit, the oscillation output of the Colpitts oscillation circuit 2 using the crystal resonator 1 as a frequency source is output via a buffer circuit 3 having a grounded base. By utilizing the excellent isolation effect of the grounded base circuit, the oscillation stage is not affected by the load condition.

However, in such a circuit configuration,
A signal having a relatively large amount of distortion extracted from the collector of the oscillation circuit 2 is input to the buffer circuit 3 having a good linearity and a common base. For this reason, there is a problem that the output signal is largely distorted, thereby increasing the harmonic components, and the output amplitude is reduced when the load is heavy.

Further, in such a circuit configuration, collectors and emitters of two NPN transistors are interposed between a power supply and a ground potential in series via resistors. Therefore, such a device is not suitable for use in a portable electronic device that operates at a low voltage such as a minimum operating voltage of 2.6 V.

Generally, a class B output circuit is known as an efficient output circuit with low power consumption. In this class B output circuit, for example, the collector / emitter and emitter / collector of a PNP type transistor and an NPN type transistor are connected in series between a power supply and a ground potential so that one transistor operates alternately every half cycle of an AC signal. I try to make it.

Therefore, when there is no signal, all the transistors are turned off so that the collector current does not flow, and the power can be efficiently used and the operation can be performed with high efficiency because no wasteful power is consumed. . However, the class B output circuit has a problem that a so-called crossover distortion occurs because the transistor does not turn on at a portion where the amplitude of the input signal is small due to the base-emitter voltage of the transistor.

Further, the class B output circuit has a problem that, when operated at a low voltage, the positive and negative peak values of the output signal are clipped to generate distortion and reduce the output amplitude. Regarding the former crossover distortion, there is conventionally known a circuit in which the distortion is not generated by a circuit technique.

However, no suitable solution is known for the latter problem that the peak value of the output signal is clipped. The reason for this is that the use of a low-voltage operation circuit, for example, to extend the use time of a mobile phone having a limited battery capacity, has recently become necessary.

As described above, in the class B output circuit operating at a low voltage, the output signal cannot essentially exceed the power supply voltage, so that only a small amplitude can be obtained, and the positive and negative peak values of the output signal are clipped. There is a problem that the amplitude of the output signal becomes smaller.

[0010]

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and can operate at a low voltage.
It is an object of the present invention to provide a class B output amplifier circuit having good distortion characteristics, good operation efficiency, and little change in output level due to a change in load resistance.

[0011]

According to the present invention, there is provided a class B in which the collector / emitter of a first NPN transistor and the emitter / collector of a second PNP transistor are connected in series between a power supply and a ground potential. In the output circuit, an input terminal to which an input signal is applied, a PNP-type third transistor having a base connected to the input terminal, a collector grounded, and an emitter connected to a power supply via an emitter resistor, and An NPN-type fourth transistor having a base connected, a collector connected to a power supply, and an emitter grounded via an emitter resistor, and an NPN-type first transistor having a base connected to the emitter of the third transistor.
A PNP-type second transistor having a base connected to the emitter of the fourth transistor,
An output terminal connected to the series connection point of the first and second transistors, a first capacitor connected between the base and the emitter of the third transistor for raising a positive peak value of the emitter voltage, And a second capacitor connected between the base and the emitter of the transistor for reducing the negative peak value of the emitter voltage.

[0012]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the circuit diagram shown in FIG. Q1 is an NPN-type first transistor, and Q2 is a PNP-type second transistor. The collector of the first transistor Q1 is connected to the power supply Vcc, the collector of the second transistor Q2 is grounded, and the emitter is commonly connected to the output terminal Out.

Then, the first and second transistors Q1, Q
2 form a so-called complementary class B output circuit. Q3 is a PNP-type third transistor whose emitter is connected to a power supply Vcc of 2.6 V via an emitter resistor R1 and whose collector is grounded.

Q4 is an NPN-type fourth transistor having a collector connected to a power supply Vcc, an emitter grounded via an emitter resistor R2, and a base connected to each of the third and fourth transistors Q3 and Q4. , To an input terminal In to which an input signal is externally supplied.

The emitter of the third transistor Q3 is connected to the base of the first transistor Q1, and the emitter of the fourth transistor Q4 is connected to the base of the second transistor Q2.
1. Drive Q2.

The base of the third transistor Q3
The base voltage Vb of the first transistor Q1 between the emitters
A first capacitor C1 that raises the positive peak value of 1 is inserted.

Similarly, the base of the fourth transistor Q4
The base voltage Vb of the second transistor Q2 between the emitters
A second capacitor C2 for lowering the negative peak value of 2 is inserted. And the third and fourth transistors Q
3, the base of Q4 is connected to power supply Vc via bias resistor R3.
c and grounded via a bias resistor R4 to apply a bias voltage to the bases of the third and fourth transistors Q3 and Q4.

With such a configuration, the base-emitter voltage Vbe of the first and second transistors Q1 and Q2 in the output stage is controlled by the third and fourth transistors Q3 and Q4.
And the occurrence of crossover distortion can be prevented. And the third and fourth transistors Q
3, input signals applied to the bases of Q4 drive first and second transistors Q1 and Q2 of the output stage, respectively.

When a sine wave signal indicated by In in FIG. 2 is input, the base voltages Vb1 and Vb2 of the transistors Q1 and Q2 change as indicated by Vb1 and Vb2 in FIG. 2, respectively.

That is, the positive peak value of the transistor Q1 is raised by the charge of the capacitor C1,
Similarly, the negative peak value of transistor Q2 is
Is lowered by the charge of

The broken line in FIG. 2 shows how the positive and negative peak values are distorted when, for example, the power supply voltage is low and the capacitors C1 and C2 are not provided. Thus, in the above embodiment, a signal without distortion can be obtained as the output signal of the output terminal Out as shown by the solid line in FIG. Note that the broken lines in FIG. 3 show the distortion of the output signal when the base voltages Vb1 and Vb2 are distorted as shown by the broken lines in FIG.

The class B output circuit can obtain a large output compared to, for example, a grounded base circuit as shown in FIG. 5. There is an advantage that it can be driven with a large amplitude.

The present invention is not limited to the above embodiment. For example, as shown in FIG. 4, an input terminal In is connected to a third and fourth transistors Q3, Q3,
Needless to say, it may be connected to the base of Q4 to supply an input signal.

The present invention is embodied in the form described above and has the following effects.

Since the output circuit is a class B output circuit, the operation efficiency is good, and a large amplitude output can be obtained without generating distortion even at a low voltage, for example, a power supply voltage of about 2.6 V. Therefore, it is possible to provide an output circuit in which the output level does not fluctuate due to the load fluctuation and the power consumption is small.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of one embodiment of the present invention.

FIG. 2 is a waveform chart showing a change in a base voltage of a transistor in an output stage of the embodiment shown in FIG. 1;

FIG. 3 is a waveform chart showing output signals of the embodiment shown in FIG.

FIG. 4 is a circuit diagram showing another embodiment of the present invention.

FIG. 5 is a circuit diagram of a conventional oscillation circuit having a base-grounded buffer.

[Explanation of symbols]

 Q1, Q2, Q3, Q4 Transistor C1, C2 Capacitor R1, R2, R3, R4 Resistance

Claims (2)

[Claims] An input signal is applied to a class B output circuit in which a collector / emitter of an NPN type first transistor and an emitter / collector of a PNP type second transistor are connected in series between a power supply and a ground potential. An input terminal connected to the input terminal, a base connected to the input terminal, a collector grounded, and an emitter connected to a power supply via an emitter resistor.
An NP-type third transistor having a base connected to the input terminal, a collector connected to a power supply, and an emitter grounded via an emitter resistor;
A PN-type fourth transistor, a NPN-type first transistor having a base connected to the emitter of the third transistor, and a PNP-type second transistor having a base connected to the emitter of the fourth transistor. An output terminal connected to a series connection point of the first and second transistors; a first capacitor connected between a base and an emitter of the third transistor for raising a positive peak value of an emitter voltage; A second capacitor connected between the base and the emitter of the transistor No. 4 to reduce the negative peak value of the emitter voltage. 2. The class B output amplifier according to claim 1, wherein a third capacitor is interposed between the input terminal and the bases of the third and fourth transistors.