JPH10283733A - Disk reproducing apparatus and disk reproducing method - Google Patents

Abstract

(57) [Problem] To provide a disk reproducing apparatus having a shock-proof function which consumes low power, has a long mechanism life, and can be reduced in size and price. SOLUTION: A memory 8 for writing data read from a disk 1, reading means for reading data from the memory at a constant speed, and when an abnormal data is detected, an error occurs before the data is read from the memory. In a disk reproducing apparatus including data correction means 6, 7, 9 for returning to the previous disk position and rewriting data in the memory while ensuring data continuity, the disk rotation speed is set to the reading speed from the memory or an integral multiple thereof. A disk rotation switching means 6 for switching the disk rotation speed to a predetermined speed and a disk rotation variable control means 14 for controlling the disk rotation speed near the read speed. When the amount of stored memory data becomes full during high-speed reading of the disk, the disk rotation is controlled near the reading speed,
The data storage amount after the sound connection is full again.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a disk reproducing apparatus for reproducing a CD or the like and a disk reproducing method using the same, and more particularly, to efficiently preventing the occurrence of skipping of reproduced sound due to vibration or the like. Is what you do.

[0002]

2. Description of the Related Art A CD player reads an information signal from a CD by making full use of a focusing servo for focusing a light beam on an information signal surface of the CD, a tracking servo for following the light beam on an information track, and the like. Faithful reproduction is possible. However, since information is read out from a CD in a non-contact manner, in a portable or in-vehicle device, an external vibration causes a defocus or a track jump, and the sound is interrupted or the sound is discontinuous in time.
So-called "sound skipping" tends to occur.

In order to prevent such skipping, data is read out from a CD at a high speed and stored in a memory, and the data is read out from the memory at a normal reproduction speed (standard speed), thereby preventing a skipping due to an impact or the like. Technology is being developed. According to this technique, when a skip is detected, the position of the CD where the information signal is interrupted is accessed again, and before the information of the skip is read out by normal reproduction,
The information from that location is stored again in memory. Reading data successively from the position where the information signal is interrupted and recording it as a continuous information signal on the memory is called "sound connection".

A conventional disk reproducing apparatus having the shock proof function is described in National Technical Report VOL.
40, No. 3, Jun. 1994.

As shown in FIG. 6, an optical pickup 2 for reading information from a disk 1 and a disk 1
A spindle motor 3 for rotating the
A driving circuit 11 for driving the optical pickup 2, feeding, focusing and tracking of the optical pickup 2;
Amplifying the output of the optical pickup 2, a signal processing circuit 5 for processing the amplified output signal of the optical pickup 2, and controlling the speed of the spindle motor 3 based on the output of the head amplifier 4, sending the optical pickup 2, and focusing. A servo processing circuit 6 for performing tracking and tracking, a shock proof control circuit 7 for preventing skipping of reproduced sound, a memory 8 for storing information signals read from the disk 1 at a high speed, and a read from the memory 8 at a normal speed. A D / A converter 10 for converting the output information signal into an analog signal, a system control circuit 9 for controlling each part of the apparatus based on an instruction input by a key 13, and a display unit 12 for displaying necessary information. And

As shown in FIG. 7, a signal processing circuit 5 demodulates the modulated data read from the disk 1 and a sub-code included in recording information from the demodulated data. Subcode extraction unit 44 to be extracted
And a jitter absorption RAM 42 for absorbing fluctuations in the time axis direction of the signal, and an error correction unit 41 for correcting errors in demodulated data.

[0007] As shown in FIG. 8, the shock proof control circuit 7 includes a serial / parallel conversion unit 57 that converts serial data input from the signal processing circuit 5 into 16-bit parallel data. A memory controller 51 for controlling reading and writing, a read address generator 54 for generating a read address of the memory 8, a write address generator 53 for generating a write address to the memory 8, and a write generated by the write address generator 53. A write address latch 52 for holding an address in the cycle of a sub-code block, an effective address latch 55 for holding the latest address confirmed by the system control circuit 9 to have no skip, a read address generator 54, The address stored in the memory from the address in the address generator 53 and the effective address latch 55 A data amount detecting unit 56 for detecting a data amount, a parallel / serial converting unit 58 for converting an output signal from parallel data to serial data, a data matching detecting unit 59 for detecting data matching at the time of sound connection, and a shock proof A control unit 60 for controlling each unit of the control circuit 7;

In a signal recorded on a CD, one information unit is formed in 98 frames. One frame is shown in FIG.
As shown in (a), a 24-bit frame synchronization signal, a sub-code of one symbol (one symbol is 8 bits), digital audio data of 24 symbols,
It consists of the parity of the symbol and the three bits required to combine each symbol. Since the data of one symbol is modulated to 14 bits for recording on a CD, one frame is composed of 588 bits.

The subcode forms one block with 98 frames, and when only the subcode portion is extracted, the subcode is as shown in FIG. Among them, S ₀ and S ₁ are synchronization patterns for identifying the head of the block. The information necessary for accessing the block is P _{1 to} P ₉₆ , Q _{1 to} Q ₉₆
, And the absolute time data that monotonically increases from the block at the start position to the block at the end position is recorded here.

The servo processing circuit 6 of the reproducing apparatus
Has a PLL (Phase Locked Loop) for reproducing a clock signal from a reproduction signal of a disk. This PLL includes a VCO (voltage controlled oscillator) that outputs an oscillation signal having a frequency corresponding to an input voltage, and a phase comparator that compares the phase of a signal that detects an edge of a reproduced waveform with the oscillation output of the VCO. And the output of the phase comparator is again VC
Input to O. When the PLL is locked, V
From CO, a continuous signal synchronized with the edge signal of the reproduced waveform is oscillated, and this becomes a clock signal. The rotation of the spindle motor 3 is controlled by synchronizing this clock signal with the original oscillation of the crystal oscillator incorporated in the device.

In this disk reproducing apparatus, the spindle motor 3 is controlled by the servo processing circuit 6 to perform the normal reproduction.
The disk 1 is driven at double speed, and the disk 1 rotates at double speed.
The data read at double speed from the disk 1 passes through the optical pickup 2, is amplified by the head amplifier 4, and is demodulated by the data demodulation unit 43 of the signal processing circuit 5.

The sub-code extraction unit 44 extracts a sub-code from the demodulated data and, every time a synchronization pattern of the sub-code block is detected, outputs a sub-code block clock signal (BLKCK) to the system control circuit 9 and the shock proof. Output to the control circuit 7.

The demodulated audio data and parity data are stored in a jitter absorbing RAM 42 and then read out with a clock having a constant time interval to remove jitter. At this time, if the jitter is too large to absorb the jitter, a jitter NG signal is output to the system control circuit 9 and the shockproof control circuit 7. At this time,
The control unit 60 of the shock proof control circuit 7 stops writing to the memory 8. The audio data output from the jitter absorption RAM 42 is error-corrected by the error correction unit 41 using the parity data.

The audio data thus demodulated is
The signal is input to the shock proof control circuit 7 and the serial-parallel converter 57
Is converted into 16-bit parallel data, and is stored in the write address (WA) of the memory 8 generated by the write address generator 53.

The write address latch 52 holds the address generated by the write address generator 53 every time BLKCK is input from the signal processing circuit 5.

On the other hand, every time BLKCK is input from the signal processing circuit 5, the system control circuit 9
Read the sub-code output from and identify its continuity. If the sub-codes are continuous, it is determined that there is no sound skip, and a WAQV command is sent to the effective address latch 55 of the shock proof control circuit 7. The valid address latch 55 holds the address stored in the write address latch 52 by this command. Therefore, the effective address latch 55 has the address (VWA) of the memory 8 corresponding to the sub-code confirmed to be normal.
Will be held.

The read address generator 54 generates a read address (RA) so that the audio data stored in the memory 8 is read at a normal reproduction speed. The read data is converted to serial data by the parallel / serial conversion unit 58 and input to the D / A converter 10, where it is converted to analog data to reproduce the R channel and L channel audio signals.

Addresses WA, RA and VW of the memory 8
A has the relationship shown in FIG. That is, WA takes precedence,
The RA reads the data written by the WA in chronological order. The rotation speed of the WA is twice the rotation speed of the RA. The data written by the WA is not always correct. VWA in this written data
The data up to this is data determined to be "no error" by checking the subcode. Therefore, VWA and RA
Is treated as valid data.

When the RA catches up with the VWA, there is no more data to be read, and the reading must be stopped. When the WA catches up with the RA, the data is full and the writing must be stopped.

The data amount detector 56 includes a write address generator 53, an effective address latch 55, and a read address generator.
According to WA, VWA, RA input from each of 54,
The amount of data in the memory 8 is detected, and when the WA catches up with RA (is full), the control unit 60 is notified of the detection result.

The control unit 60 causes the write address generation unit 53 to stop generating a write address, and transmits the detection result to the system control circuit 9. The system control circuit 9 issues a command to the servo processing circuit 6 to suspend reading of information from the disk 1 by the optical pickup 2.

Even if the writing of data to the memory 8 is stopped, the reading of data from the memory 8 is continued at the normal speed, so that the effective data amount between the VWA and RA of the memory 8 decreases. When the valid data decreases to a certain amount, the data amount detection unit 56 detects the
Inform

The control unit 60 transmits this detection result to the system control circuit 9, which issues a command to the servo processing circuit 6 to read the disc 1 by the optical pickup 2.
The reading of the information at double speed from is resumed.

At this time, the process of "sound connection" is performed so that the data recorded in the memory 8 and the data to be recorded are continuous.

The system control circuit 9 sends a data comparison connection command for sound connection to the shock proof control circuit 7, and the servo processing circuit 6 sends a command to the effective address latch 55 before the information reading is temporarily stopped. WAQV sent
Issue a command to access from a point slightly before the point.

In the shock proof control circuit 7 which has received the data comparison connection command, the data coincidence detecting section 59 outputs the six words (R channel, L channel) before the VWA as shown in FIG.
The stored data of a total of 96 bits (3 words for each channel) and the signal input from the signal processing circuit 5 are compared with each other.
Tell 60. In response to this, the control unit 60 instructs the write address generation unit 53 to generate a write address from VWA + 1, restarts data accumulation, and starts data matching after data input continuously from the signal processing circuit 5. Data is stored in the memory 8.

As described above, in this apparatus, information is read from the disk 1 which constantly rotates at double speed and stored in the memory 8, and the stored information is read out from the memory 8 at normal speed and reproduced. . When the amount of data in the memory 8 becomes full, reading of information from the disk 1 is suspended, and when the amount of data in the memory 8 decreases to a certain level,
After the sound connection, the information reading from the disk 1 is restarted. This operation is repeated for information storage in the memory 8 as long as sound skipping due to impact or the like does not occur. During this time, the data reading from the memory 8 at the normal speed is continuously continued, and the reproduction of the information is continuously performed.

FIG. 12 shows how the amount of data stored in the memory 8 at this time changes with time.

When a shock is applied to the disc reproducing apparatus in the process of storing information in the memory 8 and a sound skip occurs, the system control circuit 9 determines that the sub-code becomes discontinuous,
Alternatively, detection is performed by inputting a jitter absorption NG signal from the signal processing circuit 5 or inputting an abnormality detection signal from the servo processing circuit 6. The system control circuit 9 that has detected the sound skipping causes the shock proof control circuit 7 to stop accumulating information in the memory 8 and is held in the effective address latch 55 that has been confirmed to be normal at that time. In order to store information again after the effective address (VWA), a data comparison connection for sound connection is instructed to the shock proof control circuit 7, and the servo processing circuit 6 is instructed from the WAQV point corresponding to the VWA. Issue a command to access from a little before.

The operation of the sound connection at this time is the same as that at the time of resuming the information storage described above. After the sound connection processing, data continuous with the data of the effective address stored in the memory 8 is stored. , To the subsequent write address.

FIG. 12 also shows a temporal change in the amount of data stored in the memory 8 when the disturbance occurs.

As described above, in this disk reproducing apparatus,
Even if sound skips occur due to an impact on the device, etc., before the information of the skipped portion is read out by normal playback, it is connected again and stored again, so that information without skipped sound can be reproduced during playback. it can.

Japanese Patent Laid-Open Publication No. Hei 2-161658 proposes a shock-proof type disk reproducing apparatus different from this. In this apparatus, information on a disk is read at a triple speed and stored in a memory, and the information is read from the memory at a normal speed to reproduce the information. When the amount of data in the memory becomes full, information reading from the disk is changed to the normal speed. In this state, since the amount of data input to the memory is equal to the amount of data output from the memory, the amount of data stored in the memory does not change over time.

When skipping occurs, after the sound is connected, the information of the disk is read at triple speed and stored in the memory. When the data amount of the memory becomes full, the information reading from the disk is resumed normally. Switch to speed.

FIG. 13 illustrates a temporal relationship between data input to the memory and data output from the memory, and a temporal change in the amount of data stored in the memory.

[0036]

However, among the conventional disk reproducing devices, the former device needs to constantly maintain the rotation of the disk at twice the speed, so that the current consumption of the spindle motor becomes large. Since the optical head-up is frequently returned to the position before the temporary stop, the current consumption of the traverse motor also increases, and the amount of heat generated increases. Also, such as motor
The parts of the mechanical system wear quickly and the service life of the mechanical system is short. In addition, since the number of sound connection operations is large, there is a problem that a sound connection error is highly likely to occur in the case of a compact disc in which the same data continues.

On the other hand, in the latter disk reproducing device, when the data amount of the memory becomes full, the rotation of the disk is reduced from triple speed to the normal speed, so that the current consumption of the spindle motor can be suppressed, and the sound connection operation can be performed. The number of times can be reduced.

However, when the rotation of the disk is switched from the triple speed to the normal rotation, the PLL of the servo processing circuit 6 loses synchronization, a jitter absorbing NG signal is generated, and the subcode becomes discontinuous. In addition, sound skipping is inevitable, and at this stage, sound connection is naturally required. During this sound linking operation, the amount of data stored in the memory decreases. Even if the sound connection is successful and data reading from the disk is resumed, the data reading speed is the same as the normal playback speed, so the data storage amount in the memory does not increase and the data storage amount remains reduced. Will do.

If a sound skip occurs in such a state, the effective data stored in the memory may become empty during the sound connection, and the reproduction may be stopped. In order to avoid such a situation, it is necessary to increase the capacity of the memory and read and store a large amount of data from the disk in advance. Therefore, in this device, there is a problem that the use efficiency of the memory is low, and miniaturization and cost reduction of the device are prevented.

The present invention solves such a conventional problem, and consumes less power and has a longer mechanism life.
To provide a disk reproducing apparatus having a shock-proof function that can be reduced in size and cost and can also deal with jitter-free (linear velocity servo, etc.), and efficiently use a data writing memory. It is an object of the present invention to provide a disk reproducing method capable of performing disk reproduction with little power consumption and without skipping.

[0041]

Therefore, according to the present invention, there is provided a memory for writing digital data read from a disk, and a reading means for reading and writing data written in the memory in order from an oldest one at a constant reading speed, When an error in digital data is detected, before the reading of the digital data from the memory by the reading means is completed, the data is returned to the disk position before the occurrence of the error, and the data is corrected so that the data is rewritten to the memory while maintaining the continuity of the data. Means for switching the disk rotation speed to the read speed or an integral multiple thereof, and a disk rotation variable control means for variably controlling the disk rotation speed near the read speed. Is provided.

Further, according to the disk reproducing method of the present invention, when digital data is read from the disk at a high speed and the data storage amount of the memory reaches the upper limit level,
The disk rotation speed is slightly faster than the data read speed from the memory, and in this state, rewriting to the memory is performed while ensuring continuity between the valid data written to the memory and the data to be read from the disk,
After the rewriting, the disk rotation speed is controlled near the reading speed.

Alternatively, when the amount of data stored in the memory reaches the lower limit level by reading digital data from the disk at a high speed, the disk rotation speed is gradually reduced while the data reading from the disk is continued, and the data is read from the memory. Converge on the data read speed.

Therefore, in the disk reproducing apparatus of the present invention, by executing this reproducing method, it is possible to reduce the number of rotations of the disk and the number of times of sound connection.
It is possible to reduce power consumption and extend the life of the mechanism.

In the method of rewriting data in the memory by slightly increasing the disk rotation speed from the reading speed,
After the continuity is successfully secured (sound connection), the amount of data stored in the memory gradually increases and reaches the full level again. Therefore, since the memory capacity can be fully utilized, it is not necessary to increase the size of the memory.

In the method of gradually reducing the disk rotation speed while continuing to read data from the disk, the number of sound connections can be further reduced.

[0047]

DESCRIPTION OF THE PREFERRED EMBODIMENTS According to the first aspect of the present invention, a memory for writing digital data read from a disk and data written in the memory are read out at a fixed read speed in order from the oldest one and output. When the reading means detects an error in the digital data and before the reading means finishes reading the digital data from the memory, it returns to the disk position before the occurrence of the error and rewrites the data while ensuring data continuity. A disk rotation switching means for switching the disk rotation speed to the reading speed or an integral multiple thereof, and a disk rotation device for variably controlling the disk rotation speed near the reading speed. Variable control means for high-speed reading from disk When the amount of data stored in the memory is full the disk rotation is controlled at a speed close to the reading speed.

According to a second aspect of the present invention, the disk rotation variable control means includes a VCO (voltage controlled oscillator), a first frequency dividing means for dividing the output frequency of the VCO, and frequency dividing the frequency of the original oscillation. A second frequency dividing means; and a phase comparing means for outputting a phase difference between outputs of the first frequency dividing means and the second frequency dividing means to the VCO, wherein a frequency dividing ratio of the first frequency dividing means is set to a second frequency dividing means. The frequency of the VCO is deviated from the frequency of the original oscillation by slightly differentiating the frequency of the VCO, thereby variably controlling the disk rotation speed near the read speed. By slightly changing the frequency division ratio of the second frequency dividing means, the disk rotation speed can be finely changed.

According to a third aspect of the present invention, the digital data read from the disk is written into the memory, and the data written into the memory is read out at a constant read speed in order from the oldest one. Before the reading of the digital data from the memory is completed, the disk is returned to the disk position before the occurrence of the abnormality, and the digital data is read from the disk at a high speed in the disk reproducing method of rewriting the memory while maintaining the continuity of the data. Thus, when the amount of data stored in the memory reaches the upper limit level, the disk rotation speed is slightly increased from the read speed, and in this state, the continuity between the valid data written in the memory and the data read from the disk is determined. Re-write to memory while securing, When the data storage amount of the memory reaches the upper limit level in the rewriting of the disk, the disk rotation speed is set to the reading speed, and the disk rotation speed at the time of rewriting the memory is slightly lower than the reading speed. Because it is earlier, after the continuity is successfully ensured (sound connection), the amount of data stored in the memory gradually increases until it reaches full. After the disk is full, the disk rotation speed can be kept constant as long as sound skipping does not occur, so that the load on the disk rotation mechanism is reduced and the speed control is easy.

According to a fourth aspect of the present invention, the digital data read from the disk is written in the memory, the data written in the memory is read out at a constant read speed in order from the oldest one, and when an abnormality of the digital data is detected, Before the reading of the digital data from the memory is completed, the disk is returned to the disk position before the occurrence of the abnormality, and the digital data is read from the disk at a high speed in the disk reproducing method of rewriting the memory while maintaining the continuity of the data. Thus, when the amount of data stored in the memory reaches the upper limit level, the disk rotation speed is slightly increased from the read speed, and in this state, the continuity between the valid data written in the memory and the data read from the disk is determined. Re-write to memory while securing, After the rewriting, the disk rotation speed is slightly slower than the read speed each time the data storage amount of the memory reaches the upper limit level, and the disk rotation speed is read out each time the data storage amount of the memory reaches the lower limit level of the predetermined range. Since the speed is slightly higher than the speed, it is possible to apply to the jitter free mode in which the amount of input data per unit time to the memory is not constant.

According to a fifth aspect of the present invention, the digital data read from the disk is written into the memory, and the data written into the memory is read out at a constant read speed in order from the oldest one. Before the reading of the digital data from the memory is completed, the disk is returned to the disk position before the occurrence of the abnormality, and the digital data is read from the disk at a high speed in the disk reproducing method of rewriting the memory while maintaining the continuity of the data. Thus, when the amount of data stored in the memory reaches the lower limit level, while continuing to read data from the disk, the disk rotation speed is gradually reduced to converge to the reading speed. Therefore, the number of times of sound connection can be reduced.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First Embodiment) As shown in FIG. 1, a disc reproducing apparatus according to a first embodiment comprises an optical pickup 2 for reading information from a disc 1, a spindle motor 3 for rotating the disc, and a spindle motor. A drive circuit 11 for driving the optical pickup 2 and feeding, focusing and tracking the optical pickup 2; a head amplifier 4 for amplifying the output of the optical pickup 2; a signal processing circuit 5 for processing an output signal of the optical pickup 2; 3, a servo processing circuit 6 for feeding, focusing and tracking of the optical pickup 2, a shock proof control circuit 7 for preventing skipping of reproduced sound, a memory 8 for storing information signals, and a normal speed from the memory 8. D / A converter 10 for converting the information signal read out in step 1 into an analog signal
And a system control circuit 9 for controlling each part of the apparatus based on an instruction input to the key 13, and a display unit 12 for displaying necessary information.

The servo processing circuit 6, as shown in FIG.
V with a variable range centered at 16.9344 MHz
CO25 and two frequency dividers 26 and 27 for dividing the output of the VCO by 2
A switch 28 for selecting the output of the frequency divider 26 or the frequency divider 27 according to the double speed setting signal; and a phase for detecting a phase difference between the output of the switch 28 and the edge detection signal of the reproduced waveform from the disk. A comparator 29, a PLLF terminal 30 for outputting a phase difference detected by the phase comparator 29, a frequency divider 21 for dividing the oscillation frequency of the original oscillation of 16.9344 MHz to 1/4000, and a system control circuit 9. The oscillation frequency of the VCO 25 is reduced to 1 / (100
0 ± α) × 4, and a phase comparator 22 that compares the phases of the outputs of the frequency divider 21 and the frequency divider 23 and outputs the phase difference to the VCO 25. I have.

Among them, the frequency divider 26, the frequency divider 27, the switch 28 and the phase comparator 29 constitute a disk rotation switching mechanism for generating standard and double speed disk rotation speeds from the output of the VCO 25. The PLL including the frequency divider 21, the frequency divider 23, the phase comparator 22, and the VCO 25 constitutes a variable rotation frequency control mechanism 14 for controlling the disk rotation near the standard speed.

The configurations of the signal processing circuit 5 and the shock proof control circuit 7 are the same as those of the conventional one (FIGS. 7 and 8), and the operations are the same.

In this disk reproducing apparatus, the disk 1 is initially rotated at double speed, and data read from the disk 1 at double speed is stored in the memory 8. The data stored in the memory 8 is read at a standard speed for normal reproduction, and is converted into analog data by the D / A converter 10.

When the disk 1 is rotated at double speed, the system control circuit 9 sets 0 (α = 0) as a variable pitch in the frequency divider 23 of the servo processing circuit 6, and , A double speed setting signal is sent to select the output of the frequency divider 26.

The PLL composed of the original oscillation and frequency dividers 21 and 23, the phase comparator 22, and the VCO 25 has the same frequency division number as the frequency divider 21 and the frequency divider 23. Is controlled to 16.9344 MHz which is the same as the original oscillation. The output of the VCO 25 is frequency-divided by a frequency divider 26 and then input to a phase comparator 29 via a switch 28.

The phase comparator 29 compares the phase of the output of the frequency divider 26 with the edge signal of the reproduced waveform reproduced from the disk 1, and outputs the phase difference. The output of the phase comparator 29 is sent to the drive circuit 11 through the PLLF terminal 30, and the spindle motor is driven in a direction to reduce the phase difference detected by the phase comparator 29, so that the rotation of the disk converges to double speed.

When data read at double speed from disk 1 is stored in memory 8 while data is read from memory 8 at standard speed, the amount of data stored in memory 8 increases and the memory becomes full.

When the data amount detector 56 of the shock proof control circuit 7 detects that the memory 8 is full,
This is communicated to the control unit 60. The control unit 60 stops writing data to the memory 8 and sets the data amount detection unit 56
Is transmitted to the system control circuit 9.

In response to this, the system control circuit 9 sends a double speed setting signal to the switch 28 of the servo processing circuit 6 so as to select the output of the frequency divider 27, and to the frequency divider 23. Sets + α as a variable pitch. Further, an access position for connecting the optical pickup 2 to the servo processing circuit 6 for sound connection, that is, an effective address latch
A command is issued to 55 to re-access from a position slightly before the point of the last sent WAQV, and a command for data comparison connection for sound connection is issued to the shock proof control circuit 7.

Original oscillation, frequency divider 21, phase comparator 22, VCO
25 and a frequency divider 23, the frequency divider 21
The original oscillation of 6.9344 MHz is divided by 1/4000,
The frequency divider 23 reduces the oscillation frequency of the VCO 25 to 1 / (1000+
α) × 4. The outputs of the frequency divider 21 and the frequency divider 23 are input to a phase comparator 22, and the phase comparator 22 feeds back the phase difference to the VCO 25, and the VCO 25 outputs an oscillation frequency according to the phase difference.

With this loop, the oscillation frequency of the VCO 25 converges to a frequency slightly higher than 16.9344 MHz. At this time, the difference from the oscillation frequency of 16.9344 MHz is determined by the magnitude of α.
Whether it is higher or lower than z is determined by the sign of α. As α, a value within a range in which the VCO 25 can perform the following operation is used. By changing this α, the disk rotation can be changed from 1.13 to 0.1 while the PLL lock is maintained.
It can be changed to about 87 times speed.

The output of the VCO 25 is frequency-divided by a frequency divider 26 and further frequency-divided by a frequency divider 27, and then input to a phase comparator 29 via a switch 28.

The phase comparator 29 compares the phase of the output of the frequency divider 27 with the edge signal of the reproduced waveform reproduced from the disk 1 and outputs the phase difference. The output of the phase comparator 29 is sent to the drive circuit 11 through the PLLF terminal 30, and the spindle motor is driven in a direction to reduce the phase difference detected by the phase comparator 29, and the disk rotates at a speed slightly higher than the standard speed. (For example, 1.1 times speed).

After moving the optical pickup 2 to the re-access position of the disk 1 according to the command, the servo processing circuit 6 resumes reading the recorded information. On the other hand, the shock proof control circuit 7 compares the input data with the six words corresponding to the VWA according to the instruction of the system control circuit 9, and when they completely match, restarts the data storage in the memory 8. I do. This sound connection operation is the same as the operation described in the conventional example.

During this sound connection, data is read from the memory 8 at a standard speed. Even if the disk rotation is set slightly faster than the standard speed, data storage is interrupted due to sound connection, so that the data storage amount in the memory 8 temporarily decreases. Thereafter, when the sound connection is successful and the data storage is resumed, the data storage speed is slightly higher than the data read speed, and the data storage amount of the memory 8 gradually increases.

When the amount of data stored in the memory 8 becomes full,
The data amount detection unit 56 of the shock proof control circuit 7 detects this and transmits it to the control unit 60, and the control unit 60 transmits it to the system control circuit 9. In response to this, the system control circuit 9 sets α = 0 as a variable pitch in the frequency divider 23 of the servo processing circuit 6.

Therefore, the PLL composed of the original oscillation, frequency dividers 21 and 23, phase comparator 22, and VCO 25 controls the oscillation frequency of VCO 25 to 16.9344 MHz, which is the same as the original oscillation, and outputs the output of VCO 25 for 4 minutes. The circulated frequency is input to the phase comparator 29, and the disk rotation is adjusted to the standard speed.

The change in the disk rotation speed at this time is slight, and the allowable range of the PLL and the jitter absorbing RAM shown in FIG.
Since it does not exceed the permissible range of 42, skipping does not occur even if reading from the disc is continued. For this reason, no sound connection is required. As the disk rotation becomes the standard speed, the amount of data input to the memory 8 and the amount of data read from the memory 8 become equal, and the amount of data stored in the memory 8 changes to a full state unless skipping occurs. Will be maintained.

FIG. 3 shows how the amount of data stored in the memory 8 of this device changes with time.

When a shock is applied to the disc reproducing apparatus and a sound skip occurs, the system control circuit 9 detects the sound skip based on the discontinuity of the subcode, the jitter absorption NG signal, and the abnormality detection signal from the servo processing circuit 6. I do. The system control circuit 9 which has detected the sound skipping is provided with a switch 28 of the servo processing circuit 6.
, A double speed setting signal is sent to select the output of the frequency divider 26, and the variable pitch
= 0 is set. Further, for the servo processing circuit 6,
The optical pickup 2 is instructed to access the position slightly before the sound skipping position, and to the shock proof control circuit 7,
Command data comparison connection for sound connection.

In accordance with this command, the rotation of the disk is switched to double speed, and after sound connection is performed, data read from this disk is stored in the memory 8 at double speed. When the data storage amount becomes full, the disk rotation is controlled to a speed slightly higher than the standard speed by the same procedure as above, and after performing the sound connection, the data read from the disk is slightly higher than the standard speed. It is stored in the memory 8. When the amount of data stored in the memory 8 becomes full again, the disk rotation is controlled to the standard speed, and the speed of data storage in the memory 8 is maintained at the same standard speed as the speed of reading data from the memory 8.

FIG. 3 also shows the time change of the data storage amount when a disturbance occurs in this apparatus.

As described above, in this disk reproducing apparatus,
Since the disk rotation speed can be reduced to the standard speed, the load on the spindle motor can be reduced, and the current consumption can be halved. Further, since the number of sound connection processes can be reduced, the software load is reduced, and the number of sound connection errors is also reduced. And the current consumption of the traverse motor can be reduced. Further, since the memory capacity can be used efficiently, a large-capacity memory is not required, and the size and cost of the device can be reduced.

It is desirable that the memory upper limit level is set slightly lower than the maximum data storage amount of the memory in consideration of the time lag of switching the disk rotational speed.

(Second Embodiment) In the second embodiment,
A description will be given of a shock proof control applicable to a jitter-free (linear velocity servo etc.) mode.

The jitter free mode is a mode in which data processing is performed in synchronization with the number of rotations of the disk. By using this function, data can be read after the access operation and before the disk rotation converges to a specified value. This makes it possible to shorten the access time.

However, in the jitter free mode, the data amount per unit time read from the rotating disk and input to the shockproof control circuit 7 via the signal processing circuit 5 is not constant. Therefore, when the shock proof control of the first embodiment is performed, even if the disk rotation is maintained at 1 × speed in a state where the memory storage amount is full (a state where the memory upper limit level is reached), 8 may exceed the data amount read for reproduction and exceed the memory upper limit level.

Therefore, in the disk reproducing method of the second embodiment, as shown in FIG. 4, the disk rotation is always performed within the variable speed range so as to be able to cope with the jitter free mode as well as the normal mode. Controlling. Note that the hardware configuration of the disc reproducing apparatus is the same as that of the first embodiment.

The system control circuit 9 of this device initially
The disk 1 is rotated at double speed, and after the memory storage amount reaches the memory upper limit level, the disk rotation is reduced to a speed slightly higher than the standard speed (for example, 1.1 times speed), and a sound connection command is issued. When the sound connection is successful and the data storage is restarted, the data storage amount of the memory 8 gradually increases. The operation up to this point is the same as in the first embodiment.

When the data storage amount of the memory 8 becomes full,
The data amount detection unit 56 of the shock proof control circuit 7 detects it and transmits it to the control unit 60. The control unit 60 transmits it to the system control circuit 9, and the system control circuit 9 divides the frequency of the servo processing circuit 6. -Α is sent to the device 23 as a variable pitch.

Original oscillation, frequency divider 21, phase comparator 22, VCO
The PLL consisting of the frequency divider 25 and the frequency divider 23 controls the oscillation frequency of the VCO 25 to a frequency slightly lower than the original oscillation frequency of 16.9344 MHz, so that the disk rotation is slightly lower than the standard speed (for example, 0.99 times speed). ). At this time, the change in the disk rotation speed is slight,
Since the allowable range of L and the allowable range of the jitter absorption RAM 42 are not exceeded, skipping of sound does not occur even when reading from the disk is continued, and no sound connection is required.

Since the disk rotation is slightly slower than the standard speed, the amount of data stored in the memory 8 gradually decreases. When the data storage amount reaches the lower limit level of the variable speed range, the data amount detection unit 56 of the shock proof control circuit 7 detects it and transmits it to the control unit 60, and the control unit 60 transmits it to the system control circuit 9. , The system control circuit 9 includes the servo processing circuit 6
+ Α is sent to the frequency divider 23 as a variable pitch. In response to this, the original oscillation, frequency divider 21, phase comparator 22, VCO 25
And the frequency divider 23 controls the oscillation frequency of the VCO 25 to a frequency slightly higher than 16.9344 MHz of the original oscillation, so that the disk rotation is slightly faster than the standard speed (for example, 1.01 times speed). To converge. At this time, the change in the disk rotation speed is also slight, and the PLL shown in FIG.
Does not exceed the allowable range of the jitter absorption RAM 42, no sound skipping occurs even when reading from the disk is continued, and no sound connection is required.

As a result of this repetition, the amount of data stored in the memory 8 increases and decreases between the variable speed ranges unless sound skipping occurs.

When a sound skip occurs, the system control circuit 9
Instructs the servo processing circuit 6 to switch the disk rotation to double speed, and to move the access position of the optical pickup 2 to a position for performing sound connection. A data comparison connection command for sound connection is sent to the control circuit 7.

When the data reading at the double speed causes the data storage amount to become full, the procedure for controlling the disk rotation within the variable speed range is performed as before.

As described above, in this disk reproducing apparatus,
When the data storage amount becomes full, the data storage amount is controlled so as to gradually decrease, so even if the data input amount to the memory per unit time fluctuates, the data storage amount exceeds the memory upper limit level. Can be prevented.
Therefore, this device is not applied to the normal mode,
It can be applied to the jitter free mode.

It is desirable that the memory upper limit level is set slightly lower than the maximum data storage amount of the memory in consideration of the time lag for switching the disk rotational speed.

(Third Embodiment) In the third embodiment,
Next, a description will be given of the shock-proof control in the jitter-free mode, which can further reduce the number of times of sound connection. The hardware configuration of the disc reproducing apparatus that performs this control is the same as that of the first embodiment.

In the disk reproduction for performing this control, FIG.
As shown in (1), initially, the disk 1 is rotated at double speed to read data from the disk 1, and the read data is stored in the memory 8. When the memory storage amount reaches the memory lower limit level, the rotation of the disk is gradually reduced to the standard speed while reading data from the disk 1 is continued. In this deceleration from the double speed, the absolute value of -α to be given to the frequency divider 23 is gradually increased from 0 while the selection of the switch 28 of the servo processing circuit 6 is fixed. At this time, the change in the disk rotation speed is slight and does not exceed the allowable range of the PLL and the jitter absorption RAM 42 shown in FIG. 2. No bridging measures are required.

After the disk rotation speed converges to the standard speed in this way, the state is maintained, or the disk rotation speed is controlled within a variable speed range as in the second embodiment.

When a sound skip occurs due to a disturbance, the data reading from the disk 1 is stopped, the absolute value of the α applied to the frequency divider 23 of the servo processing circuit 6 is set to 0, the disk rotation speed is doubled, and the sound is skipped. Perform connection processing. When the sound connection is successful, data reading from the disk 1 rotating at twice the speed is resumed, and when the amount of stored memory reaches the lower limit of the memory, the disk rotation is gradually standardized while continuing data reading as before. Slow down to speed.

As described above, in this disk reproducing method,
The processing of sound connection can be limited to only when a disturbance occurs, and the number of times of sound connection can be reduced.

Even in this case, it is desirable to set the upper limit level of the memory slightly lower than the maximum data storage amount of the memory in consideration of the time lag of switching the disk rotational speed.

[0098]

As is clear from the above description, the disk reproducing method of the present invention can reduce the power consumption as compared with the conventional reproducing method in which the disk is always rotated at twice the speed.

Further, in the reproducing method of the present invention, since the disk rotation is variably controlled near the standard speed, the capacity of the memory is reduced as compared with the conventional reproducing method in which the disk rotation is switched to double speed or standard speed. It becomes possible to use it efficiently.

The disc reproducing method for controlling the disc rotation within a variable speed range can be applied to a jitter-free mode.

Further, in the disk reproducing method in which the disk rotation is gradually switched from the double speed to the standard speed, the number of times of sound connection can be reduced, and the load on the shockproof control circuit can be further reduced.

Since the disk reproducing apparatus of the present invention requires less power consumption, the battery life can be greatly extended in the case of a portable type apparatus. Further, since the disk rotation speed can be reduced, the motor wear is reduced, and the life of the motor can be extended to about twice. Further, it is possible to use a low-cost brush motor or the like.

Further, in this disk reproducing apparatus, since a memory can be used efficiently, a large-capacity memory is not required. Therefore, the size and cost of the device can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a disc reproducing apparatus according to an embodiment of the present invention;

FIG. 2 is a circuit diagram of a rotation frequency variable control unit of a servo processing circuit in the disk reproducing apparatus according to the embodiment;

FIG. 3 is a diagram showing a change in a memory storage amount in the disk reproducing method according to the first embodiment;

FIG. 4 is a diagram showing a change in a memory storage amount in a disk reproducing method according to a second embodiment;

FIG. 5 is a diagram showing a change in a memory storage amount in a disk reproducing method according to a third embodiment;

FIG. 6 is a block diagram showing a configuration of a conventional disk reproducing apparatus.

FIG. 7 is a block diagram showing a configuration of a signal processing circuit in a conventional disk reproducing apparatus.

FIG. 8 is a block diagram showing a configuration of a shock proof control circuit in a conventional disk reproducing apparatus.

FIG. 9 shows a frame format of a signal of the CD system (a).
And the format (b) of the subcode block,

FIG. 10 is a diagram showing a relationship between addresses of a memory;

FIG. 11 illustrates a data comparison connection operation;

FIG. 12 is a diagram showing a change in a memory storage amount in a conventional disk reproducing method;

FIG. 13 is a diagram showing a change in a memory storage amount in another conventional disk reproducing method.

[Explanation of symbols]

 Reference Signs List 1 disc 2 optical pickup 3 spindle motor 4 head amplifier 5 signal processing circuit 6 servo processing circuit 7 shock proof control circuit 8 memory 9 system control circuit 10 D / A converter 11 drive circuit 12 display unit 13 key 14 rotation frequency variable control unit 21, 23 Divider 22, 29 Phase comparator 25 VCO 26, 27 1/2 divider 28 Switch 30 PLLF terminal 41 Error correction unit 42 Jitter absorption RAM 43 Data demodulation unit 44 Subcode extraction unit 51 Memory controller 52 Write address latch 53 Write address generator 54 Read address generator 55 Effective address latch 56 Data amount detector 57 Serial / parallel converter 58 Parallel / serial converter 59 Data match detector 60 Controller

Claims (5)

[Claims] 1. A memory for writing digital data read from a disk, reading means for reading and writing the data written in the memory in order from an oldest one at a constant reading speed, and when detecting an abnormality in the digital data. A data correction means for returning to the disk position before the occurrence of the abnormality and rewriting the data while maintaining the continuity of data before the reading of the digital data from the memory by the reading means is completed. The reproducing apparatus further comprises: a disk rotation switching unit configured to switch a disk rotation speed to the reading speed or an integer multiple thereof, and a disk rotation variable control unit configured to variably control the disk rotation speed near the reading speed. Disk playback device. 2. The disk rotation variable control means includes
O, a first frequency dividing means for dividing the output frequency of the VCO, a second frequency dividing means for dividing the frequency of the original oscillation, and an output level of the first frequency dividing means and the second frequency dividing means. The phase difference
And a phase comparison means for outputting the signal to the O. The frequency division ratio of the first frequency division means is slightly different from the frequency division ratio of the second frequency division means. 2. The disc reproducing apparatus according to claim 1, wherein the disc rotation speed is variably controlled in the vicinity of the readout speed. 3. The digital data read from a disk is written into a memory, and the data written into the memory is read out at a constant read speed from the oldest one at a constant reading speed. When an abnormality of the digital data is detected, the digital data is stored in the memory. Before reading from
A disk reproducing method for returning to a disk position before the occurrence of an abnormality and rewriting data to the memory while securing data continuity, wherein the digital data is read from the disk at a high speed so that the amount of data stored in the memory reaches an upper limit level. When the disk speed reaches the read speed, the disk rotation speed is slightly increased from the read speed. In this state, the continuity between the valid data written in the memory and the data to be read from the disk is ensured, and the data is read from the memory again. A disk reproducing method, comprising: performing writing, and when the data storage amount of the memory reaches an upper limit level by the rewriting, setting a disk rotation speed to the reading speed. 4. A digital data read from a disk is written in a memory, and the data written in the memory is read out at a constant read speed in an order from the oldest one. When an abnormality of the digital data is detected, the digital data is stored in the memory. Before reading from
A disk reproducing method for returning to a disk position before the occurrence of an abnormality and performing rewriting to the memory while securing data continuity, wherein the digital data is read from the disk at a high speed so that the amount of data stored in the memory reaches an upper limit level. When the disk speed reaches the read speed, the disk rotation speed is slightly increased from the read speed. In this state, the continuity between the valid data written in the memory and the data to be read from the disk is ensured, and the data is read from the memory again. Writing is performed, and after this rewriting, every time the data accumulation amount of the memory reaches the upper limit level, the disk rotation speed is slightly slowed down from the read speed, and each time the data accumulation amount of the memory reaches the lower limit level of the predetermined range. A disk rotating speed slightly higher than the reading speed; Disc playback method. 5. A digital data read from a disk is written to a memory, and the data written to the memory is read out at a constant read speed from an oldest one at a constant reading speed, and when an abnormality of the digital data is detected, the digital data is stored in the memory. Before reading from
A disk reproducing method for returning to a disk position before occurrence of an abnormality and rewriting data to the memory while ensuring data continuity, wherein digital data is read from the disk at high speed so that the amount of data stored in the memory is at a lower level. A disk reproducing method characterized by gradually decreasing the disk rotation speed while continuing to read data from the disk and converging to the read speed when the data reading is reached.