JPH10303736A - 異なるしきい電圧のｍｏｓｆｅｔで形成した論理回路 - Google Patents

異なるしきい電圧のｍｏｓｆｅｔで形成した論理回路

Info

Publication number
JPH10303736A
JPH10303736A JP10084477A JP8447798A JPH10303736A JP H10303736 A JPH10303736 A JP H10303736A JP 10084477 A JP10084477 A JP 10084477A JP 8447798 A JP8447798 A JP 8447798A JP H10303736 A JPH10303736 A JP H10303736A
Authority
JP
Japan
Prior art keywords
transistor
channel
threshold voltage
pull
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10084477A
Other languages
English (en)
Japanese (ja)
Other versions
JPH10303736A5 (2
Inventor
M Hill Anthony
エム．ヒル アンソニー
Uming Ko
コ ウミング
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of JPH10303736A publication Critical patent/JPH10303736A/ja
Publication of JPH10303736A5 publication Critical patent/JPH10303736A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/09425—Multistate logic
    • H03K19/09429—Multistate logic one of the states being the high impedance or floating state
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals
    • H03K19/0963—Synchronous circuits, i.e. using clock signals using transistors of complementary type
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1738—Controllable logic circuits using cascode switch logic [CSL] or cascode emitter coupled logic [CECL]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
JP10084477A 1997-03-31 1998-03-30 異なるしきい電圧のｍｏｓｆｅｔで形成した論理回路 Pending JPH10303736A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US4289497P 1997-03-31 1997-03-31
US042894 1997-03-31

Publications (2)

Publication Number Publication Date
JPH10303736A true JPH10303736A (ja) 1998-11-13
JPH10303736A5 JPH10303736A5 (2) 2005-10-27

Family

ID=21924300

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10084477A Pending JPH10303736A (ja) 1997-03-31 1998-03-30 異なるしきい電圧のｍｏｓｆｅｔで形成した論理回路

Country Status (2)

Country Link
US (1) US6133762A (2)
JP (1) JPH10303736A (2)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002374159A (ja) * 2001-06-12 2002-12-26 Fujitsu Ltd 出力回路
JP2003518799A (ja) * 1999-12-22 2003-06-10 テレフオンアクチーボラゲット エル エム エリクソン（パブル） 小さな高調波成分を有する低電力信号ドライバ
JP2006279315A (ja) * 2005-03-28 2006-10-12 Sanyo Electric Co Ltd チョッパ型コンパレータ
JP2011526091A (ja) * 2008-04-29 2011-09-29 クゥアルコム・インコーポレイテッド クロック・ゲーティング・システム及び方法
CN114221660A (zh) * 2021-11-18 2022-03-22 清华大学 基于双极型场效应晶体管的阈值反相器及其量化方法

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6037808A (en) * 1997-12-24 2000-03-14 Texas Instruments Incorporated Differential SOI amplifiers having tied floating body connections
JP2002064150A (ja) * 2000-06-05 2002-02-28 Mitsubishi Electric Corp 半導体装置
US6369606B1 (en) * 2000-09-27 2002-04-09 International Business Machines Corporation Mixed threshold voltage CMOS logic device and method of manufacture therefor
US6583001B1 (en) 2001-05-18 2003-06-24 Sun Microsystems, Inc. Method for introducing an equivalent RC circuit in a MOS device using resistive paths
US6586817B1 (en) 2001-05-18 2003-07-01 Sun Microsystems, Inc. Device including a resistive path to introduce an equivalent RC circuit
US6624665B2 (en) * 2001-05-21 2003-09-23 The Board Of Trustees Of The University Of Illinois CMOS skewed static logic and method of synthesis
US6624687B1 (en) * 2001-05-31 2003-09-23 Sun Microsystems, Inc. Method and structure for supply gated electronic components
US6489224B1 (en) 2001-05-31 2002-12-03 Sun Microsystems, Inc. Method for engineering the threshold voltage of a device using buried wells
US6552601B1 (en) * 2001-05-31 2003-04-22 Sun Microsystems, Inc. Method for supply gating low power electronic devices
US6489804B1 (en) 2001-06-01 2002-12-03 Sun Microsystems, Inc. Method for coupling logic blocks using low threshold pass transistors
US6501295B1 (en) 2001-06-01 2002-12-31 Sun Microsystems, Inc. Overdriven pass transistors
US6605971B1 (en) 2001-06-01 2003-08-12 Sun Microsystems, Inc. Low voltage latch
US6472919B1 (en) 2001-06-01 2002-10-29 Sun Microsystems, Inc. Low voltage latch with uniform stack height
US6621318B1 (en) 2001-06-01 2003-09-16 Sun Microsystems, Inc. Low voltage latch with uniform sizing
US6700407B1 (en) * 2001-12-04 2004-03-02 National Semiconductor Corporation Extended voltage range level shifter
US6849492B2 (en) 2002-07-08 2005-02-01 Micron Technology, Inc. Method for forming standard voltage threshold and low voltage threshold MOSFET devices
US6850103B2 (en) * 2002-09-27 2005-02-01 Texas Instruments Incorporated Low leakage single-step latch circuit
US8339447B2 (en) * 2004-10-21 2012-12-25 Truevision Systems, Inc. Stereoscopic electronic microscope workstation
JP4291295B2 (ja) * 2005-04-08 2009-07-08 エルピーダメモリ株式会社 論理回路
US8358330B2 (en) * 2005-10-21 2013-01-22 True Vision Systems, Inc. Stereoscopic electronic microscope workstation
US20070188603A1 (en) * 2005-10-21 2007-08-16 Riederer Thomas P Stereoscopic display cart and system
JP4804926B2 (ja) * 2006-01-12 2011-11-02 富士通セミコンダクター株式会社 半導体集積回路
US9168173B2 (en) 2008-04-04 2015-10-27 Truevision Systems, Inc. Apparatus and methods for performing enhanced visually directed procedures under low ambient light conditions
US9226798B2 (en) 2008-10-10 2016-01-05 Truevision Systems, Inc. Real-time surgical reference indicium apparatus and methods for surgical applications
US10117721B2 (en) 2008-10-10 2018-11-06 Truevision Systems, Inc. Real-time surgical reference guides and methods for surgical applications
US9173717B2 (en) * 2009-02-20 2015-11-03 Truevision Systems, Inc. Real-time surgical reference indicium apparatus and methods for intraocular lens implantation
US8784443B2 (en) 2009-10-20 2014-07-22 Truevision Systems, Inc. Real-time surgical reference indicium apparatus and methods for astigmatism correction
US20110213342A1 (en) * 2010-02-26 2011-09-01 Ashok Burton Tripathi Real-time Virtual Indicium Apparatus and Methods for Guiding an Implant into an Eye
WO2014036499A1 (en) 2012-08-30 2014-03-06 Truevision Systems, Inc. Imaging system and methods displaying a fused multidimensional reconstructed image
US11115022B2 (en) * 2015-05-07 2021-09-07 Northwestern University System and method for integrated circuit usage tracking circuit with fast tracking time for hardware security and re-configurability
US9953687B1 (en) 2016-10-21 2018-04-24 Advanced Micro Devices, Inc. Pseudo-dynamic circuit for multi-voltage timing interlocks
US10049726B1 (en) 2017-02-03 2018-08-14 Advanced Micro Devices, Inc. Contention-free dynamic logic
US20180226968A1 (en) * 2017-02-05 2018-08-09 Advanced Micro Devices, Inc. Contention-Free Dynamic Logic
US10299880B2 (en) 2017-04-24 2019-05-28 Truevision Systems, Inc. Stereoscopic visualization camera and platform
US11083537B2 (en) 2017-04-24 2021-08-10 Alcon Inc. Stereoscopic camera with fluorescence visualization
US10917543B2 (en) 2017-04-24 2021-02-09 Alcon Inc. Stereoscopic visualization camera and integrated robotics platform
US10848153B2 (en) * 2018-11-30 2020-11-24 Micron Technology, Inc. Leakage current reduction in electronic devices
US12438546B1 (en) * 2023-06-13 2025-10-07 Synopsys, Inc. Driver/inverter using lower voltage tolerant devices

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003518799A (ja) * 1999-12-22 2003-06-10 テレフオンアクチーボラゲット エル エム エリクソン（パブル） 小さな高調波成分を有する低電力信号ドライバ
JP4819275B2 (ja) * 1999-12-22 2011-11-24 テレフオンアクチーボラゲット エル エム エリクソン（パブル） 小さな高調波成分を有する低電力信号ドライバ
JP2002374159A (ja) * 2001-06-12 2002-12-26 Fujitsu Ltd 出力回路
JP2006279315A (ja) * 2005-03-28 2006-10-12 Sanyo Electric Co Ltd チョッパ型コンパレータ
JP2011526091A (ja) * 2008-04-29 2011-09-29 クゥアルコム・インコーポレイテッド クロック・ゲーティング・システム及び方法
CN114221660A (zh) * 2021-11-18 2022-03-22 清华大学 基于双极型场效应晶体管的阈值反相器及其量化方法

Also Published As

Publication number Publication date
US6133762A (en) 2000-10-17

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