JPH10303736A5 - - Google Patents

Info

Publication number
JPH10303736A5
JPH10303736A5 JP1998084477A JP8447798A JPH10303736A5 JP H10303736 A5 JPH10303736 A5 JP H10303736A5 JP 1998084477 A JP1998084477 A JP 1998084477A JP 8447798 A JP8447798 A JP 8447798A JP H10303736 A5 JPH10303736 A5 JP H10303736A5
Authority
JP
Japan
Prior art keywords
pull
channel transistor
source
intermediate node
series connection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1998084477A
Other languages
English (en)
Japanese (ja)
Other versions
JPH10303736A (ja
Filing date
Publication date
Application filed filed Critical
Publication of JPH10303736A publication Critical patent/JPH10303736A/ja
Publication of JPH10303736A5 publication Critical patent/JPH10303736A5/ja
Pending legal-status Critical Current

Links

JP10084477A 1997-03-31 1998-03-30 異なるしきい電圧のmosfetで形成した論理回路 Pending JPH10303736A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US4289497P 1997-03-31 1997-03-31
US042894 1997-03-31

Publications (2)

Publication Number Publication Date
JPH10303736A JPH10303736A (ja) 1998-11-13
JPH10303736A5 true JPH10303736A5 (2) 2005-10-27

Family

ID=21924300

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10084477A Pending JPH10303736A (ja) 1997-03-31 1998-03-30 異なるしきい電圧のmosfetで形成した論理回路

Country Status (2)

Country Link
US (1) US6133762A (2)
JP (1) JPH10303736A (2)

Families Citing this family (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6037808A (en) * 1997-12-24 2000-03-14 Texas Instruments Incorporated Differential SOI amplifiers having tied floating body connections
AU2511501A (en) * 1999-12-22 2001-07-03 Telefonaktiebolaget Lm Ericsson (Publ) Low-power signal driver with low harmonic content
JP2002064150A (ja) * 2000-06-05 2002-02-28 Mitsubishi Electric Corp 半導体装置
US6369606B1 (en) * 2000-09-27 2002-04-09 International Business Machines Corporation Mixed threshold voltage CMOS logic device and method of manufacture therefor
US6583001B1 (en) 2001-05-18 2003-06-24 Sun Microsystems, Inc. Method for introducing an equivalent RC circuit in a MOS device using resistive paths
US6586817B1 (en) 2001-05-18 2003-07-01 Sun Microsystems, Inc. Device including a resistive path to introduce an equivalent RC circuit
US6624665B2 (en) * 2001-05-21 2003-09-23 The Board Of Trustees Of The University Of Illinois CMOS skewed static logic and method of synthesis
US6624687B1 (en) * 2001-05-31 2003-09-23 Sun Microsystems, Inc. Method and structure for supply gated electronic components
US6489224B1 (en) 2001-05-31 2002-12-03 Sun Microsystems, Inc. Method for engineering the threshold voltage of a device using buried wells
US6552601B1 (en) * 2001-05-31 2003-04-22 Sun Microsystems, Inc. Method for supply gating low power electronic devices
US6489804B1 (en) 2001-06-01 2002-12-03 Sun Microsystems, Inc. Method for coupling logic blocks using low threshold pass transistors
US6501295B1 (en) 2001-06-01 2002-12-31 Sun Microsystems, Inc. Overdriven pass transistors
US6605971B1 (en) 2001-06-01 2003-08-12 Sun Microsystems, Inc. Low voltage latch
US6472919B1 (en) 2001-06-01 2002-10-29 Sun Microsystems, Inc. Low voltage latch with uniform stack height
US6621318B1 (en) 2001-06-01 2003-09-16 Sun Microsystems, Inc. Low voltage latch with uniform sizing
JP4649064B2 (ja) * 2001-06-12 2011-03-09 富士通セミコンダクター株式会社 出力回路
US6700407B1 (en) * 2001-12-04 2004-03-02 National Semiconductor Corporation Extended voltage range level shifter
US6849492B2 (en) 2002-07-08 2005-02-01 Micron Technology, Inc. Method for forming standard voltage threshold and low voltage threshold MOSFET devices
US6850103B2 (en) * 2002-09-27 2005-02-01 Texas Instruments Incorporated Low leakage single-step latch circuit
US8339447B2 (en) * 2004-10-21 2012-12-25 Truevision Systems, Inc. Stereoscopic electronic microscope workstation
JP2006279315A (ja) * 2005-03-28 2006-10-12 Sanyo Electric Co Ltd チョッパ型コンパレータ
JP4291295B2 (ja) * 2005-04-08 2009-07-08 エルピーダメモリ株式会社 論理回路
US8358330B2 (en) * 2005-10-21 2013-01-22 True Vision Systems, Inc. Stereoscopic electronic microscope workstation
US20070188603A1 (en) * 2005-10-21 2007-08-16 Riederer Thomas P Stereoscopic display cart and system
JP4804926B2 (ja) * 2006-01-12 2011-11-02 富士通セミコンダクター株式会社 半導体集積回路
US9168173B2 (en) 2008-04-04 2015-10-27 Truevision Systems, Inc. Apparatus and methods for performing enhanced visually directed procedures under low ambient light conditions
US7902878B2 (en) * 2008-04-29 2011-03-08 Qualcomm Incorporated Clock gating system and method
US9226798B2 (en) 2008-10-10 2016-01-05 Truevision Systems, Inc. Real-time surgical reference indicium apparatus and methods for surgical applications
US10117721B2 (en) 2008-10-10 2018-11-06 Truevision Systems, Inc. Real-time surgical reference guides and methods for surgical applications
US9173717B2 (en) * 2009-02-20 2015-11-03 Truevision Systems, Inc. Real-time surgical reference indicium apparatus and methods for intraocular lens implantation
US8784443B2 (en) 2009-10-20 2014-07-22 Truevision Systems, Inc. Real-time surgical reference indicium apparatus and methods for astigmatism correction
US20110213342A1 (en) * 2010-02-26 2011-09-01 Ashok Burton Tripathi Real-time Virtual Indicium Apparatus and Methods for Guiding an Implant into an Eye
WO2014036499A1 (en) 2012-08-30 2014-03-06 Truevision Systems, Inc. Imaging system and methods displaying a fused multidimensional reconstructed image
US11115022B2 (en) * 2015-05-07 2021-09-07 Northwestern University System and method for integrated circuit usage tracking circuit with fast tracking time for hardware security and re-configurability
US9953687B1 (en) 2016-10-21 2018-04-24 Advanced Micro Devices, Inc. Pseudo-dynamic circuit for multi-voltage timing interlocks
US10049726B1 (en) 2017-02-03 2018-08-14 Advanced Micro Devices, Inc. Contention-free dynamic logic
US20180226968A1 (en) * 2017-02-05 2018-08-09 Advanced Micro Devices, Inc. Contention-Free Dynamic Logic
US10299880B2 (en) 2017-04-24 2019-05-28 Truevision Systems, Inc. Stereoscopic visualization camera and platform
US11083537B2 (en) 2017-04-24 2021-08-10 Alcon Inc. Stereoscopic camera with fluorescence visualization
US10917543B2 (en) 2017-04-24 2021-02-09 Alcon Inc. Stereoscopic visualization camera and integrated robotics platform
US10848153B2 (en) * 2018-11-30 2020-11-24 Micron Technology, Inc. Leakage current reduction in electronic devices
CN114221660B (zh) * 2021-11-18 2025-09-05 清华大学 基于双极型场效应晶体管的阈值反相器及其量化方法
US12438546B1 (en) * 2023-06-13 2025-10-07 Synopsys, Inc. Driver/inverter using lower voltage tolerant devices

Similar Documents

Publication Publication Date Title
JPH10303736A5 (2)
US6133762A (en) Family of logic circuits emploting mosfets of differing thershold voltages
US5124579A (en) Cmos output buffer circuit with improved ground bounce
US5982211A (en) Hybrid dual threshold transistor registers
JP4417552B2 (ja) パルス入力用の高速レシオ形cmos論理構造
US5089722A (en) High speed output buffer circuit with overlap current control
US6111425A (en) Very low power logic circuit family with enhanced noise immunity
US6031394A (en) Low voltage CMOS circuit for on/off chip drive at high voltage
US20030122581A1 (en) Semiconductor integrated circuit
US6252425B1 (en) Method and apparatus for an N-NARY logic circuit
JPH0410157B2 (2)
CN1957531B (zh) 先断后通预驱动器
US6373291B1 (en) Pass transistor logic circuit for reducing power consumption
US5886541A (en) Combined logic gate and latch
KR930018855A (ko) 높은 동적 전류 및 낮은 정적 전류용 2중 한계기능을 갖는 "트랜지스터 트랜지스터로직(ttl)-상보형 금속 산화물 반도체(cmos)" 변환 입력 버퍼 회로
WO1998006177A9 (en) Combined logic gate and latch
KR100263785B1 (ko) 상보형 금속 산화막 반도체 회로
US6819141B1 (en) High speed, static digital multiplexer
US5831458A (en) Output circuit having BiNMOS inverters
US5541528A (en) CMOS buffer circuit having increased speed
WO2008014383A1 (en) Junction field effect transistor level shifting circuit
KR960702698A (ko) 전자 회로(CMOS input with Vcc compensated dynamic threshold)
Allam et al. Dynamic current mode logic (DyCML), a new low-power high-performance logic family
Singh et al. Analysis and design guidelines for customized logic families in CMOS
US6124735A (en) Method and apparatus for a N-nary logic circuit using capacitance isolation