JPH10327052A - Duty control circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To precisely control the duty factor of the output signals of an ampli fier circuit to be closer to 50% by forming a feedback loop in a direction for converging an average voltage supplied to the normal input terminal of an amplifier circuit and an intermediate voltage value inputted to an inverted input terminal to the intermediate voltage of an input voltage range. SOLUTION: Signals are inputted from a signal source 1 through a capacitor 101 to the normal input terminal 21 of the amplifier circuit 2 and the DC bias line of the normal input terminal 21 is supplied from the output terminal 32 of an integrator 3 through a resistor 208. The voltage of the DC bias line is prepared from the voltage of the inverted output terminal 24 of the amplifier circuit 2. In the meantime, to the inverted input terminal 23 of the circuit 2, a DC bias for which the voltage sum of the normal output terminal 22 and inverted output terminal 24 of the circuit 2 is divided by the resistors 205 and 206 is supplied. For the inputted signals, in the case that the output signals rise in terms of a DC and the duty factor is changed, since feedback is applied to the normal input terminal 21 of the amplifier circuit 2 so as to match the average DC of normal output and inverted output, the voltage value of output DC is lowered.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a signal processing circuit for controlling a duty ratio of an output signal in a semiconductor integrated circuit.

[0002]

2. Description of the Related Art Conventionally, it is necessary to maintain a high amplification factor and a signal duty ratio of 50% as conditions of an amplifier circuit before demodulating a minute FM signal or the like from an antenna input or the like. Accurately set the signal duty to 5
A duty control circuit has been used to make it 0%.

Hereinafter, a conventional duty control circuit will be described. FIG. 4 shows a circuit diagram of a conventional duty control circuit. In FIG. 4, 1 is a signal source, 2
Is an amplifier circuit, and 3 and 4 are integrators. A capacitor 101 connected in series to the signal source 1;
Amplifying circuit 2 having an input terminal 21 connected in series to 1
And a resistor 2 connected to an input terminal 21 of the amplification circuit 2.
08, a resistor 206 constituting the integrator 4 connected to the non-inverting output terminal 22 of the amplifier circuit 2, a capacitor 103 constituting the integrator 4 connected in series with the resistor 206,
A resistor 207 forming the integrator 3 connected to the inverting output terminal 24 of the amplifier circuit 2; a capacitor 102 forming the integrator 3 connected in series with the resistor 207;
And the resistor 208 connected to the output 32 of the resistor 207.

FIG. 5 shows waveforms at various parts of the conventional example. Next, the operation of the duty control circuit configured as described above will be described below.

The waveform shown in FIG. 5A is input from the signal source 1 to the amplifier circuit 2 through the capacitor 101. At this time, the average DC voltage (FIG. 5E) obtained by passing the signal (FIG. 5C) of the inverting output terminal 24 of the amplifier circuit 2 through the integrator 3 to the input DC bias line 32, A feedback loop is formed. At the same time, the signal at the non-inverting output terminal 22 of the amplifier circuit 2 (FIG.
(B)) through the integrator 4 to obtain an average DC voltage (FIG. 5).
(D)) is input to form a feedback loop. By returning the average DC voltage of the non-inverting and inverting output terminals of the amplifying circuit to the input bias line of the amplifying circuit in this way, for example, the non-inverting output temporarily changes due to variations in circuit elements as shown in FIG. If it rises, its average DC voltage ((d) in FIG. 5)
Is applied to the inverting input terminal of the amplifier circuit and negative feedback is applied. Similarly, the average DC voltage of the inverted output ((e) in FIG. 5) is applied to the non-inverting input terminal of the amplifier circuit and negative feedback is applied. Negative feedback is applied so that the DC voltage at the center of the output amplitude of the inverted output coincides with that of the inverted output, and the duty of the output amplitude can be accurately adjusted to 50%.

[0006]

However, in the above-mentioned conventional configuration, two capacitors are used, one for obtaining the average DC voltage at the non-inverting output terminal and the other for obtaining the average DC voltage at the inverting output terminal. This is necessary, and when it is realized by a semiconductor integrated circuit, two terminals and two external capacitors are required.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a duty control circuit that makes the duty ratio of an output signal of an amplifier circuit closer to 50% with one terminal and one external capacitor more accurately than a conventional circuit. I do.

[0008]

In order to achieve the above object, a solution according to claim 1 of the present invention is to provide a non-inverting input terminal and a non-inverting and inverting output terminal. An amplifier circuit for inputting a signal to the non-inverting and inverting output terminal and extracting an amplified signal to an inverting output terminal; an integrator having an input terminal connected to the inverting output terminal of the amplifying circuit and extracting an integrated signal to an output terminal; Means for connecting the output terminal of the integrator to the non-inverting input terminal, one end of the input terminal pair being connected to the non-inverting output terminal, the other end being connected to the inverting output terminal, and the non-inverting output being connected to the output terminal. An average DC circuit that outputs an intermediate voltage between the voltage of the terminal and the voltage of the inverted output terminal.

With this configuration, the reference voltage of the non-inverting input terminal of the amplifier circuit is given as a voltage obtained by smoothing the signal of the inverting output terminal with an integrator, and the signal is input with this voltage as the average voltage. You. On the other hand, an inverting input terminal of the amplifier circuit is supplied with an intermediate voltage between the voltages of the non-inverting output terminal and the inverting output terminal. Here, since the feedback loop is formed in a direction in which the average voltage applied to the non-inverting input terminal of the amplifier circuit and the intermediate voltage value input to the inverting input terminal converge on the intermediate voltage in the input voltage range, the amplification degree is high. The more the voltage values converge, the more the values converge. Since the operating voltage converges, it is not necessary to apply a smoothed voltage using a capacitor to the inverting input terminal as in the related art. Therefore, the number of pins used in the package of the integrated circuit is reduced by one, and the number of peripheral capacitors is also reduced by one.

According to a second aspect of the present invention, the average DC circuit includes first and second resistors, and one end of the first resistor is connected to one end of a pair of input terminals of the average DC circuit. And one end of a second resistor is connected to the other end of the input terminal pair of the average DC circuit, and a common connection of the first and second resistors is connected to an output terminal of the average DC circuit. It is characterized by having.

With this configuration, the average DC
The voltage at the non-inverting output terminal and the inverting output terminal of the amplifier circuit can be input to both ends of the first and second resistors to extract a divided voltage from the output terminal of the circuit. Input to the inverted input terminal. On the other hand, a voltage obtained by smoothing the signal at the inverting output terminal with an integrator is given to the non-inverting input terminal as an average voltage value, and a signal input from the outside is added to this average voltage value. Here, a feedback loop is formed in a direction in which the average voltage applied to the non-inverting input terminal of the amplifier circuit and the voltage of the divided value input to the inverting input terminal converge to an intermediate voltage in the input voltage range. The higher the degree, the more the respective voltage values converge to the same value. Since the operating voltage converges, it is not necessary to apply a smoothed voltage using a capacitor to the inverting input terminal as in the related art. Therefore, the number of pins used in the package of the integrated circuit is reduced by one, and the number of peripheral capacitors is also reduced by one.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION A DC bias at a non-inverting input terminal is created by an integrated output at an inverting output terminal of an amplifier circuit, and is applied by applying a negative feedback. At the same time, a DC voltage value at a duty of 50% is obtained by dividing the sum of the non-inverted output and the inverted output of the amplifier circuit, and feedback is applied as a DC bias at the inverting input terminal of the amplifier circuit. For example, if the DC voltage at the inverted output terminal rises and the upper side of the signal is clipped and the duty ratio changes, the average DC voltage value also rises,
A high DC voltage is fed back to the inverting input terminal side of the amplifier circuit,
Since the output DC voltage moves in a decreasing direction, feedback is applied so as to match the DC voltage value at the time of a duty of 50% created by dividing the voltage sum of the normal output terminal and the inverted output terminal.
As a result, the duty ratio of the output amplitude can be accurately adjusted to 50%.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram of the first embodiment, in which 1 indicates a signal source, 2 indicates an amplifier circuit, 3 indicates an integrator, 101 indicates a capacitor, 205 and 2
06 and 208 are resistors, 21 is a non-inverting input terminal of an amplifier circuit,
23 is an inverting input terminal of the amplifier circuit, 22 is a non-inverting output terminal of the amplifier circuit, 24 is an inverting output terminal of the amplifier circuit, 31 is an input terminal of the integrator, and 32 is an output terminal of the integrator.

FIG. 2 is a circuit diagram showing the first embodiment. FIG. 3 shows waveforms at various points in the first embodiment.

The duty control circuit according to the present embodiment includes an amplifier circuit 2 for amplifying an input signal, an integrator 3 connected in series with the amplifier circuit, and an output from the integrator as a DC bias of the input signal. , A resistor 206 connected to the non-inverting output of the amplifier circuit, and a resistor 205 connected to the inverted output of the amplifier circuit.

The operation of the duty control circuit configured as described above will be described below.

A signal is input from a signal source 1 to a non-inverting input terminal 21 (FIG. 3A) of an amplifier circuit via a capacitor 101. The DC bias line of the non-inverting input terminal is a resistor 20
The signal is supplied from the output terminal 32 (FIG. 3D) of the integrator via the reference numeral 8. The voltage of the DC bias line is generated from the voltage of the inverting output terminal 24 of the amplifier circuit (FIG. 3C). On the other hand, a DC bias obtained by dividing the sum of the voltages of the non-inverting output terminal 22 and the inverting output terminal 24 of the amplifying circuit 2 by the resistors 205 and 206 (see FIG.
(E)) is provided. The input signal is, for example, when the output signal rises in a DC manner and the duty ratio changes, the non-inverting input terminal of the amplifier circuit matches the average DC of the non-inverting output and the inverting output in FIG. , The output DC voltage value decreases, and as a result, the duty ratio is accurately maintained at 50%.

As described above, conventionally, two integrators are required,
Although two external capacitors were required, the present invention can reduce the number of terminals and the number of external capacitors in a semiconductor integrated circuit because it is composed of one integrator (external capacitor) and two resistors. it can.

[0019]

As described above, according to the present invention, an amplifying circuit for amplifying an input signal, an integrator connected in series with the amplifying circuit, and an integrator output voltage serving as a DC bias of the input signal. By providing a resistor connected to the amplifier circuit, a resistor connected to the non-inverting output of the amplifier circuit, and a resistor connected to the inverted output of the amplifier circuit, the number of terminals in the semiconductor integrated circuit can be reduced and This makes it possible to reduce the number of attached capacitors, and at the same time, to realize a circuit capable of accurately controlling the duty.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a circuit diagram showing one embodiment of FIG. 1;

FIG. 3 is a waveform chart for explaining the operation of each unit in FIG. 1;

FIG. 4 is a circuit diagram showing a conventional embodiment.

5 is a waveform chart showing the operation of each unit in FIG.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 signal source 2 amplifying circuit 3, 4 integrator 21 non-inverting input terminal of amplifying circuit 22 non-inverting output terminal of amplifying circuit 23 inverting input terminal of amplifying circuit 24 inverting output terminal of amplifying circuit 31 Input terminal 32 Output terminal of integrator 3 41 Input terminal of integrator 4 42 Output terminal of integrator 4 101, 102 Capacitor 201 to 208 Resistance 301 to 306 Transistor 401 to 404 Current source

Claims (2)

[Claims] An amplifier circuit having a non-inverting and inverting input terminal and a non-inverting and inverting output terminal for inputting a signal to the non-inverting input terminal and extracting an amplified signal to the non-inverting and inverting output terminal; An integrator having an input terminal connected to the inverting output terminal of the amplifier circuit and extracting an integrated signal at the output terminal; a means for connecting an output terminal of the integrator to the non-inverting input terminal; One end is connected to the non-inverting output terminal, the other end is connected to the inverting output terminal, and the output terminal includes an average DC circuit that outputs an intermediate voltage between the voltage of the non-inverting output terminal and the voltage of the inverting output terminal. Duty control circuit. 2. The averaging DC circuit includes first and second resistors, one end of the first resistor is connected to one end of a pair of input terminals of the averaging DC circuit, and One end is connected to the other end of the input terminal pair of the average DC circuit,
2. The duty control circuit according to claim 1, wherein a common connection of the second resistor is connected to an output terminal of the average DC circuit.