JPH1070001A - Low resistance chip resistor and manufacture thereof - Google Patents
Low resistance chip resistor and manufacture thereofInfo
- Publication number
- JPH1070001A JPH1070001A JP8225545A JP22554596A JPH1070001A JP H1070001 A JPH1070001 A JP H1070001A JP 8225545 A JP8225545 A JP 8225545A JP 22554596 A JP22554596 A JP 22554596A JP H1070001 A JPH1070001 A JP H1070001A
- Authority
- JP
- Japan
- Prior art keywords
- resistance
- film
- chip resistor
- low
- screen printing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
- H01C17/075—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thin-film techniques
- H01C17/14—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thin-film techniques by chemical deposition
- H01C17/18—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thin-film techniques by chemical deposition without using electric current
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C1/00—Details
- H01C1/14—Terminals or tapping points specially adapted for resistors; Arrangements of terminals or tapping points on resistors
- H01C1/142—Terminals or tapping points specially adapted for resistors; Arrangements of terminals or tapping points on resistors the terminals or tapping points being coated on the resistive element
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/006—Apparatus or processes specially adapted for manufacturing resistors adapted for manufacturing resistor chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C17/00—Apparatus or processes specially adapted for manufacturing resistors
- H01C17/06—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base
- H01C17/065—Apparatus or processes specially adapted for manufacturing resistors adapted for coating resistive material on a base by thick film techniques, e.g. serigraphy
- H01C17/06506—Precursor compositions therefor, e.g. pastes, inks, glass frits or green body
- H01C17/06513—Precursor compositions therefor, e.g. pastes, inks, glass frits or green body characterised by the resistive component
- H01C17/06533—Precursor compositions therefor, e.g. pastes, inks, glass frits or green body characterised by the resistive component composed of oxides
- H01C17/0654—Oxides of the platinum group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は低抵抗チップ抵抗器
及びその製造方法、特に過電流を精度良く検出し得る安
価な低抵抗チップ抵抗器及びその低抵抗チップ抵抗器を
簡易に製造し得る製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a low-resistance chip resistor and a method of manufacturing the same, and in particular, an inexpensive low-resistance chip resistor capable of detecting an overcurrent with high accuracy and a method of manufacturing the same easily. About the method.
【０００２】[0002]
【従来の技術】近年、小型電子機器の過電流保護回路に
おいては、絶縁基板上に抵抗部を蒸着法やスパッタ法に
よって形成すると共に、電極部以外の部分を保護コート
し、電極部を鍍金処理した低抵抗チップ抵抗器（イ）
や、絶縁基板上に金属抵抗箔を接着剤で貼着し、フォト
エッチング法によりパターンニングすると共に、保護コ
ート、電極を成形した低抵抗チップ抵抗器（ロ）が、そ
の過電流を検出するために採用されている。2. Description of the Related Art In recent years, in an overcurrent protection circuit for a small electronic device, a resistance portion is formed on an insulating substrate by a vapor deposition method or a sputtering method, and a portion other than the electrode portion is protectively coated, and the electrode portion is plated. Low-resistance chip resistor (a)
In addition, a metal resistor foil is stuck on an insulating substrate with an adhesive, patterned by photo-etching, and a low-resistance chip resistor (b) with a protective coat and electrodes formed is used to detect the overcurrent. Has been adopted.
【０００３】[0003]
【発明が解決しようとする課題】しかしながら、上述し
た抵抗器（イ）における抵抗部を形成するあたって、真
空技術を利用するため生産性が低下するといった欠点が
あり、また抵抗器（ロ）における金属抵抗箔を貼着する
にあたって、貼着工程が手作業であるため均一性及び生
産性が低下するといった欠点がある。従って、現在、最
も生産性に富むとされているスクリーン印刷法において
も、Ｐｄ−Ａｇ系ペースト、Ｐｄ−Ａｇ−ＲｕＯ2 系ペ
ースト等の一般的に使用される抵抗ペーストを用いて単
に抵抗部を形成するのみでは、低抵抗（例えば１００ｍ
Ω／□以下）の抵抗膜を備える良好な低抵抗チップ抵抗
器を効率良く生産し、安価で提供することは極めて困難
であり、高い過電流を精度良く検出することもできな
い。更に、従来の低抵抗チップ抵抗器においては、単に
低抵抗を得るためにグレーズ系導電ペーストが採用され
ているに過ぎず、抵抗部のＴＣＲ（抵抗温度係数、以下
同じ）を小さく（約５００ｐｐｍ／℃以下）することに
ついては、殆ど考慮されていないのが実情である。この
ような状況のもと、小型電子機器のメーカーにおいて
は、小型電子機器の過電流保護回路において採用でき、
過電流を精度良く検出し得る安価な低抵抗チップ抵抗器
の開発が切望されている。However, the formation of the resistor in the resistor (a) has the disadvantage that the productivity is reduced due to the use of vacuum technology. When attaching the metal resistance foil, there is a disadvantage that uniformity and productivity are reduced because the attaching step is a manual operation. Therefore, even in the screen printing method which is considered to be most productive at present, the resistance portion is simply formed using a generally used resistance paste such as a Pd-Ag-based paste or a Pd-Ag-RuO 2 -based paste. Only by forming, low resistance (for example, 100 m
It is extremely difficult to efficiently produce a good low-resistance chip resistor having a resistive film (Ω / □ or less) and provide it at low cost, and it is not possible to accurately detect a high overcurrent. Furthermore, in the conventional low-resistance chip resistor, only a glaze-based conductive paste is used to obtain a low resistance, and the TCR (resistance temperature coefficient, the same applies hereinafter) of the resistance portion is reduced (about 500 ppm / The fact is that almost no consideration has been given to this. Under these circumstances, manufacturers of small electronic devices can use it in the overcurrent protection circuit of small electronic devices.
There is a strong need for an inexpensive low-resistance chip resistor that can accurately detect overcurrent.
【０００４】本発明は上述の従来の技術の欠点に着目
し、これを解決せんとしたものであり、その目的は、過
電流を精度良く検出し得る安価な低抵抗チップ抵抗器を
提供することにある。SUMMARY OF THE INVENTION The present invention focuses on the above-mentioned drawbacks of the prior art, and aims to solve the problem. An object of the present invention is to provide an inexpensive low-resistance chip resistor capable of accurately detecting an overcurrent. It is in.
【０００５】また本発明の他の目的は、過電流を精度良
く検出し得る安価な低抵抗チップ抵抗器を簡易に効率良
く製造することができる製造方法を提供することにあ
る。Another object of the present invention is to provide a manufacturing method capable of easily and efficiently manufacturing an inexpensive low-resistance chip resistor capable of accurately detecting an overcurrent.
【０００６】[0006]
【課題を解決するための手段】本発明は上記の目的に鑑
みてなされたものであり、その要旨とするところは、絶
縁基板と、絶縁基板上にスクリーン印刷法によって印刷
焼成される少なくとも一対の電極部と、絶縁基板上にス
クリーン印刷法によって印刷焼成され、各対電極部間に
亘る下層抵抗膜、並びに下層抵抗膜上に電気鍍金法及び
／又は無電解鍍金法によって鍍着形成され、面積抵抗率
が下層抵抗膜より低い上層抵抗膜からなる抵抗部と、を
備えてなることを特徴とする低抵抗チップ抵抗器にあ
る。この態様によれば、絶縁基板上の各対電極部間に亘
るように、下層抵抗膜がスクリーン印刷法によって印刷
焼成され、また上層抵抗膜が電気鍍金法及び／又は無電
解鍍金法によって鍍着形成されており、従って低抵抗化
を簡易にしかも確実に図った安価な低抵抗チップ抵抗器
を提供することができ、これによって過電流を精度良く
検出することができる。特に、上記上層抵抗膜として、
面積抵抗率が下層抵抗膜よりも低く、且つＴＣＲが小さ
い上層抵抗膜を採用すれば、低抵抗チップ抵抗器におけ
る過電流の検出精度を更に高めることができる。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned object, and the gist of the present invention is to provide an insulating substrate and at least one pair of printed and baked on the insulating substrate by a screen printing method. The electrode portion and the insulating substrate are printed and baked by a screen printing method, and are plated and formed by electroplating and / or electroless plating on the lower resistive film extending between the respective counter electrode portions and the lower resistive film. A low-resistance chip resistor comprising: a resistance portion having an upper resistance film having a lower resistivity than the lower resistance film. According to this aspect, the lower resistive film is printed and baked by the screen printing method so as to extend between the respective counter electrode portions on the insulating substrate, and the upper resistive film is plated by the electroplating method and / or the electroless plating method. Thus, it is possible to provide an inexpensive low-resistance chip resistor in which the resistance is easily and reliably reduced, and thereby the overcurrent can be detected with high accuracy. In particular, as the upper resistive film,
If an upper-layer resistance film having a lower sheet resistance than the lower-layer resistance film and a smaller TCR is used, the overcurrent detection accuracy in the low-resistance chip resistor can be further improved.
【０００７】本発明の他の要旨は、上記下層抵抗膜をＰ
ｄ−Ａｇ系抵抗膜とし、且つ上記上層抵抗膜をＮｉ系抵
抗膜としたことを特徴とする上述の低抵抗チップ抵抗器
にあり、この態様によれば、スクリーン印刷法によって
印刷焼成される比較的安価なＰｄ−Ａｇ系抵抗膜を下層
抵抗膜として採用すると共に、電気鍍金法及び／又は無
電解鍍金法によって鍍着形成される比較的ＴＣＲが小さ
いＮｉ系抵抗膜を上層抵抗膜として採用したので、上述
したように、低抵抗チップ抵抗器における過電流の検出
精度を更に高めることができるうえ、低抵抗チップ抵抗
器の低廉化をも可能にする。Another gist of the present invention is that the lower resistance film is made of P
The low-resistance chip resistor described above is characterized in that it is a d-Ag-based resistance film and the upper-layer resistance film is a Ni-based resistance film. An inexpensive Pd-Ag-based resistive film was used as the lower resistive film, and a Ni-based resistive film with a relatively small TCR formed by electroplating and / or electroless plating was used as the upper resistive film. Therefore, as described above, the detection accuracy of the overcurrent in the low-resistance chip resistor can be further improved, and the low-resistance chip resistor can be reduced in cost.
【０００８】本発明の更に他の要旨は、絶縁基板上に電
極部及び抵抗部を備えてなる低抵抗チップ抵抗器の製造
方法であって、絶縁基板上に、少なくとも一対の電極部
をスクリーン印刷法によって印刷焼成する工程と、絶縁
基板上に、各対電極部間に亘る下層抵抗膜をスクリーン
印刷法によって印刷焼成する工程と、下層抵抗膜上に、
面積抵抗率が下層抵抗膜より低い上層抵抗膜を電気鍍金
法及び／又は無電解鍍金法によって鍍着形成する工程
と、を含むことを特徴とする低抵抗チップ抵抗器の製造
方法にある。この態様によれば、絶縁基板上の各対電極
部間に亘るように、下層抵抗膜をスクリーン印刷法によ
って印刷焼成し、また上層抵抗膜を電気鍍金法及び／又
は無電解鍍金法によって鍍着形成するようにしたので、
低抵抗チップ抵抗器の低抵抗化を簡易にしかも確実に図
ることができ、過電流を精度良く検出し得る安価な低抵
抗チップ抵抗器を効率良く製造することができる。特
に、上層抵抗膜として、面積抵抗率が下層抵抗膜よりも
低く、且つＴＣＲが小さいものを採用すれば、過電流の
検出精度が更に良好な低抵抗チップ抵抗器を効率良く製
造することができる。Still another aspect of the present invention is a method of manufacturing a low-resistance chip resistor comprising an electrode portion and a resistor portion on an insulating substrate, wherein at least one pair of electrode portions is screen-printed on the insulating substrate. Step of printing and firing by the method, and Step of printing and firing the lower resistive film between the respective counter electrode portions by screen printing on the insulating substrate, On the lower resistive film,
A step of plating an upper resistive film having a lower sheet resistivity than the lower resistive film by an electroplating method and / or an electroless plating method. According to this aspect, the lower resistive film is printed and baked by the screen printing method so as to extend between the respective counter electrode portions on the insulating substrate, and the upper resistive film is plated by the electroplating method and / or the electroless plating method. Because it was formed
The resistance of the low-resistance chip resistor can be easily and reliably reduced, and an inexpensive low-resistance chip resistor capable of accurately detecting an overcurrent can be efficiently manufactured. In particular, if an upper-layer resistance film having a lower area resistivity than that of the lower-layer resistance film and a smaller TCR is employed, a low-resistance chip resistor with better overcurrent detection accuracy can be efficiently manufactured. .
【０００９】本発明は、上記下層抵抗膜としてＰｄ−Ａ
ｇ系抵抗膜をスクリーン印刷法によって印刷焼成し、且
つ上層抵抗膜としてＮｉ系抵抗膜を電気鍍金法及び／又
は無電解鍍金法によって鍍着形成することを特徴とする
上述の低抵抗チップ抵抗器の製造方法にあり、この態様
によれば、下層抵抗膜として比較的安価なＰｄ−Ａｇ系
抵抗膜をスクリーン印刷法によって印刷焼成すると共
に、上層抵抗膜として比較的ＴＣＲが小さいＮｉ系抵抗
膜を電気鍍金法及び／又は無電解鍍金法によって鍍着形
成するようにしたので、上述したように、低抵抗チップ
抵抗器における過電流の検出精度が更に良好で、しかも
安価な低抵抗チップ抵抗器を効率良く製造することがで
きる。According to the present invention, Pd-A is used as the lower resistance film.
The low-resistance chip resistor as described above, wherein the g-based resistance film is printed and baked by a screen printing method, and a Ni-based resistance film is formed as an upper-layer resistance film by electroplating and / or electroless plating. According to this embodiment, a relatively inexpensive Pd-Ag-based resistive film is printed and baked by a screen printing method as a lower resistive film, and a Ni-based resistive film having a relatively small TCR is used as an upper resistive film. Since the plating is formed by the electroplating method and / or the electroless plating method, as described above, the detection accuracy of the overcurrent in the low-resistance chip resistor is further improved, and the low-resistance chip resistor is inexpensive. It can be manufactured efficiently.
【００１０】[0010]
【発明の実施の形態】本発明の低抵抗チップ抵抗器及び
その製造方法において、下層抵抗膜は、上層抵抗膜を電
気鍍金法及び／又は無電解鍍金法によって鍍着形成する
ために、それに先立って絶縁基板上にスクリーン印刷法
によって印刷焼成される抵抗膜である。他方、上層抵抗
膜は、電気鍍金法及び／又は無電解鍍金法によって絶縁
基板上の下層抵抗膜に鍍着形成される抵抗膜であり、面
積抵抗率が下層抵抗膜より低いことを要する。特に、上
層抵抗膜は、過電流の検出精度を高めるために、低抵抗
チップ抵抗器における抵抗部のＴＣＲは小さいことが望
ましく、具体的には低抵抗領域として小さい０〜２５０
ｐｐｍ／℃程度のＴＣＲであることが望ましい。DESCRIPTION OF THE PREFERRED EMBODIMENTS In a low-resistance chip resistor and a method of manufacturing the same according to the present invention, a lower resistance film is formed by plating an upper resistance film by electroplating and / or electroless plating. Is a resistive film printed and baked on an insulating substrate by a screen printing method. On the other hand, the upper resistance film is a resistance film formed by plating on the lower resistance film on the insulating substrate by the electroplating method and / or the electroless plating method, and it is necessary that the area resistivity is lower than that of the lower resistance film. In particular, the upper resistive film desirably has a small TCR of the resistance portion in the low-resistance chip resistor in order to enhance the detection accuracy of the overcurrent, and specifically, has a small TCR of 0 to 250 as a low-resistance region.
A TCR of about ppm / ° C. is desirable.
【００１１】絶縁基板上にスクリーン印刷法によって印
刷焼成される下層抵抗膜としては、例えばＰｄ−Ａｇ系
抵抗膜（Ｐｄ−Ａｇ−ＲｕＯ2 抵抗膜等を含む）を掲げ
ることができ、また下層抵抗膜上に電気鍍金法及び／又
は無電解鍍金法によって鍍着形成される上層抵抗膜とし
ては、例えばＮｉ系抵抗膜（Ｎｉ−Ｐ抵抗膜、Ｎｉ−Ｃ
ｕ−Ｐ抵抗膜、Ｎｉ−Ｗ−Ｐ抵抗膜、Ｎｉ−Ｃｒ−Ｐ抵
抗膜、Ｎｉ−Ｒｅ−Ｐ抵抗膜等を含む）を掲げることが
できる。The lower resistance film printed and baked on the insulating substrate by the screen printing method may be, for example, a Pd-Ag-based resistance film (including a Pd-Ag-RuO 2 resistance film). As the upper resistive film formed by electroplating and / or electroless plating on the film, for example, a Ni-based resistive film (Ni-P resistive film, Ni-C
u-P resistance film, Ni-WP resistance film, Ni-Cr-P resistance film, Ni-Re-P resistance film, etc.).
【００１２】本発明において、低抵抗とは１００ｍΩ／
□以下の抵抗値、特に２２〜４７ｍΩ／□の抵抗値をい
う。このような抵抗値の低抵抗チップ抵抗器は、小型電
子機器の過電流保護回路において最適な抵抗器として採
用され、過電流を精度良く検出することができる。In the present invention, low resistance means 100 mΩ /
A resistance value of □ or less, particularly a resistance value of 22 to 47 mΩ / □. A low-resistance chip resistor having such a resistance value is employed as an optimal resistor in an overcurrent protection circuit of a small electronic device, and can accurately detect an overcurrent.
【００１３】また本発明の低抵抗チップ抵抗器の製造方
法においては、上述した工程のほか、保護膜を形成する
工程や、端面電極を形成する工程や、鍍金電極を鍍着形
成する工程等、任意の工程を付加してもよく、従ってこ
れらの他の工程を付加した場合には、その工程に伴う他
の構成が本発明の低抵抗チップ抵抗器においても付加さ
れた態様となることはいうまでもない。In the method of manufacturing a low-resistance chip resistor according to the present invention, in addition to the above-described steps, a step of forming a protective film, a step of forming an end face electrode, a step of plating and forming a plating electrode, and the like. Arbitrary steps may be added. Therefore, when these other steps are added, it is said that other configurations associated with the steps are also added to the low-resistance chip resistor of the present invention. Not even.
【００１４】[0014]
【実施例】以下、本発明の実施例を添付図面に基づいて
説明するが、本発明はこれに限定されるものではない。
ここで、図１は本発明の低抵抗チップ抵抗器の実施例を
示す概略縦断面図である。Embodiments of the present invention will be described below with reference to the accompanying drawings, but the present invention is not limited to these embodiments.
Here, FIG. 1 is a schematic longitudinal sectional view showing an embodiment of the low-resistance chip resistor of the present invention.
【００１５】図１に示す本発明の低抵抗チップ抵抗器
は、アルミナセラミックス基板１１と、この基板１１上
に形成されるＰｄ−Ａｇ下層抵抗膜１２及びＮｉ−Ｃｕ
−Ｐ上層抵抗膜１３と、Ａｇ表裏電極膜１４，１５と、
保護膜１６と、端面電極１７と、鍍金電極膜１８と、を
備えて構成されている。A low-resistance chip resistor according to the present invention shown in FIG. 1 comprises an alumina ceramic substrate 11, a Pd-Ag lower resistance film 12 and a Ni-Cu
-P upper resistance film 13, Ag front and back electrode films 14 and 15,
The protective film 16 includes an end face electrode 17 and a plated electrode film 18.
【００１６】上記Ｐｄ−Ａｇ下層抵抗膜１２、Ａｇ表裏
電極膜１４，１５、及び保護膜１６は、スクリーン印刷
法によって形成されたものであり、また上記Ｎｉ−Ｃｕ
−Ｐ上層抵抗膜１３は、無電解鍍金法によって形成され
たものである。このＮｉ−Ｃｕ−Ｐ上層抵抗膜１３は、
ＴＣＲに大幅な変化を来すことなく抵抗値を下げるため
に、下層抵抗膜１２の全面に形成される。The Pd-Ag lower resistance film 12, the Ag front and back electrode films 14, 15 and the protective film 16 are formed by a screen printing method.
The -P upper resistance film 13 is formed by electroless plating. This Ni—Cu—P upper resistive film 13
In order to lower the resistance value without causing a significant change in the TCR, it is formed on the entire surface of the lower resistance film 12.
【００１７】端面電極１７は、基板１１の左右両側面に
印刷焼成されており、保護膜１６は、Ｎｉ−Ｃｕ−Ｐ上
層抵抗膜１３上に印刷焼成されている。また、鍍金電極
膜１８は、露出した状態にあるＮｉ−Ｃｕ−Ｐ上層抵抗
膜１３、Ａｇ裏電極膜１５、及び端面電極１７上に形成
されている。The end face electrodes 17 are printed and baked on both right and left sides of the substrate 11, and the protective film 16 is printed and baked on the Ni—Cu—P upper resistance film 13. The plated electrode film 18 is formed on the exposed Ni—Cu—P upper resistance film 13, the Ag back electrode film 15, and the end face electrode 17 in an exposed state.
【００１８】上記低抵抗チップ抵抗器を製造するにあた
っては、アルミナセラミックス基板１１上に、一対のＡ
ｇ表電極膜１４をスクリーン印刷法によって印刷焼成す
ると共に、各対Ａｇ電極膜１４間に亘るようにＰｄ−Ａ
ｇ下層抵抗膜１２をスクリーン印刷法によって印刷焼成
し、次いでＰｄ−Ａｇ下層抵抗膜１２上に、面積抵抗率
がＰｄ−Ａｇ下層抵抗膜１２より低いＮｉ−Ｃｕ−Ｐ上
層抵抗膜１３を無電解鍍金法によって鍍着形成する。そ
して、スクリーン印刷法によってＡｇ裏電極膜１５及び
保護膜１６を印刷焼成した後、端面電極１７を塗布焼成
し、更にＡｇ裏電極膜１５、端面電極１７、及び端部付
近のＮｉ−Ｃｕ−Ｐ上層抵抗膜１３上に鍍金電極膜１８
を鍍着形成し、その製造を完了する。In manufacturing the low-resistance chip resistor, a pair of A
g While the surface electrode film 14 is printed and baked by a screen printing method, Pd-A
g The lower resistive film 12 is printed and baked by a screen printing method, and then the Ni-Cu-P upper resistive film 13 having a lower sheet resistivity than the Pd-Ag lower resistive film 12 is electrolessly formed on the Pd-Ag lower resistive film 12. It is formed by plating. Then, after the Ag back electrode film 15 and the protective film 16 are printed and baked by the screen printing method, the end face electrode 17 is applied and baked, and further, the Ag back electrode film 15, the end face electrode 17 and the Ni-Cu-P near the end portion are further baked. Plating electrode film 18 on upper resistance film 13
To complete the production.
【００１９】Ｐｄ−Ａｇ下部抵抗膜１２上に形成される
上層抵抗膜としては、無電解鍍金法によって形成される
上記Ｎｉ−Ｃｕ−Ｐ上層抵抗膜１３に代えて、電気鍍金
法及び／又は無電解鍍金法によって形成されるＮｉ単独
の上層抵抗膜のほか、Ｎｉ−Ｐ、Ｎｉ−Ｗ−Ｐ、Ｎｉ−
Ｃｒ−Ｐ、Ｎｉ−Ｒｅ−Ｐ等といった他のＮｉ系の上層
抵抗膜を採用することもできる。特に、上述した無電解
鍍金法による場合にあっては、その前処理として活性化
液（例えば、塩化パラジウム溶液）を用いないで、Ｐｄ
−Ａｇ系の下層抵抗膜に負の電荷を帯電させ（電気鍍金
法）、無電解鍍金反応のトリガとして作用させる。ここ
で、活性化液を用いないで負の電荷を帯電させることと
したのは、一般に活性化液は強酸（ｐＨ１以下）であ
り、ＴＣＲを大きくし、且つ過負荷に対する抗力を弱め
てしまう、即ちＰｄ−Ａｇ系の下層抵抗膜の抵抗膜とし
ての機能を低減させてしまうといった欠点があり、これ
を防止するためである。The upper resistive film formed on the Pd-Ag lower resistive film 12 is replaced with the Ni-Cu-P upper resistive film 13 formed by the electroless plating method. In addition to the upper resistive film of Ni alone formed by electrolytic plating, Ni-P, Ni-WP, Ni-
Other Ni-based upper-layer resistive films such as Cr-P, Ni-Re-P, etc. can also be adopted. In particular, in the case of the above-described electroless plating method, Pd is not used as a pretreatment without using an activating liquid (for example, a palladium chloride solution).
-A negative charge is charged on the Ag-based lower resistance film (electroplating method) to act as a trigger for the electroless plating reaction. Here, the reason that the negative charge is charged without using the activating liquid is that the activating liquid is generally a strong acid (pH 1 or less), which increases the TCR and weakens the resistance to overload. That is, there is a disadvantage that the function of the Pd-Ag-based lower resistance film as a resistance film is reduced, and this is to prevent this.
【００２０】尚、本実施例の低抵抗チップ抵抗器では、
３．２mm×２．５mmのチップにおいて、３３ｍΩ、２２
ｍΩ、またそれ以下の抵抗値を有する抵抗膜を形成する
ことができた。また、それらのＴＣＲは、低抵抗領域と
して小さい０〜３００ｐｐｍ／℃を示した。Incidentally, in the low-resistance chip resistor of this embodiment,
In a 3.2 mm × 2.5 mm chip, 33 mΩ, 22
A resistive film having a resistance value of mΩ or less could be formed. Further, those TCRs showed a low value of 0 to 300 ppm / ° C. as a low resistance region.
【００２１】[0021]
【発明の効果】本発明の低抵抗チップ抵抗器は、絶縁基
板上の各対電極部間に亘るように、下層抵抗膜がスクリ
ーン印刷法によって印刷焼成され、また上層抵抗膜が電
気鍍金法及び／又は無電解鍍金法によって鍍着形成され
る構成を採用したことにより、従って低抵抗化を簡易に
しかも確実に図った安価な低抵抗チップ抵抗器を提供す
ることができ、これによって過電流を精度良く検出する
ことができるといった顕著な効果を奏する。特に、上記
上層抵抗膜として、面積抵抗率が下層抵抗膜よりも低
く、且つＴＣＲが小さい上層抵抗膜を採用することによ
り、低抵抗チップ抵抗器における過電流の検出精度を更
に高めることができるといった顕著な効果を奏する。According to the low resistance chip resistor of the present invention, the lower resistive film is printed and baked by a screen printing method so as to extend between the respective counter electrode portions on the insulating substrate, and the upper resistive film is formed by the electroplating method. And / or adopting a configuration formed by electroless plating, it is possible to provide an inexpensive low-resistance chip resistor that can easily and reliably reduce the resistance, thereby reducing overcurrent. A remarkable effect such as accurate detection can be obtained. In particular, by adopting an upper-layer resistance film having a lower area resistivity than the lower-layer resistance film and a smaller TCR as the upper-layer resistance film, it is possible to further improve the detection accuracy of overcurrent in the low-resistance chip resistor. Has a remarkable effect.
【００２２】本発明の他の低抵抗チップ抵抗器は、スク
リーン印刷法によって印刷焼成される比較的安価なＰｄ
−Ａｇ系抵抗膜を下層抵抗膜とすると共に、電気鍍金法
及び／又は無電解鍍金法によって鍍着形成される比較的
ＴＣＲが小さいＮｉ系抵抗膜を上層抵抗膜とする構成を
採用したことにより、上述したように、低抵抗チップ抵
抗器における過電流の検出精度を更に高めることができ
るうえ、低抵抗チップ抵抗器の低廉化をも可能にすると
いった効果を奏する。Another low-resistance chip resistor of the present invention is a relatively inexpensive Pd printed and fired by a screen printing method.
-By adopting a structure in which the Ag-based resistive film is used as the lower resistive film and the Ni-based resistive film having a relatively small TCR formed by electroplating and / or electroless plating is used as the upper resistive film. As described above, it is possible to further improve the accuracy of detecting an overcurrent in the low-resistance chip resistor, and to achieve an effect of enabling the low-resistance chip resistor to be inexpensive.
【００２３】本発明の低抵抗チップ抵抗器の製造方法
は、絶縁基板上の各対電極部間に亘るように、下層抵抗
膜をスクリーン印刷法によって印刷焼成し、また上層抵
抗膜を電気鍍金法及び／又は無電解鍍金法によって鍍着
形成する方法を採用したことにより、低抵抗チップ抵抗
器の低抵抗化を簡易にしかも確実に図ることができ、過
電流を精度良く検出し得る安価な低抵抗チップ抵抗器を
効率良く製造することができる。特に、上層抵抗膜とし
て、面積抵抗率が下層抵抗膜よりも低く、且つＴＣＲが
小さいものを採用すれば、過電流の検出精度が更に良好
な低抵抗チップ抵抗器を効率良く製造することができ
る。According to the method of manufacturing a low-resistance chip resistor of the present invention, a lower-layer resistance film is printed and baked by a screen printing method so as to extend between respective counter electrode portions on an insulating substrate, and an upper-layer resistance film is formed by an electroplating method. And / or adopting a method of plating by an electroless plating method, it is possible to easily and surely reduce the resistance of the low-resistance chip resistor, and it is possible to detect an overcurrent accurately and at a low cost. A resistor chip resistor can be manufactured efficiently. In particular, if an upper-layer resistance film having a lower area resistivity than that of the lower-layer resistance film and a smaller TCR is employed, a low-resistance chip resistor with better overcurrent detection accuracy can be efficiently manufactured. .
【００２４】本発明は、下層抵抗膜として比較的安価な
Ｐｄ−Ａｇ系抵抗膜をスクリーン印刷法によって印刷焼
成すると共に、上層抵抗膜として比較的ＴＣＲが小さい
Ｎｉ系抵抗膜を電気鍍金法及び／又は無電解鍍金法によ
って鍍着形成する方法を採用したことにより、上述した
ように、低抵抗チップ抵抗器における過電流の検出精度
が更に良好で、しかも安価な低抵抗チップ抵抗器を効率
良く製造することができる。According to the present invention, a relatively inexpensive Pd-Ag-based resistive film is printed and baked as a lower resistive film by a screen printing method, and a Ni-based resistive film having a relatively small TCR is electroplated as an upper resistive film. Alternatively, by adopting a method of plating by electroless plating, as described above, the overcurrent detection accuracy in the low-resistance chip resistor is further improved, and an inexpensive low-resistance chip resistor is efficiently manufactured. can do.
【図１】本発明の低抵抗チップ抵抗器の実施例を示す概
略縦断面図である。FIG. 1 is a schematic longitudinal sectional view showing an embodiment of a low-resistance chip resistor according to the present invention.
１１ アルミナセラミックス基板（絶縁基板） １２ Ｐｄ−Ａｇ下層抵抗膜（下層抵抗膜） １３ Ｎｉ−Ｃｕ−Ｐ上層抵抗膜（上層抵抗膜） １４ Ａｇ表電極 １５ Ａｇ裏電極 １６ 保護膜 １７ 端面電極 １８ 鍍金電極膜 DESCRIPTION OF SYMBOLS 11 Alumina ceramic substrate (insulating substrate) 12 Pd-Ag lower resistance film (lower resistance film) 13 Ni-Cu-P upper resistance film (upper resistance film) 14 Ag surface electrode 15 Ag back electrode 16 protective film 17 end surface electrode 18 plating Electrode film
Claims (4)
少なくとも一対の電極部と、 絶縁基板上にスクリーン印刷法によって印刷焼成され、
各対電極部間に亘る下層抵抗膜、並びに下層抵抗膜上に
電気鍍金法及び／又は無電解鍍金法によって鍍着形成さ
れ、面積抵抗率が下層抵抗膜より低い上層抵抗膜からな
る抵抗部と、を備えてなることを特徴とする低抵抗チッ
プ抵抗器。1. An insulating substrate, at least one pair of electrode portions printed and baked on the insulating substrate by a screen printing method, and printed and baked on the insulating substrate by a screen printing method,
A lower resistance film extending between the respective counter electrode portions, and a resistance portion formed by plating on the lower resistance film by electroplating and / or electroless plating, and having an area resistivity lower than that of the lower resistance film. And a low-resistance chip resistor.
し、且つ上記上層抵抗膜をＮｉ系抵抗膜としたことを特
徴とする請求項１に記載の低抵抗チップ抵抗器。2. The low resistance chip resistor according to claim 1, wherein the lower resistance film is a Pd-Ag resistance film, and the upper resistance film is a Ni resistance film.
なる低抵抗チップ抵抗器の製造方法であって、 絶縁基板上に、少なくとも一対の電極部をスクリーン印
刷法によって印刷焼成する工程と、 絶縁基板上に、各対電極部間に亘る下層抵抗膜をスクリ
ーン印刷法によって印刷焼成する工程と、 下層抵抗膜上に、面積抵抗率が下層抵抗膜より低い上層
抵抗膜を電気鍍金法及び／又は無電解鍍金法によって鍍
着形成する工程と、を含むことを特徴とする低抵抗チッ
プ抵抗器の製造方法。3. A method for manufacturing a low-resistance chip resistor comprising an electrode portion and a resistance portion on an insulating substrate, comprising: printing and firing at least a pair of electrode portions on the insulating substrate by a screen printing method. A step of printing and firing a lower resistance film across each counter electrode portion by a screen printing method on the insulating substrate; and an electroplating method on the lower resistance film with an upper resistance film having a lower sheet resistivity than the lower resistance film. And / or a step of plating by an electroless plating method.
膜をスクリーン印刷法によって印刷焼成し、且つ上層抵
抗膜としてＮｉ系抵抗膜を電気鍍金法及び／又は無電解
鍍金法によって鍍着形成することを特徴とする請求項３
に記載の低抵抗チップ抵抗器の製造方法。4. A Pd-Ag based resistive film is printed and baked as a lower resistive film by screen printing, and a Ni based resistive film is formed as an upper resistive film by electroplating and / or electroless plating. 4. The method according to claim 3, wherein
3. The method for manufacturing a low-resistance chip resistor according to claim 1.
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8225545A JP2896996B2 (en) | 1996-08-27 | 1996-08-27 | Low resistance chip resistor and method of manufacturing the same |
| DE19780905T DE19780905C2 (en) | 1996-08-27 | 1997-08-26 | Resistance and process for its manufacture |
| GB9807983A GB2321558B (en) | 1996-08-27 | 1997-08-26 | Chip resistor and method for producing the same |
| PCT/JP1997/002955 WO1998009298A1 (en) | 1996-08-27 | 1997-08-26 | Chip resistor and method for manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8225545A JP2896996B2 (en) | 1996-08-27 | 1996-08-27 | Low resistance chip resistor and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH1070001A true JPH1070001A (en) | 1998-03-10 |
| JP2896996B2 JP2896996B2 (en) | 1999-05-31 |
Family
ID=16830979
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8225545A Expired - Lifetime JP2896996B2 (en) | 1996-08-27 | 1996-08-27 | Low resistance chip resistor and method of manufacturing the same |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP2896996B2 (en) |
| DE (1) | DE19780905C2 (en) |
| GB (1) | GB2321558B (en) |
| WO (1) | WO1998009298A1 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002064002A (en) * | 2000-06-05 | 2002-02-28 | Rohm Co Ltd | Chip resistor and its manufacturing method |
| JP2015521802A (en) * | 2012-06-29 | 2015-07-30 | イザベレンヒュッテ ホイスラー ゲー・エム・ベー・ハー ウント コンパニー コマンデイトゲゼルシャフト | Resistors, especially low resistance current measuring resistors |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102006060634A1 (en) | 2006-12-21 | 2008-06-26 | Robert Bosch Gmbh | Method for producing an electrical resistance on a substrate |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS584486B2 (en) * | 1973-10-15 | 1983-01-26 | 三菱電機株式会社 | Sentaxado Cairo |
| JPS5678506U (en) * | 1979-11-20 | 1981-06-25 | ||
| JPH0567501A (en) * | 1991-05-23 | 1993-03-19 | Mitsubishi Electric Corp | Chip resistor |
-
1996
- 1996-08-27 JP JP8225545A patent/JP2896996B2/en not_active Expired - Lifetime
-
1997
- 1997-08-26 WO PCT/JP1997/002955 patent/WO1998009298A1/en not_active Ceased
- 1997-08-26 GB GB9807983A patent/GB2321558B/en not_active Expired - Lifetime
- 1997-08-26 DE DE19780905T patent/DE19780905C2/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002064002A (en) * | 2000-06-05 | 2002-02-28 | Rohm Co Ltd | Chip resistor and its manufacturing method |
| JP2015521802A (en) * | 2012-06-29 | 2015-07-30 | イザベレンヒュッテ ホイスラー ゲー・エム・ベー・ハー ウント コンパニー コマンデイトゲゼルシャフト | Resistors, especially low resistance current measuring resistors |
Also Published As
| Publication number | Publication date |
|---|---|
| WO1998009298A1 (en) | 1998-03-05 |
| DE19780905T1 (en) | 1998-10-15 |
| DE19780905C2 (en) | 2003-03-20 |
| GB2321558B (en) | 1999-10-27 |
| JP2896996B2 (en) | 1999-05-31 |
| GB9807983D0 (en) | 1998-06-17 |
| GB2321558A (en) | 1998-07-29 |
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