JPH1092957A - Method for manufacturing semiconductor device - Google Patents

Abstract

(57) Abstract: In forming a semiconductor device including at least two or more types of MOS devices having gate insulating films having different thicknesses on the same substrate, the formation of the gate insulating film is affected by contamination by an organic substance or the like. To manufacture a semiconductor device having excellent characteristics without variations between elements. SOLUTION: Oxygen atoms are selectively introduced into at least two or more regions of a semiconductor substrate 1 under different conditions by an ion implantation method, and an oxygen introduction layer 1 is introduced into each region.
a, forming oxygen introducing layers 1a, 1b into oxide films 3a, 3b;
forming at least two or more types of MOS field effect transistors having different thicknesses of the gate insulating films by using the oxide films 3a and 3b converted from b as gate insulating films.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a MOS type semiconductor element such as an electrically erasable nonvolatile memory element.

[0002]

2. Description of the Related Art At present, a memory cell of a most commonly used nonvolatile memory has a structure shown in FIG. This is to control the amount of charge stored in the floating electrode 103 surrounded by the insulating film by the voltage applied to the control electrode 105. As shown in FIG. 7, this memory cell is characterized by having two layers of gate insulating films 102 and 104 above and below a floating electrode.

A major problem in manufacturing a nonvolatile memory device having a memory cell of this type is as follows.
The memory cell portion having the two-layered gate insulating film and the peripheral circuit portion having the ordinary one-layered gate insulating film must be formed on the same substrate. In particular, since the operation as a circuit element differs between the memory cell region and the peripheral circuit region, and the function of the insulating film is completely different, the thickness of the insulating film also needs to be different.

That is, in the memory cell region, a thin insulating film called a tunnel insulating film is required for data rewriting, whereas in the peripheral circuit region, a high voltage is required to control the same data rewriting. Is required to be relatively thick. In order to form such insulating films having different thicknesses on the same substrate, for example, the following method is usually used.

First, as shown in FIG. 8A, a semiconductor substrate 101 is oxidized to form a first insulating film 102, and then a first semiconductor thin film 103 is formed. An electrically active impurity is added to the semiconductor thin film 103 as necessary.

Next, as shown in FIG. 8B, a second insulating film 104 is formed on the semiconductor thin film 101, and further a second semiconductor thin film 105 is formed. The addition of electrically active impurities as necessary is the same as in the case of the first semiconductor thin film 103. Further, as shown in FIG. 8C, a second semiconductor thin film 105, a second insulating film 104,
By sequentially and selectively removing the stacked film including the first semiconductor thin film 103 and the first insulating film 102, the floating electrode (the first semiconductor thin film 103) and the control electrode (the second semiconductor thin film 105) are removed. Form. Further, using the laminated film as a mask, an electrically active impurity is introduced into the semiconductor substrate 101 to form a source / drain region 106, and an MO with a two-layer gate insulating film structure is formed in the memory cell portion.
Form an SFET.

At this time, in order to improve the cell characteristics,
The first semiconductor thin film 103 can be made into a single crystal film by using a method disclosed in JP-A-3-173120. The first semiconductor thin film 103 is a film that will become a gate electrode (floating electrode) in a subsequent step, and by using this as a single crystal, a problem that occurs when the same film is polycrystalline, that is, a crystal grain boundary It has been found that some of the causes of the final deterioration of the device characteristics, such as the deterioration of the gate insulating film due to the mixing of impurities such as phosphorus from the substrate and the variation in the shape at the time of processing due to the presence of crystal grains, can be eliminated.

Next, as shown in FIG. 9A, after covering the memory cell portion with an oxidation-resistant thin film 107, the oxidation-resistant thin film 107 is selectively removed and the semiconductor substrate 101 is removed.
After exposing a region where a peripheral circuit is formed, the region is oxidized to form a third insulating film 108, and a third insulating film 1 is formed.
08, a third semiconductor thin film 109 is formed. As in the above-described steps, electrically active impurities are added as necessary.

Next, as shown in FIG. 9B, the laminated film composed of the third semiconductor thin film 109 and the third insulating film 108 is selectively removed to form the gate electrode (the third semiconductor thin film 109). ) Is formed. Further, an electrically active impurity is introduced into the semiconductor substrate 101 using the gate electrode (third semiconductor thin film 109) as a mask,
A source / drain region 110 is formed, and a MOSFET is formed in a peripheral circuit portion.

After that, as shown in FIG. 9C, a fourth insulating film 111 is deposited on the above structure, and is selectively removed to form a connection hole for a control electrode (second semiconductor thin film 105).
And a gate electrode (third semiconductor thin film 109). Further, after forming the metal film 112 on the entire surface, the metal film 112 is selectively removed to form a required electric circuit as shown in FIG.

As described above, MOSFETs having different insulating film thicknesses and layer structures are formed on the memory cell portion and the peripheral circuit portion on the same substrate. In the above description, the case where the peripheral circuit portion is formed after the memory cell portion is formed first has been described. However, it is apparent that the peripheral circuit portion can be formed first. Further, the third insulating film 108 serves as the first insulating film 102 or the second insulating film 104, and the third semiconductor thin film 109 serves as the first semiconductor thin film 103 or the second semiconductor thin film 105, respectively. It is also possible to do so.

However, any of the above-described methods has the following problems. That is, the memory
Regardless of whether the cell portion or the peripheral circuit portion is formed first, a step of selectively removing the film structure formed by the first substrate oxidation or the like is required before the second substrate oxidation. This step is usually performed using a photoresist made of an organic material. Although this photoresist has been removed during the second oxidation of the substrate, immediately before the oxidation, the photoresist is always present on the substrate and other portions of the substrate are exposed before the gate oxidation. Therefore, the photoresist is removed while the substrate is exposed. It is well known that the process of forming a gate insulating film is extremely sensitive to various types of contamination, while the process of using a photoresist and the process of removing the photoresist are relatively contaminating processes. As is well known, this situation is highly undesirable. That is, there is a problem that the gate insulating film formed by the second oxidation of the substrate is strongly affected by the contamination and causes a deterioration of the withstand voltage and a variation in characteristics.

[0013]

As described above, when a memory cell portion and a peripheral circuit portion are formed on a semiconductor substrate, whichever is formed first, before the second substrate oxidation, A step of selectively removing the film structure formed by the first oxidation of the substrate or the like is always necessary. At this time, a photoresist made of an organic substance is usually used. This photoresist is always present on the substrate immediately before the second oxidation of the substrate, while the other parts of the substrate are exposed before the gate oxidation, so that the photoresist is exposed when the substrate is exposed. The removal step will be performed. Since the process using a photo resist and the process of removing the photo resist are processes with much contamination, the gate insulating film formed by the second oxidation of the substrate is strongly affected by the contamination and deteriorates in withstand voltage. And characteristic variations occur.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned circumstances, and is intended for manufacturing a semiconductor device having two or more types of MOS semiconductor elements having gate insulating films having different thicknesses on the same substrate. It is an object of the present invention to provide a method of manufacturing a semiconductor device in which the MOS type semiconductor element can be formed without being affected by contamination of organic substances or the like.

[0015]

[Means for Solving the Problems]

(Summary) In order to solve the above-described problems, the present invention selectively introduces oxygen atoms into at least two or more regions of a semiconductor substrate by ion implantation under different conditions, and introduces oxygen into each region. Forming a layer, converting the oxygen-introducing layer to an oxide film, and using the oxide film converted from the oxygen-introducing layer as a gate insulating film, wherein at least two or more types of MOS transistors having different gate insulating film thicknesses are used.
Forming a type field effect transistor.

In the present invention, the following embodiments are preferable. (1) A step of epitaxially growing a portion of the semiconductor substrate on the oxygen introducing layer to form an epitaxial layer on the portion.

(2) The step of converting the oxygen-introducing layer into an oxide film also serves as all or a part of the step of forming the epitaxial layer. (3) At least one of the at least two or more types of MOS field effect transistors is a two-layer gate type MO.
S-type field effect transistor, and this double-layer gate type M
Forming a non-volatile memory device from OS type field effect transistors.

(4) a step of selectively introducing oxygen atoms by ion implantation into a region of the semiconductor substrate which is shallower than a region where the oxygen introduction layer is formed, and further forming an oxygen introduction layer; A step of converting the introduction layer into an oxide film; and a step of forming the double-layer gate MOS field effect transistor using the oxide film as an insulating film between gate electrodes.

(5) A step of epitaxially growing a portion of the semiconductor substrate on the shallow oxygen introduction layer to form an epitaxial layer in the portion. (6) introducing at least one or more of the regions of the semiconductor substrate into which the oxygen atoms are introduced, by introducing nitrogen atoms into a region where the oxygen introduction layer is formed by an ion implantation method; Forming a nitrogen-containing oxide film in a step of converting the oxygen-introducing layer into an oxide film, and forming a MOS field-effect transistor using the nitrogen-containing oxide film as a gate insulating film;

(7) A non-volatile memory device is formed by using the nitrogen-containing oxide film as a lower gate insulating film of the two-layer gate type MOS field effect transistor. (8) A non-volatile memory device is formed by using the nitrogen-containing oxide film as an insulating film between gate electrodes of the double-gate MOS field-effect transistor.

(Operation) According to the present invention, an oxide film is formed in each of at least two or more regions of a semiconductor substrate by using oxygen atoms introduced by an ion implantation method, and this oxide film is used as a gate insulating film. Therefore, the formation of the gate insulating film is not affected by the contamination from the organic matter due to the atmosphere and the photoresist, and the gate insulating film having different thicknesses is formed on the same substrate while preventing the defect of the gate insulating film due to the contamination. An insulating film can be formed.

Further, when two or more types of MOS field effect transistors are formed from these gate insulating films,
Since the electrodes of these MOS type field effect transistors can be automatically formed into a single crystal semiconductor film, no special process is required to eliminate the characteristic variation caused by the electrodes being polycrystalline semiconductor films. .

From the above, if the method according to the present invention is used to manufacture a semiconductor device including two or more types of MOS field effect transistors, in particular, a nonvolatile memory device having a two-layer gate type MOS field effect transistor, It is possible to manufacture a semiconductor device in which a cause of a defect such as a defect of a gate insulating film due to contamination and a characteristic variation caused by using a polycrystalline material for a gate electrode is eliminated.

Further, in a nonvolatile memory device, usually,
The performance can be improved by using a nitrogen-containing oxide film as the lower gate insulating film of the two-layer gate. However, according to the method of the present invention, the nitrogen-containing oxide film can be used as the lower gate insulating film without impairing the above-described effects of the present invention. It is possible to form a film.

[0025]

Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIGS. 1 and 2 are process sectional views showing a method according to a first embodiment of the present invention. In the present embodiment, a method for manufacturing a nonvolatile memory having a two-layer gate type MOS field effect transistor will be described.

First, as shown in FIG. 1A, the surface of a region for forming a peripheral circuit of a p-type silicon substrate 1 is covered with a photoresist (hereinafter abbreviated as "resist") 2a.
The first oxygen-introducing layer 1a is formed by introducing oxygen into the region where the memory cell is formed by the first ion implantation. The ion implantation conditions are basically determined by the amount of implanted oxygen (hereinafter abbreviated as dose) corresponding to the thickness of the gate oxide film to be formed in the corresponding region.

The following conditions must be considered for the conditions of this ion implantation. That is, in order to form an oxide film, the peak concentration of oxygen in the substrate needs to be at least about 10 ²² cm ⁻³ . This is a considerably high concentration of atoms introduced by ion implantation. Therefore, in order to realize this, it is required for practical reasons that the acceleration energy at the time of ion implantation be within a range of 10 to 100 keV at which a high ion current can be stably obtained. In such an energy range, the average range (R _p ) of the ions substantially corresponding to the depth of the peak concentration position of the ions implanted into the substrate and the statistical variation (ΔR _p ) of the ranges are almost the same. About.
On the other hand, the thickness of the finally formed oxide film is substantially equal to ΔR _p , so that in order to form a thin oxide film,
At the same it is necessary to perform ion implantation under the condition with a shallow R _p such that the same degree of [Delta] R _p.

Next, as shown in FIG. 1B, after the resist 2a is once removed, the surface of the region for forming the memory cell of the substrate 1 is covered with the resist 2b to form a peripheral circuit of the substrate 1. The second oxygen introduction layer 1b is formed by introducing oxygen into the region to be formed by the second ion implantation. As described above, the dose of the ion implantation is determined according to the thickness of the gate oxide film to be formed. Also,
It is as also mentioned at the first ion implantation the relationship between film thickness and R _p of the oxide film to be formed. Therefore, the conditions of the ion implantation generally differ from those of the first ion implantation depending on the thickness of the oxide film to be formed.

Next, as shown in FIG. 1C, the resist 2b is removed again, and a single crystal semiconductor layer made of silicon (which becomes a floating gate electrode of a memory cell and a gate electrode of a peripheral circuit) is formed on the surface of the substrate 1. .) 4 is epitaxially grown. By this epitaxial growth, the single crystal semiconductor layer 4 is made thick to a thickness having a necessary conductivity as an electrode layer while maintaining a single crystal state. This epitaxial growth may be vapor phase growth or solid phase growth from an amorphous deposited layer.

In a region where a memory cell is formed and a region where a peripheral circuit is formed, a single crystal semiconductor layer (electrode layer) on the first and second oxygen introduction layers (oxygen implanted layers) 1a and 1b
4 will be somewhat different. However,
The thickness of the single-crystal semiconductor layer 4 is equal to the thickness of Si serving as a gate oxide film.
Since the thickness is about 10 to 50 nm, which is about the same as the thickness of the O ₂ film, and is about an order of magnitude smaller than the typical thickness of the electrode layer, which is 100 to 500 nm, the difference is small and can be ignored in practical use.

The first and second oxygen introducing layers (oxygen ion implanted layers) 1a and 1b are changed into SiO ₂ films by the heat treatment for the epitaxial growth, and the first and second oxygen introducing layers (oxygen ion implanted layers) 1a and 1b are respectively converted into the first insulating film layer 3a and the Two insulating film layers 3b are formed. The heat treatment for forming the SiO ₂ film and the heat treatment for the epitaxial growth described above can be separately performed as desired. The order of heat treatment does not matter.

Next, as shown in FIG. 1D, a third insulating film layer 5, for example, an SiO ₂ film is formed on the single crystal semiconductor layer 4.
Forming a silicon oxynitride film and the like, and further forming a semiconductor layer 6 serving as a control gate electrode of the memory cell;
For example, a silicon layer is formed.

Next, as shown in FIG. 2A, a mask (not shown) is formed, and the semiconductor layer 6, the third insulating film layer 5, the single crystal semiconductor layer 4, and the first By patterning the insulating film layer 3a, a first laminated film including the control gate electrode 6a, the inter-gate electrode insulating film 5a, and the floating gate electrode 4a of the double-gate MOS field effect transistor of the memory cell is formed. I do. Here, the semiconductor layer 6b, the third insulating film layer 5b, the single crystal semiconductor layer 4b, and the first insulating film layer 3 are formed on the region where the memory cell is formed.
A second laminated film made of b is formed. Further, an n-type impurity, for example, P or As, is introduced into the p-type silicon substrate 1 by an ion implantation method using the first and second stacked films as a mask, so that the source / drain of the two-layer gate type MOS field effect transistor is formed. The region 7a is formed.

Next, as shown in FIG. 2B, after removing the above-mentioned mask, a mask (not shown) is formed so as to cover a region where a memory cell is to be formed. The gate electrode 4b of the MOS field effect transistor in the peripheral circuit is formed by patterning a second laminated film including the third insulating film layer 5b, the single crystal semiconductor layer 4b, and the first insulating film layer 3b. . The semiconductor layer 6b and the third insulating film layer 5b on the gate electrode 4b are selectively removed. Further, an n-type impurity, for example, P or As, is introduced into the p-type silicon substrate 1 by ion implantation using the gate electrode 4b as a mask, thereby forming the source / drain regions 7b of the MOS field-effect transistor.

Further, as shown in FIG. 2C, after removing the mask, an interlayer insulating film 8, for example, an SiO ₂ film, a BPSG film or the like is deposited on the structure. Thereafter, a contact hole is formed in the interlayer insulating film 8 on the control gate electrode 6a and the gate electrode 4b, and metal films 9a and 9b are formed on the control gate electrode 6a and the gate electrode 4b so as to fill the contact hole. To form the required electrical circuit.

Since the order of ion implantation of oxygen is not essential in the present invention, the ion implantation of oxygen into the region where the memory cell is formed and the region where the peripheral circuit is formed in the above-described method of forming the embodiment. The order of injection may be changed.

FIG. 3 is a characteristic diagram showing the dielectric breakdown characteristics of the gate insulating film formed by the method according to the first embodiment of the present invention. A gate oxide film having a thickness of 8 nm was formed by the method of the present invention, and the distribution of the dielectric breakdown voltage of the gate oxide film was compared with the gate oxide film formed by the conventional method. It can be seen that the destruction at a relatively low electric field of 6 MV / cm or less observed in the case of the conventional method is eliminated by the method of the present invention.

FIG. 4 is a characteristic diagram showing a memory-cell distribution of a threshold control characteristic of the nonvolatile memory formed by the method according to the first embodiment of the present invention. Characteristic variations when a non-volatile memory is formed using the gate oxide films formed by the method of the present invention and the conventional method are shown by a threshold voltage distribution at the time of data writing,
Both were compared. The fact that such a distribution is uniform in the method of the present invention as compared with the conventional method reflects that the characteristics of the corresponding gate oxide films are uniform. Forming an element having a well-distributed threshold distribution as described above is indispensable for improving the reliability of the entire device.

(Second Embodiment) FIGS. 5 and 6 are process sectional views showing a method according to a second embodiment of the present invention. In the present embodiment, a method for manufacturing a semiconductor device having a plurality of types of MOS field effect transistors will be described.

First, as shown in FIG. 5A, the surface of the region of the p-type silicon substrate 21 where the second and third MOS field effect transistors are to be formed is covered with a photoresist 22a. The first oxygen introduction layer 21a is formed by introducing oxygen into the region where one MOS field effect transistor is to be formed by the first ion implantation.
The ion implantation conditions are determined by the amount of implanted oxygen (hereinafter abbreviated as dose) corresponding to the thickness of the gate oxide film to be formed in the corresponding region, as in the first embodiment.

Next, as shown in FIG. 5B, after the resist 22a is once removed, the surface of the region of the substrate 1 where the first and third MOS field effect transistors are to be formed is covered with the photoresist 22b. And the second M of the substrate 21
The second oxygen introduction layer 21b is formed by introducing oxygen into the region where the OS type field effect transistor is to be formed by the second ion implantation.

Next, as shown in FIG. 5C, after the resist 22b is once removed, the surface of the region of the substrate 1 where the first and second MOS field effect transistors are to be formed is covered with the photoresist 22c. And the third M of the substrate 21
The third oxygen introduction layer 21c is formed by introducing oxygen into the region where the OS type field effect transistor is to be formed by third ion implantation.

Here, the thicknesses of the first oxygen introducing layer 21a, the second oxygen introducing layer 21b, and the third oxygen introducing layer 21c are as follows. The oxygen introduction layer 21b was made to have a medium thickness, and the third oxygen introduction layer 21c was made to be the thickest. As described above, the dose of the ion implantation is determined according to the thickness of the gate oxide film to be formed. The relationship between film thickness and R _p of the oxide film to be formed is as described in the first embodiment.
Therefore, the conditions for ion implantation generally differ among the first, second, and third ion implantations according to the thickness of the oxide film to be formed.

Next, as shown in FIG. 5D, the resist 22c is removed again, and a single crystal semiconductor layer made of silicon (which becomes a gate electrode of a plurality of types of MOS field effect transistors) is formed on the surface of the substrate 21. ) 24 is epitaxially grown. By this epitaxial growth, the single crystal semiconductor layer 24 is thickened to a thickness having a necessary conductivity as an electrode layer while maintaining a single crystal state.
This epitaxial growth may be vapor phase growth or solid phase growth from an amorphous deposited layer.

Between the regions where the first, second, and third MOS field effect transistors are formed, first, second, and third oxygen introduction layers (oxygen implanted layers) 21a, 21a
The thickness of the single crystal semiconductor layer (electrode layer) 24 on b and 21c will be somewhat different. However, the thickness of the single crystal semiconductor layer 24 is about 10 to 50 nm, which is about the same as the thickness of the SiO ₂ film serving as the gate oxide film, and is about an order of magnitude compared to the typical thickness of the electrode layer of 100 to 500 nm. Since it is small, the difference is small and can be ignored in practical use.

The first, second, and third oxygen introduction layers (oxygen ion implanted layers) 21a, 21b, and 21c are formed by the heat treatment for the epitaxial growth.
O ₂ film was changed, the first insulating layer 23a, respectively, the second
The insulating film layer 23b and the third insulating film layer 23c are formed. The heat treatment for forming the SiO ₂ film and the heat treatment for the epitaxial growth described above can be separately performed as desired. The order of heat treatment does not matter.

Next, as shown in FIG. 6A, a mask (not shown) is formed, and the single crystal semiconductor layer 2 is formed using this mask.
4, first insulating film layer 23a, second insulating film layer 23
b and the third insulating film layer 23c are patterned to form gate electrodes of a plurality of types of MOS field effect transistors (first, second, and third MOS field effect transistors, respectively). 2
4a, 24b and 24c are formed.

Further, as shown in FIG. 6B, n-type impurities, for example, P and As are introduced into the p-type silicon substrate 21 by ion implantation using the gate electrodes 24a, 24b and 24c as a mask. The sources of the first, second and third MOS field effect transistors are respectively
The drain regions 25a, 25b, 25c are formed.

Next, as shown in FIG. 6C, after the mask is removed, an interlayer insulating film 26, for example, an SiO ₂ film, a BPSG film or the like is deposited on the structure, and then the gate electrode 24a, Contact holes are formed in the interlayer insulating film 26 on the gate electrodes 24a, 24b and 24c, and the metal films 27 are respectively formed on the gate electrodes 24a, 24b and 24c so as to fill the contact holes.
a, 27b and 27c are formed to form a required electric circuit.

Since the order of ion implantation of oxygen is not essential in the present invention, the ion implantation of oxygen into the region where the memory cell is formed and the region where the peripheral circuit is formed is performed in the method of the above embodiment. The order of injection may be changed.

According to the method of the present embodiment, it is possible to form a predetermined MOS type field effect transistor structure in each region without impairing the advantages of the present invention described in the first embodiment. This method is effective, for example, when two or more gate insulating films having different thicknesses are required in the peripheral circuit region.

(Third Embodiment) In a third embodiment, at least one of a plurality of regions where a gate oxide film is to be formed in the method of the first or second embodiment is used.
In this method, an oxide film containing nitrogen, that is, an oxynitride film is formed instead of the oxide film by ion implantation of nitrogen in addition to oxygen ion implantation. Oxygen ion implantation and nitrogen ion implantation
Either one may be performed first, and it may be performed simultaneously.

In this embodiment, FIGS. 1 and 2, FIGS. 5 and 6 used in the method according to the first and second embodiments of the present invention are shown.
, The first insulating film layer 23a, the second insulating film layer 23
b, the third insulating film layer 23c, and the first insulating film layer 3a and the second insulating film layer 3b are merely replaced with oxynitride films, and detailed description thereof is omitted.

The oxynitride film is used for the purpose of improving the reliability of the gate oxide film and preventing impurities in the gate electrode from diffusing into the substrate through the gate insulating film. The oxynitride film having the same characteristics as those of the oxynitride film can be formed while maintaining the advantages of the present invention. Becomes

The present invention is not limited to the above embodiment. For example, by lowering the acceleration voltage at the time of implanting oxygen ions to 10 keV or less, a very thin oxide film having a thickness of about 10 nm or less can be formed as a gate insulating film. In this case, the ion current is inevitably lower than that in the case where the acceleration voltage is high for technical reasons. However, the process time only needs to be slightly increased, and the steps can be performed basically exactly the same.

In particular, in order to uniformly form an extremely thin oxide film, a heat treatment after oxygen ion implantation is first performed at a relatively low temperature of about 500 to 600 ° C. so that a defect layer is first formed in the substrate. After the silicon oxide film is sufficiently grown, a method of performing a heat treatment at a higher temperature to form an oxide film can be employed. This suppresses the tendency for the thickness of the oxide to become non-uniform due to surface tension during high-temperature heat treatment, because oxygen atoms implanted in the substrate are attracted to the defect layer to form a uniform layer. This is because you can do it. Under conditions where the ion current is relatively small,
Since the rise in the substrate temperature during ion implantation is small and the generation of secondary defects is suppressed, the above method is particularly effective.

Forming a thick oxide film by implanting oxygen ions into a substrate has already been described in SIMOX.
(Separation by IMplanted OXygen) method,
It is widely used for forming SOI (Silicon On Insulator) substrates. The method of the present invention can be combined without any problem with the formation of such a thick oxide film by oxygen ions. In this case, the purpose of forming the thick oxide film may be to form an element isolation structure in addition to the above-described SOI structure. Even in such a case, a necessary film structure such as an oxide film can be selectively formed in a necessary region without being affected by contamination of an organic substance or the like.

Further, another oxygen introduction layer is formed by selectively introducing oxygen atoms by ion implantation into a region of the semiconductor substrate which is shallower than a region where the oxygen introduction layer is formed. The layer is converted into an oxide film, and this oxide film is used as an insulating film between gate electrodes in a two-layer gate type MOS.
A field effect transistor may be formed.

Further, the above-described method for forming an oxynitride film by ion implantation of oxygen and nitrogen is described as follows.
It can also be used for forming an insulating film between gate electrodes of a two-layer gate type MOS field effect transistor. Others
Various modifications can be made without departing from the spirit of the present invention.

[0060]

According to the present invention, when manufacturing a semiconductor device including two or more types of MOS field effect transistors, defects in the gate insulating film due to contamination from the organic matter due to the atmosphere, photoresist, or the like, and a large number of gate electrodes. It is possible to manufacture a semiconductor device in which a defect factor such as characteristic variation due to the use of a crystalline material is eliminated.

[Brief description of the drawings]

FIG. 1 is a process cross-sectional view showing a method according to a first embodiment of the present invention for manufacturing a nonvolatile memory having a two-layer gate type MOS field effect transistor.

FIG. 2 is a process sectional view illustrating the method according to the first embodiment of the present invention, following FIG. 1;

FIG. 3 is a characteristic diagram showing dielectric breakdown characteristics of a gate insulating film formed by the method according to the first embodiment of the present invention.

FIG. 4 is a characteristic diagram showing a memory-cell distribution of a threshold control characteristic of the nonvolatile memory formed by the method according to the first embodiment of the present invention.

FIG. 5 is a process sectional view illustrating a method according to a second embodiment of the present invention for manufacturing a semiconductor device having a plurality of types of MOS field-effect transistors.

FIG. 6 is a process sectional view illustrating the method according to the second embodiment of the present invention, following FIG. 5;

FIG. 7 is a cross-sectional view showing a structure of a nonvolatile memory having a two-layer gate type MOS field effect transistor.

8 is a process sectional view showing a conventional method for manufacturing a nonvolatile memory having the two-layer gate type MOS field effect transistor shown in FIG.

FIG. 9 is a process sectional view showing the conventional method following FIG. 8;

[Explanation of symbols]

 1: p-type silicon substrate 11a: first oxygen introducing layer 1b: second oxygen introducing layer 2a, 2b, 22a, 22b, 22c: resist 3a: first insulating film layer 3b: second insulating film layer 4: single crystal semiconductor layer 4a: floating gate electrode 4b: gate electrode 5: third insulating film layer 5a: insulating film between gate electrodes 6, 6b: semiconductor layer 6a: control gate electrode 7a, 7b: source / drain region 8 : Interlayer insulating film 9a, 9b: metal film

Claims (9)

[Claims] A step of selectively introducing oxygen atoms into at least two or more regions of the semiconductor substrate by ion implantation under mutually different conditions to form an oxygen-introducing layer in each region; Converting a layer into an oxide film, and using the oxide film converted from the oxygen-introduced layer as a gate insulating film, wherein at least two gate insulating films having different thicknesses
Forming at least two or more types of MOS field-effect transistors. 2. The method of manufacturing a semiconductor device according to claim 1, further comprising the step of epitaxially growing a portion of said semiconductor substrate on said oxygen introducing layer and forming an epitaxial layer on said portion. 3. The method of manufacturing a semiconductor device according to claim 2, wherein the step of converting the oxygen-introducing layer to an oxide film also serves as all or a part of the step of forming the epitaxial layer. 4. At least one of the at least two types of MOS field-effect transistors is a double-layer gate type MOS field-effect transistor, and a nonvolatile memory device is formed from the two-layer gate type MOS field-effect transistor. 4. The method of manufacturing a semiconductor device according to claim 1, wherein said method is performed. 5. A step of selectively introducing oxygen atoms by ion implantation into a region of the semiconductor substrate which is shallower than a region where the oxygen introduction layer is formed, and further forming an oxygen introduction layer; 5. The method of manufacturing a semiconductor device according to claim 4, further comprising the steps of: converting a layer into an oxide film; and forming the double-layer gate MOS field effect transistor using the oxide film as an insulating film between gate electrodes. Method. 6. The method for manufacturing a semiconductor device according to claim 5, further comprising the step of epitaxially growing a portion of said semiconductor substrate on said shallow oxygen introduction layer to form an epitaxial layer in said portion. 7. The method according to claim 7, further comprising the step of introducing nitrogen atoms into a region where the oxygen introduction layer is to be formed by an ion implantation method in at least one or more regions of the semiconductor substrate into which the oxygen atoms are introduced. 7. The method according to claim 1, wherein a nitrogen-containing oxide film is formed in the step of converting the oxygen-introduced layer into an oxide film, and a MOS field-effect transistor is formed using the nitrogen-containing oxide film as a gate insulating film. Of manufacturing a semiconductor device. 8. The method of manufacturing a semiconductor device according to claim 7, wherein said non-volatile memory device is formed by using said nitrogen-containing oxide film as a lower gate insulating film of said two-layer gate type MOS field effect transistor. 9. The method of manufacturing a semiconductor device according to claim 7, wherein said nitrogen-containing oxide film is used as an insulating film between gate electrodes of said two-layer gate type MOS field effect transistor. .