JPH11111839A - Semiconductor substrate and method of manufacturing the same - Google Patents

Abstract

(57) [Problem] To simplify the structure of providing a conductive layer that can be processed as a buried electrode pattern, and to enhance controllability of the thickness of a semiconductor layer. SOLUTION: In a film forming process P1 to P3, a film structure including an oxide film, a conductive layer and an oxide film is formed on the entire surface of a single crystal silicon substrate as a support substrate. An ion-implanted layer for separation is formed to a predetermined depth by ion implantation on a single-crystal silicon substrate as a substrate for a semiconductor layer (P5). The two substrates are subjected to a predetermined treatment and then bonded together (P6), heat-treated and peeled off (P7).
A semiconductor substrate having a structure in which semiconductor layers are sequentially stacked is formed.
Thereafter, the peeled surface is polished (P8), separated by a trench for each element isolation region (P9), and a buried oxide film is formed in the trench (P10) to obtain an SOI substrate.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor substrate having a semiconductor layer for element formation formed in an insulating state on a support substrate and a method of manufacturing the same.

[0002]

A semiconductor substrate in which a single-crystal semiconductor layer for element formation is formed on a supporting substrate via an insulating film, for example, a structure in which a silicon single-crystal thin film is provided as a semiconductor layer. SOI (Silicon On Insulato)
r) There is a substrate. This has a structure in which an oxide film as an insulating film is formed on a silicon substrate as a support substrate, and a single-crystal silicon thin film as a semiconductor layer is formed. MOS formed using such a semiconductor substrate
The transistor can operate the semiconductor integrated circuit at high speed and with low power consumption because the parasitic capacitance can be reduced due to its structure.

As a method of forming a semiconductor substrate having such an SOI structure, various methods have been conventionally used.
One of them is a bonding method. This involves bonding a single-crystal silicon substrate for forming a semiconductor layer for element formation to a supporting substrate on which an insulating film is formed, and then bonding the single-crystal silicon substrate to a predetermined thickness from the back side. Grinding and polishing.
A semiconductor layer is formed by peeling off by a method as disclosed in Japanese Patent Publication No. 211128 so that a single-crystal silicon thin film having a desired thickness is left on the supporting substrate side.

In this case, when formed by the above-described grinding and polishing, the thickness of the single-crystal silicon thin film to be formed depends on the precision of the grinding and polishing, and in practice, the thickness is 20% or more. Variations are expected to occur. Due to the thickness variation, the yield is deteriorated when a semiconductor element is formed on the formed single crystal silicon thin film.

On the other hand, when a single-crystal silicon thin film is formed by a peeling method, the thickness of the single-crystal silicon thin film to be formed can be suppressed to a variation of about several percent.
In the case of manufacturing a semiconductor element, it is possible to prevent a decrease in yield due to a variation in film thickness.

In recent years, as an element formed using a semiconductor substrate having such an SOI structure, an element in which an electrode pattern is buried and formed in advance in an oxide film located below a semiconductor layer is considered. By providing a semiconductor substrate having such a configuration, a gate electrode provided on the surface side by changing a voltage applied to an embedded electrode for an element formed in a semiconductor layer on the surface of the substrate is provided. In some cases, the operation threshold voltage can be changed and set.

An SOI having such an embedded electrode structure
In the case of forming a substrate, the thickness of a single-crystal silicon thin film is controlled when the above-described peeling technique by ion implantation is applied as it is due to in-plane unevenness due to the provision of an embedded electrode. It is expected that the dispersion will increase in terms of the characteristics and the accuracy will decrease. Unless this point is solved, the yield will decrease.

The present invention has been made in view of the above circumstances, and has as its object to compare a configuration in which a semiconductor layer is provided in an insulating state on a supporting substrate with a conductive layer which can be processed as a buried electrode pattern. It is an object of the present invention to provide a semiconductor substrate that can be formed through a simple process and that can be formed with high precision by controlling the thickness of a semiconductor layer formed thereon and a method of manufacturing the same. .

[0009]

According to the present invention, at least one conductive layer is formed in an insulated state between semiconductor layers for element formation formed in an insulated state on a support substrate. Since a conductive layer is provided on the entire surface of the supporting substrate, unevenness as in the case of forming a pattern does not occur, and the controllability of the film thickness of the semiconductor layer formed thereon is improved. Can also be
A structure in which the conductive layer can be used as a buried electrode capable of exerting an electrical action on the semiconductor layer, and a device having a structure in which a device formed in the semiconductor layer is controlled by the buried electrode. A semiconductor device can be easily formed.

According to the second aspect of the present invention, since the conductive layer is formed as a multilayer film layer provided with insulating films on the upper and lower sides, even if the supporting substrate has conductivity, it is insulated from the conductive layer. The conductive layer can be formed in this state, and the semiconductor layer can also be formed in an insulated state, so that a semiconductor device having a structure in which the conductive layer functions as a buried electrode can be formed. become.

According to the third aspect of the present invention, since the conductive layer is formed of a polycrystalline silicon film layer, it can be formed through a relatively simple manufacturing process, and the resistance of the conductive layer is polycrystalline. A required value can be set by introducing an impurity into a silicon film layer, and a semiconductor device having a configuration in which adverse effects such as thermal stress are also reduced by using a silicon substrate as a supporting substrate is formed. Will be able to

According to the fourth and fifth aspects of the present invention,
Since the semiconductor layer or the semiconductor layer and the conductive layer are formed in an island shape so as to be separated at predetermined regions on the supporting substrate, it is necessary to form a semiconductor element at each separated region at the time of element formation. By using a conductive layer provided below the semiconductor layer as a buried electrode, a semiconductor device configured to be controlled by the buried electrode corresponding to each semiconductor element can be formed.

According to the sixth and seventh aspects of the present invention,
Since the insulating material is buried between the regions where the semiconductor layer or the semiconductor layer and the conductive layer are separated in an island shape, there is no need to separately perform a processing step for separating the elements.
In addition, since the isolation of the semiconductor layer for each element formation region is performed by the selective oxide film, it is possible to obtain good insulation isolation characteristics for each element formation region, and to form an isolation region using a diffusion layer. A semiconductor device in which elements are insulated and separated from each other can be formed without the need for the step.

According to the present invention, the conductive layer is separated and formed in a region wider than the device forming region of the semiconductor layer separated by the selective oxide film. A uniform electric operation can be exerted on the entire region, and a conductive layer can be separately formed corresponding to a plurality of element formation regions of the semiconductor layer, so that the same conductive layer can be simultaneously applied to a plurality of element formation regions. It is possible to obtain a configuration that exerts an electrical operation, and it is also possible to obtain a configuration that partially performs an electrical operation for each element formation region.

According to the eleventh aspect of the present invention, a film structure including a conductive layer is formed on the supporting substrate in the film forming step,
In a step of forming an ion-implanted layer, an ion-implanted layer for peeling is formed on a substrate for a semiconductor layer, and in a bonding step, a support substrate having a film structure formed thereon is bonded to a substrate for a semiconductor layer having an ion-implanted layer formed thereon. In the separation step, heat treatment is performed in a state where the two substrates are bonded to each other, so that a separation phenomenon occurs in the ion-implanted layer portion, whereby the semiconductor layer is formed on the surface of the supporting substrate on the side where the film structure is formed. This makes it possible to obtain a semiconductor substrate having a structure in which a conductive layer is formed in an insulated state on a support substrate and a semiconductor layer is provided thereon in an insulated state. In this case, the conductive layer is provided without patterning Accordingly, the bonding step can be performed using the surface in which the unevenness generated due to the pattern is eliminated, so that the thickness of the semiconductor layer formed thereover can be accurately formed.

According to a twelfth aspect of the present invention, a film structure including a conductive layer is formed on a semiconductor layer substrate in a film forming step, and a peeling ion implantation layer is formed in an ion implantation layer forming step. Then, in the bonding step, the semiconductor layer substrate and the supporting substrate are bonded to each other, and heat treatment is performed in the separating step to cause a peeling phenomenon in the ion-implanted layer portion to form a film structure and a semiconductor layer on the supporting substrate. Will be able to

This makes it possible to obtain a semiconductor substrate having a structure in which a conductive layer is formed on a supporting substrate in an insulating state and a semiconductor layer is provided thereon in an insulating state. In this case, since the film structure is formed on the semiconductor layer substrate to form the ion-implanted layer, the supporting substrate only needs to have a function of supporting the film structure and the semiconductor layer. It is not necessary to use a complicated thing, and cost reduction can be achieved.

According to a thirteenth aspect of the present invention, as a film forming step, a base insulating film is formed in an insulating film forming step, a conductive layer is formed in a conductive layer forming step, and an upper insulating film is formed in the insulating film forming step. By doing so, a film structure can be formed. According to the invention of claim 14, a film structure can be formed by forming an oxide film as a base insulating film and an upper insulating film and forming polycrystalline silicon as a conductive layer.

According to the fifteenth aspect, in the film forming step, the insulating film formed on the semiconductor layer substrate is a thermal oxide film formed by thermal oxidation, and thereafter, a film structure including a conductive layer is formed. When the ion-implanted layer is formed and then the lower layer of the thermal oxide film, that is, the portion located on the surface layer of the semiconductor layer substrate is separated in a separation step, and when the separation layer is formed as a semiconductor layer with the film structure on the support substrate side, The conductive layer in the film structure with respect to the semiconductor layer is formed via a thermal oxide film.
Thereby, when using the conductive layer as an embedded electrode,
A structure using a thermal oxide film as a gate electrode can be obtained, and excellent electrical characteristics can be obtained.

According to the sixteenth aspect of the present invention, in the trench etching step, the semiconductor layer formed over the entire surface of the support substrate is partially etched to form islands by trench etching. The semiconductor layer can be separated for each formation region. Then, the trench etching step can be performed by forming a nitride film as a mask member and performing a dry etching process.

According to the eighteenth aspect, in the film forming step, a film structure including a conductive layer is formed on the supporting substrate,
This film structure is etched so as to be separated into islands in a trench etching step, and an ion implantation layer for peeling is formed on a semiconductor layer substrate in an ion implantation layer forming step,
In the bonding step, the two substrates are bonded together, and in the subsequent peeling step, the bonded substrates are heat-treated to be separated in the ion-implanted layer portion, and are selected in the island-shaped portion of the film structure on the supporting substrate. It becomes possible to form a semiconductor layer.

According to the nineteenth aspect of the present invention, in the embedding step, the space between the island-shaped semiconductor layers formed on the supporting substrate is filled with an insulating material. The semiconductor layers can be electrically separated well from each other to be in an insulating state.

According to the twentieth aspect of the present invention, such an embedding step is performed by thermally oxidizing a portion between the island-shaped semiconductor layers to form an oxide film. Is filled with an oxide film deposited by a chemical vapor deposition method as an insulating material, and then a planarization process is performed so that the surface of the semiconductor layer is exposed, thereby exposing the surfaces of the separated semiconductor layers. Thus, the separation groove between them can be embedded with an insulating material. In this case, as the flattening process, in the invention of claim 21, polishing is performed, and in the invention of claim 22,
This can be performed by an etch-back process.

According to the twenty-third aspect of the present invention, in the selective oxidation step, the semiconductor layer formed on the supporting substrate is selectively oxidized and separated for each element formation region. Insulation can be separated for each element formation region.

According to a twenty-fourth aspect of the present invention, in the trench forming step, a conductive layer is separated by forming a trench in a selective oxide film portion formed so as to separate the semiconductor layer on the supporting substrate. In the layer etching step, the conductive layer is formed so as to reduce the area of the conductive layer by performing a wet etching process so as to selectively etch the conductive layer. Therefore, the conductive layer is separated into a narrower region than the semiconductor layer formed separately. Therefore, the degree of freedom in the structural design for element formation can be increased, and the versatility can be increased.

According to the twenty-fifth aspect of the present invention, the burying insulating material is deposited on the surface of the support substrate after the conductive layer etching step by the deposition step, and the burying insulating material is thermally flowed by the heat treatment step. Then, the buried insulating material is polished so that the surface of the semiconductor layer is exposed by a polishing process, thereby filling the etching region portion of the conductive layer so that no void is formed. It is possible to prevent a problem of deterioration in reliability due to time use or deterioration of characteristics due to segregation of contaminants.

According to the twenty-sixth aspect of the present invention, since the peeling surface of the semiconductor layer obtained in the peeling step is flattened by the polishing step, a flat surface suitable for element formation is provided without unevenness of the peeled surface. Will be able to do it.

According to the twenty-seventh aspect of the present invention, in the steps after the peeling step, the heat treatment step is performed in an oxidizing atmosphere to oxidize the semiconductor layer side at the interface between the semiconductor layer and the oxide film. Instead of using the interface between the semiconductor and the oxide film at the time, the semiconductor layer can be formed as being in contact with the interface between the semiconductor layer and the oxide film formed by thermal oxidation. In the case where the embedded electrode is provided by the provided conductive layer, the electrical characteristics can be improved.

[0029]

BEST MODE FOR CARRYING OUT THE INVENTION

(First Embodiment) Hereinafter, a first embodiment of the present invention will be described with reference to FIGS. FIG.
(D) shows a schematic sectional structure of the SOI substrate 1 as a semiconductor substrate. In the SOI substrate 1, an oxide film 3 is provided on a single crystal silicon substrate 2 as a support substrate, and a film structure 6 including a polycrystalline silicon film 4 and an oxide film 5 is provided.
In this configuration, a single crystal silicon thin film 7 as a semiconductor layer is formed thereon.

The single-crystal silicon substrate 2 is, for example, a P-type one having a plane orientation of <100> and a specific resistance of 5 to 10 Ω · c.
m is used. The oxide film 3 constituting the film structure 6 is a thermal oxide film, PVD (Physical Vapor Deposition).
It is an oxide film or a CVD (Chemical Vapor Deposition) oxide film. The polycrystalline silicon film 4 as a conductive layer is
It is formed by a PCVD method, and is doped with a P-type or N-type impurity as needed, is formed to have a predetermined resistance value, and is formed to a thickness of several hundreds to 500 nm. Another oxide film 5 of the film structure 6 is
Assuming that the polycrystalline silicon film 4 is used as a buried electrode, the polycrystalline silicon film 4 is formed to a thickness of, for example, about 100 nm and provided so as to function as a gate oxide film.

A single crystal silicon thin film 7 as a semiconductor layer is formed on the film structure 6 by bonding and peeling as described later.
The film is formed to have a film thickness corresponding to each application when used as the SOI substrate 1. For example, in a general application, the thickness is set in a range from about 0.05 μm to several μm.

The film structure 6 and the single-crystal silicon thin film 7 formed in this manner are separated from the conductive layer 5 of the film structure 6 by a trench 8 as shown in FIG. The lower conductive layer 5 is divided into islands. The trench 8 is buried with a silicon oxide 9 as an insulating material as described later. SO in the state thus formed
The I-substrate 1 corresponds to a semiconductor substrate according to a sixth aspect of the present invention.

Next, a method of manufacturing the above-described SOI substrate 1 will be described. FIG. 1 schematically shows the flow of the entire process in the case of manufacturing the SOI substrate 1. Referring to FIG. 1 and FIGS. 2 and 3 showing schematic cross sections in each process. The manufacturing process will be described.

The film forming step of forming the film structure 6 on the single crystal silicon substrate 2 as a supporting substrate includes an oxide film forming step P1, a polycrystalline silicon film forming step P2, and an oxide film forming step P3. In the oxide film forming step P1, an oxide film 3 is formed on the single crystal silicon substrate 2 by a method such as a thermal oxidation method or a CVD method so as to have a predetermined thickness (see FIG. 2A).

In the polycrystalline silicon film forming step P2, a polycrystalline silicon film 4 is deposited on the oxide film 3 by the LPCVD method (see FIG. 3B). At this time, the film thickness of the polycrystalline silicon film 4 is determined in advance by a reduction in a post-process so that the film thickness at the stage when the final process is completed becomes a desired film thickness (for example, in a range of several hundreds to 500 nm). In consideration of the thickness. This is because the next oxide film forming step P
Also related to 3.

The polycrystalline silicon film 4 can be formed in a state in which impurities of a predetermined conductivity type are included by performing it in an atmosphere containing impurities during the formation process, or a non-doped film is formed. After that, the impurity can be doped by a method such as ion implantation or thermal diffusion of the impurity. This is performed to reduce the electric resistance when the polycrystalline silicon film 4 is used as a buried electrode (back gate).

Next, in an oxide film forming step P3, an oxide film 5 is formed by a thermal oxidation method, a PVD method, a CVD method, or the like (see FIG. 3C). At this time, in the thermal oxidation method, the surface of the polycrystalline silicon film 4 is formed as an oxide film 5 by thermal oxidation, and the polycrystalline silicon film 4 corresponding to the formed oxide film 5 is reduced. Therefore, it is necessary to form the film in a thickness that allows for this in advance. In the case of forming by the CVD method, there is no reduction here.

In this case, as the oxide film 5, for example, 10
It is formed to a thickness of about 0 nm. This is because, when the polycrystalline silicon film 4 is used as a buried electrode, that is, as a back gate, the oxide film 5 functions as a gate oxide film. It is necessary to set the thickness, and it is necessary to consider the film quality in terms of electrical characteristics.

Next, an oxide film 11 is formed on the single crystal silicon substrate 10 as a semiconductor layer substrate in an oxide film forming step P4. This is because the ion implantation layer forming step P
5, the single crystal silicon substrate 10
Is provided to prevent damage to the surface layer or contamination by heavy metals and the like.

In the ion implantation layer forming step P5, the oxide film 1
Hydrogen, a rare gas, or a halogen-based ion is implanted into the single-crystal silicon substrate 10 at a high concentration at a predetermined depth from the surface on which 1 is formed to form an ion implantation layer 12 for separation (FIG. d)). In this case, the depth dimension at which the ion implantation layer 12 is formed is set so as to correspond to the thickness of the semiconductor layer to be formed, that is, the single crystal silicon thin film 7, and is adjusted by the acceleration voltage. The amount of ions to be implanted is, for example, 1 × 10 ¹⁶ atoms / cm ³ or more, and preferably about 5 × 10 ¹⁶ atoms / cm ³ .

Thereafter, the single crystal silicon substrate 10 on which the ion-implanted layer 12 is formed proceeds to the next step while leaving the oxide film 11 as it is, or is entirely removed by etching, or the surface layer is removed by etching. However, it is possible to consider three types of processing methods such as shifting to the next step in a state where an oxide film remains on the surface of the single-crystal silicon substrate 10, and it is possible to select and execute the processing method as needed.

Here, a process is employed in which the oxide film 11 is entirely removed by etching. This takes into account the fact that contamination and damage received in the ion implantation step are removed and that the oxide film 5 is formed on the surface of the single crystal silicon substrate 2 to be bonded in the next step. It is what we have adopted.

In the next bonding step P6, the single-crystal silicon substrates 2 and 10 obtained as described above are bonded, but prior to this, a hydrophilic treatment is performed. This is performed, for example, at 90 ° C. in a solution in which sulfuric acid (H ₂ SO ₄ ) and hydrogen peroxide solution (H ₂ O ₂ ) are mixed at a ratio of 4: 1.
After cleaning at a predetermined temperature in the range of 120 ° C. to 120 ° C., pure water cleaning is performed sequentially, and the amount of water adsorbed on the substrate surface is controlled by spin drying to form a film structure 6 of the single crystal silicon substrate 2. And the surface of the single-crystal silicon substrate 10 on which the ion-implanted layer 12 is formed is adhered to each other (see FIG. 3A). As a result, the interface where the two are bonded together comes into close contact with each other by the hydrogen bond between the silanol group formed on the surface of each substrate and the water molecule adsorbed on the surface.

Thereafter, in the peeling step P7, the single crystal silicon substrates 2 and 10 in the bonded state are subjected to a heat treatment in two stages. That is, in the first heat treatment, when the ion-implanted layer 12 is formed by implanting hydrogen ions, the ion-implanted layer 12 has a temperature range of 400 ° C. to 600 ° C., for example, 500 ° C.
The heat treatment is performed at a temperature of the order. As a result, defects are intensively formed in the portion of the ion-implanted layer 12 formed in the single-crystal silicon substrate 10, that is, the high-concentration region layer portion of hydrogen, and the surface portion of the single-crystal silicon substrate 10 is separated to form the single-crystal silicon substrate 2. The single-crystal silicon thin film 7 is formed on the film structure 6 on the surface of the single-crystal silicon substrate 2 while being left on the side.

At this time, a dehydration-condensation reaction occurs at the interface of the bonded portions, and the bonding strength between the two, that is, the film structure 6 and the single-crystal silicon thin film 7 is increased. Thus, the basic structure of the SOI substrate 1 can be obtained by forming the single crystal silicon thin film 7 in a state of being bonded to the single crystal silicon substrate 2 side.

Next, in the second heat treatment, in order to further increase the degree of adhesion between the bonded single-crystal silicon thin film 7 and the oxide film 5 of the film structure 6, for example, 1000 ° C. to 120 ° C.
The heat treatment is performed at a temperature in the range of 0 ° C. and preferably about 1100 ° C. As a result, on the adhesive surface, the above-mentioned dehydration condensation reaction proceeds further, and the state of close contact between the two is enhanced.

In the course of the above-mentioned second heat treatment, the substrate is exposed to an oxidizing atmosphere under appropriate conditions during the heat treatment.
A thin oxide film is formed on the surface of the single-crystal silicon thin film 7 and on the interface between the oxide films 5. Thereby, an oxide film (not shown) is formed on the surface portion of the single-crystal silicon thin film 7 so as to reduce unevenness (for example, unevenness in a range of several nm to several tens of nm) of the peeled surface caused by the peeling. That is, by removing this by etching, flattening can be achieved and the amount of polishing in the next polishing step P8 can be reduced.

At the interface of the single crystal silicon thin film 7, the oxide film formed by thermal oxidation is formed integrally with the oxide film 5 of the film structure 6, so that the single crystal silicon thin film 7 Although the film thickness is reduced by that amount, the interface between the single crystal silicon thin film 7 and the oxide film 5 can be formed at a position different from the actual interface at the time of bonding. The electrical properties can be improved by modifying the level of the portion.

When the peeling step P7 is completed as described above, the oxide film thinly formed on the surface of the single-crystal silicon thin film 7 is removed with a hydrofluoric acid-based etching solution. In addition to eliminating the steps of the irregularities, the residual defect layer generated and remaining in the ion-implanted layer forming step P5 is removed.
In order to make the film thickness of the final required film thickness,
A polishing process is performed. In this polishing process, for example, CMP
The peeled surface is finished by a (chemical mechanical polishing) method.

In this way, a semiconductor substrate 13 having a structure in which the film structure 6 is formed on the single-crystal silicon substrate 2 as the support substrate and the single-crystal silicon thin film 7 as the semiconductor layer for element formation is provided. (See FIG. 2B).
The semiconductor substrate 13 corresponds to the semiconductor substrate according to claims 1 to 3 of the present invention.

Subsequently, in a trench etching step P9, a portion from the single-crystal silicon thin film 7 on the surface to the oxide film 5 and the polycrystalline silicon film 4 constituting the film structure 6 is separated into islands for each element formation region. Then, an etching process for forming the trench 8 is performed. As a result, a semiconductor substrate 14 having a structure in which the single-crystal silicon thin film 7 and the conductive layer 4 as the semiconductor layers of the semiconductor substrate 13 are formed in an island shape is obtained (see FIG. 3C). Here, the semiconductor substrate 14 corresponds to the semiconductor substrate according to claims 4 and 5 of the present invention.

Thereafter, a buried oxide film forming step 10
Then, a buried oxide film 9 as an insulating material is formed inside the trench 8 to perform insulation isolation. Thus, the SOI substrate 1 as a semiconductor substrate is formed (see FIG. 3E). Here, the SOI substrate 1 corresponds to the semiconductor substrate according to claim 6 of the present invention.

Now, the above-described trench etching step P9
4 and the next embedded oxide film forming step P10
This will be described in detail with reference to FIG. That is, FIG. 4 schematically shows the manufacturing process, and FIGS.
Is a schematic cross section shown for each process.

First, in the oxide film forming step Q1, FIG.
An oxide film 15 is formed on the surface of the semiconductor substrate 13 in the state shown in FIG. The thickness of the oxide film 15 is, for example, 10
It is formed to a thickness of about 50 nm by a thermal oxidation method or a CVD method. Next, in the nitride film forming step Q2, the oxide film 1 is formed.
A nitride film 16 is formed on 5. The nitride film 16 has a thickness of, for example, about 100 to 300 nm and is formed by the LPCVD method (see FIG. 5A). The nitride film 16 also functions as a polishing stopper in a polishing step Q10 to be described later, and the oxide film 15 is for relaxing the stress generated when the nitride film 16 is provided.

Next, a photoresist patterning step Q
In 3, an etching mask for trench etching is formed by a photoresist, and a photoresist is coated, exposed, and developed by a photolithography process to form a photoresist pattern 17. Thereafter, in a nitride film / oxide film removing step Q4, the nitride film 16 and the oxide film 15 exposed in the opening 17a of the photoresist pattern 17 are removed by etching to expose the surface of the underlying single crystal silicon thin film 7. (See FIG. 3B).

In the trench etching step Q5, the single-crystal silicon thin film 7, the oxide film 5 of the film structure 6, and the polycrystalline silicon film 4 exposed in the opening 17a of the photoresist pattern 17 formed as a mask member are dry-etched. To form a trench 8 so as to expose the surface of the oxide film 3 (see FIG. 3C).

At this time, it is necessary to set etching conditions such as gas conditions so that the taper angle (rise angle) θ of the side wall of the trench 8 is 90 ° or less in consideration of a post-process. Gas types used for dry etching are HBr (hydrogen bromide), Cl2 (chlorine), He / O2 (helium / oxygen) gas, and the like as in the case of trench etching by ordinary dry etching.
The etching depth is generally in the range of about 0.3 μm to 1.0 μm. Further, as the etching proceeds, the photoresist pattern 17 is also etched and removed to some extent at the same time, so that the thickness of the photoresist pattern 17 is reduced. Therefore, it is necessary to set the film thickness of the photoresist pattern 17 in consideration of the amount. .

Next, in a resist removal step Q6, the photoresist pattern 17 is removed by a general method to perform a surface treatment. Then, in a thermal oxidation step Q7, a thermal oxidation treatment (heat treatment temperature is, for example, 1000 ° C. or higher) To form a thermal oxide film 18 on the bottom and side walls of the trench 8 by a predetermined thickness (for example, a thickness of 10 to 100 nm) (see FIG. 6A). At this time, since the nitride film 16 is left on the surface of the single-crystal silicon thin film 7, no oxide film is formed by thermal oxidation. By forming the thermal oxide film 18, damage remaining on the surface when the trench 8 is formed can be removed, and the corner of the trench can be rounded smoothly (for example, the radius of curvature is reduced). About 50 nm or more).

Subsequently, in a buried oxide film forming step Q8, an oxide film 19 is deposited by, for example, a CVD method in order to perform a flattening process. At this time, the thickness of the oxide film 19 is larger than the depth dimension of the trench 8, and the oxide film 19 is formed so as to sufficiently fill the inside of the trench 8 with the oxide film 19 (see FIG. 2B).

In place of the oxide film 19, a TEOS film or the like is formed as a planarizing film,
A film such as G or BPSG may be formed. Thereafter, in a heat treatment step Q9, a heat treatment is performed at a temperature of about 1000 ° C. so as to use the thermal fluidity of the oxide film 19 to fill the trench 8 with the oxide film 19 without gaps.

Next, in the polishing step Q10, a polishing process is performed from the surface of the oxide film 19 by a CMP (chemical mechanical polishing) method. At this time, the polishing process is a selective polishing process in which the previously formed nitride film 16 is used as a polishing stopper, and the polishing process is performed when the nitride film 16 is exposed by utilizing the fact that the polishing speed of the nitride film 16 is lower than that of the oxide film 19. Stop polishing with. Thereby, it can be formed in a state where silicon oxide 9 is buried in trench 8. Then, in a nitride film and oxide film removing step Q11, the nitride film 16 and the oxide film 15 are removed by etching to obtain the SOI substrate 1 as a semiconductor substrate (see FIG. 3C).

According to this embodiment, the following effects can be obtained. First, a semiconductor substrate 13 is formed by bonding and peeling a monocrystalline silicon thin film 7 as a semiconductor layer on a film structure 6 having a polycrystalline silicon film 4 as a conductive layer formed on the entire surface. Therefore, by providing the entire film structure as a film over the entire surface, the film can be formed homogeneously, the single-crystal silicon thin film 7 can be formed with high accuracy, and the variation can be reduced even when the film is formed thin. Will be able to

Second, by forming a trench 8 in such a semiconductor substrate 13, the single crystal silicon thin film 7 is separated into an element formation region and the polycrystalline silicon film 4 is also separated. Even when an element having a configuration using the silicon film 4 as a back gate is formed, an element isolation region can be easily formed.

Third, element isolation can be ensured by dividing the element into isolation regions by trenches 8 and filling the trenches 8 with silicon oxide 9. It can be formed into a shape.

Fourth, in the peeling step P7, the interface between the single crystal silicon thin film 7 and the oxide film 5 is shifted to a different position with respect to the bonding surface by performing a heat treatment in an oxidizing atmosphere. As for the characteristics, the electric characteristics can be improved.

In the above embodiment, the oxide film 19 deposited in the buried oxide film forming step Q8 is planarized by chemical mechanical polishing in the polishing step Q10 after the heat treatment step Q9. Instead, the same flattening process can be performed by performing an etch-back process on the oxide film 19.

(Second Embodiment) FIGS. 7 and 8 show a second embodiment of the present invention. The difference from the first embodiment is that the semiconductor substrate 13 is manufactured up to the state thereof. This is a step of forming a film structure 6 on a single crystal silicon substrate 10 as a semiconductor layer substrate. Hereinafter, portions different from the first embodiment will be briefly described with reference to the process explanatory diagram of FIG.

As described above, the film structure 6 is formed on the single crystal silicon substrate 10 which is a substrate for a semiconductor layer. An oxide film forming step R1, a polycrystalline silicon film forming step R2, and an oxide film forming step R3 are performed on the single crystal silicon substrate 10 in the same manner as in the first embodiment. Polycrystalline silicon film 4 and oxide film 5 as conductive layers
Is formed to provide a film structure 6 (see FIG. 8A).

In this embodiment, the oxide film 3 of the film structure 6 formed as described above is used as a gate oxide film with respect to the polycrystalline silicon film 4 as a conductive layer, as described later. Therefore, for example, in the oxide film forming step R1, when the single crystal silicon substrate 10 is formed as the thermal oxide film 3 by thermally oxidizing the single crystal silicon substrate 10, compared to when the single crystal silicon substrate 10 is deposited by the CVD method or the like, Excellent characteristics can be obtained.

Thereafter, in an ion-implanted layer forming step R4, ions are implanted from the surface of the single crystal silicon substrate 10 on which the film structure 6 is formed to form an ion-implanted layer 12 (see FIG. 2B). . At the time of the ion implantation, as described above, hydrogen, a rare gas, or a halogen-based ion is implanted at a high concentration to a predetermined depth to form an ion implantation layer 12 for stripping. Since the ion implantation layer 12 is formed through the ion implantation, it is necessary to adjust and set the acceleration voltage so that the ion implantation layer 12 is implanted to that depth.

Next, in a bonding step R5, after performing a pretreatment such as cleaning in the same manner as described above, the single crystal silicon substrate 10 on which the ion-implanted layer 12 is formed is transferred to the single crystal silicon substrate 2 as a support substrate. Affix (see FIG. 3 (c)). In this case, the single crystal silicon substrate 2 may be used as the support substrate, or another support substrate may be used instead.

Subsequently, when peeling is performed in a peeling step R6, a film structure 6 and a single-crystal silicon thin film 7 as a semiconductor layer are formed on a single-crystal silicon substrate 10 as equivalent to the semiconductor substrate 13 in the first embodiment. Is obtained (see FIG. 3D). Note that the semiconductor substrate 20 corresponds to claim 1 of the present invention.
This corresponds to the semiconductor substrate described in Nos. 1 to 3.

Thereafter, in the same manner as in the first embodiment, the peeled surface of the single-crystal silicon thin film 7 is polished in a polishing step R7 so as to flatten the irregularities, followed by a trench etching step R8 and a buried oxide film forming step. By sequentially performing R9, the same SOI substrate as the SOI substrate 1 in the first embodiment is obtained.
An I substrate can be obtained.

According to the second embodiment, the same SOI substrate as that of the first embodiment can be obtained, and the structure of the semiconductor substrate 20 allows the polycrystalline silicon film 4 as a conductive layer to be formed. Since the single-crystal silicon thin film 7 is formed via the oxide film 3 formed by thermal oxidation, when the polycrystalline silicon film 4 is used as a back gate, good electrical characteristics are obtained. Can be.

The single-crystal silicon substrate 2 as a support substrate only needs to have a function of supporting the film structure 6 and the single-crystal silicon thin film 7. Can be reduced, so that the production cost can be reduced.

(Third Embodiment) FIGS. 9 and 10 show a third embodiment of the present invention. The difference from the first embodiment is that trench etching is performed before the bonding step. Therefore, a manufacturing process for forming a semiconductor substrate 14 at the end of the peeling process has been adopted. Hereinafter, portions different from the first embodiment will be briefly described with reference to the process explanatory diagram of FIG.

As described above, the oxide film 3 and the polycrystalline silicon film formation process P2 are performed on the single crystal silicon substrate 2 as the support substrate, thereby forming the oxide films 3 and 3. The polycrystalline silicon film 4 and the oxide film 5 are sequentially laminated to form a film structure 6 (FIG. 10).
(A)). The steps up to here are the same as in the first embodiment.

Subsequently, in a trench etching step Pa, a trench 21 is formed in the single crystal silicon substrate 2. Here, for example, a photoresist 21 is patterned on the surface of the oxide film 5 to form a mask member, and dry etching is performed through a patterning opening to form a trench 21 etched to a portion where the oxide film 3 is exposed. I do. Thereafter, the mask member formed of the photoresist is removed.

Next, an oxide film forming step P4 and an ion implanted layer forming step P5 are performed on the single crystal silicon substrate 10 as a semiconductor layer substrate to form an ion implanted layer 12 at a predetermined depth. And Thereafter, in a bonding step P6, the single-crystal silicon substrate 2 having the trench 21 formed in the film structure 6 and the single-crystal silicon substrate 10 having the ion-implanted layer 12 formed thereon are subjected to the same hydrophilic treatment as described above. And stick them together.

Next, as described above, in the separation step P7, heat treatment is performed to perform separation. At this time, of the surface of the single crystal silicon substrate 10 on the side where the ion implantation layer 12 is formed, the single crystal silicon The surface of the substrate 2, that is, the portion 10 a facing the oxide film 5 is in close contact with the oxide film 5, but the portion 10 b corresponding to the portion where the trench 21 is formed and the oxide film 3 is exposed is They are simply facing each other with a gap.

Therefore, even if separation occurs in the ion implantation layer 12 in the separation step P 7, only the surface 10 a of the single crystal silicon substrate 2 is separated as the single crystal silicon thin film 7, and the single crystal silicon thin film 7 is in close contact with the oxide film 5. And the surface 10
The portion b remains on the single crystal silicon substrate 10 as it is, or comes off without being bonded to the single crystal silicon substrate 2 side. As a result, the single-crystal silicon thin film 7 is formed so as to be selectively bonded only to the surface of the oxide film 5 (see FIG. 4D). Thereby, the semiconductor substrate 2 equivalent to the semiconductor substrate 14 in the first embodiment
2 are formed.

Thereafter, the peeled surface is flattened through the same polishing step P8 as described above, and then the embedded oxide film forming step P10 is performed without performing the trench etching step to obtain the SOI substrate 1. become. In the buried oxide film forming step P10, the silicon oxide 9 can be filled in the trench 21 by performing the steps shown in FIG. 4 except for the step related to trench etching.

According to such a third embodiment, the first
Since the same effects as those of the first embodiment can be obtained, and the trench etching step Pa is performed first, the film thickness to be removed by etching can be reduced by the thickness of the single crystal silicon thin film 7, and the single crystal silicon thin film Can be selectively bonded.

(Fourth Embodiment) FIGS. 11 to 13 show a fourth embodiment of the present invention.
With respect to the SOI substrate 1 formed in the embodiment,
By further processing, an element formation region is formed separately on the single-crystal silicon thin film 7.

FIG. 12 shows an SOI substrate 24 having a structure in which an element isolation region 23 is provided in the single crystal silicon thin film 7 of the SOI substrate 1. In this case, the aforementioned trench 8
With respect to the region of the polycrystalline silicon film 4 (conductive layer) separated by (21), the element isolation region 23 is a region narrower than that and is selectively oxide film 25 so as to be separated into two regions. Is provided. In addition,
The SOI substrate 24 corresponds to a semiconductor substrate according to claims 7 to 9 of the present invention.

In the SOI substrate 24, for example, n-channel and p-channel FETs are formed in the illustrated element isolation regions 23 and 23 having the same polycrystalline silicon film 4 region as a back gate, thereby forming a CMOS circuit. In such a case, the device can be used for a device having a configuration in which a voltage is applied to each FET from the same back gate (4) to change the threshold voltage, thereby controlling the characteristics of the element. .

Next, a method of manufacturing the SOI substrate 24 will be briefly described with reference to a manufacturing process diagram of FIG. 11 and FIG. In the SOI substrate 1 formed in the first embodiment, in the nitride film forming step T1,
A nitride film 26 is formed on the entire surface (see FIG. 13A). Thereafter, an opening 26a is formed in a predetermined portion of the nitride film 26 by photolithography. In this case, for example,
An opening 26a is formed so as to open a region including the portion of the silicon oxide 9 formed in the trench 8 (21) (see FIG. 3B).

Subsequently, in the selective oxidation step T2, the above-mentioned substrate is thermally oxidized to form the opening 2 in the nitride film 26.
The single-crystal silicon thin film 7 exposed on 6a is selectively oxidized to form a thermal oxide film 25 corresponding to the film thickness. This is the so-called LOCOS (LOCal Oxidatio
In an oxidation method called an n of Silicon method, a portion covered with the nitride film 26 is prevented from invading oxygen, so that only the opening 26a is selectively oxidized. Is the way.

Thereafter, in a nitride film removing step T3, the nitride film 26 remaining on the surface is removed by a general method, and the final SOI substrate 24 is obtained. In addition,
In the description of the manufacturing method, the case where only the portion where the trench 8 (21) is formed is formed in the selective oxide film 25 is shown. However, as shown in the configuration of FIG. 12, the opening 26a is formed in the portion without the trench 8 (21). Is formed to form the selective oxide film 25, the structure as shown in the SOI substrate 24 can be obtained.

According to such a fourth embodiment, the SO
Even when the region of the single-crystal silicon thin film 7 and the region of the polycrystalline silicon film 4 as the conductive layer are both formed as the same shape and the same region as in the I-substrate 1, the region of the single-crystal silicon thin film 7 is appropriately adjusted. By separately forming the element formation region 25, the configuration in which the element formation region 25 narrower than the region of the polycrystalline silicon film 4 can be manufactured.
An SOI substrate 24 with high availability can be obtained even in element formation.

(Fifth Embodiment) FIGS. 14 to 17 show a fifth embodiment of the present invention. The difference from the fourth embodiment is that the single crystal silicon thin film 7 is formed separately. A polycrystalline silicon film 4 as a conductive layer is formed in a narrower region than the element formation region.
The OI substrate 27 is about to be formed.

FIG. 15 shows a cross section of the SOI substrate 27 in which the oxide film 3, the polycrystalline silicon film 4 and the oxide film 5 constituting the film structure 6 are laminated on the single crystal silicon substrate 2. Polycrystalline silicon film 4 is formed so as to be narrower than oxide film 5 separated into a predetermined region. The single crystal silicon thin film 7 provided on the oxide film 5 is formed as an element formation region 29 whose region is narrowed by the selective oxide film 28. A space between adjacent element formation regions 29, 29 is filled with silicon oxide 30 as a buried oxide film. The semiconductor substrate 27 corresponds to the semiconductor substrate according to claims 7 and 10 of the present invention.

Next, a method of manufacturing the SOI substrate 27 will be described with reference to a manufacturing process diagram of FIG. 14 and FIGS. First, a nitride film forming step U is performed on the semiconductor substrate 13 obtained in the first embodiment.
In FIG. 1, a nitride film 31 having a predetermined thickness is formed on the surface (see FIG. 16A). A predetermined region is opened by etching in the nitride film 31 by photolithography to form an opening 31a (see FIG. 3B).

In the next selective oxidation step U2, the selective oxidation film 28 is formed by performing thermal oxidation to selectively thermally oxidize the single crystal silicon thin film 7 exposed in the opening 31a of the nitride film 31. (See FIG. 3C). After this,
In the isolation etching step U3, trench etching is performed so as to form a trench 32 having an opening in the selective oxide film 28 (see FIG. 17A). In this case, the trench etching is performed by a method such as dry etching after patterning with a photoresist except for the portion to be etched in the same manner as described above, and the selective oxide film 28, the oxide film 5, and the polycrystalline silicon film 4 are formed. Are sequentially etched until the surface of oxide film 3 is exposed.

Next, a polycrystalline silicon etching step U4
In the above, the end face portion of the polycrystalline silicon film 4 exposed at the bottom of the trench 32 is etched inward,
An opening 33 having an opening wider than the trench 32 is formed. This is performed by, for example, a wet etching process, and is performed by using an etchant that selectively etches the polycrystalline silicon film 4 until the etching proceeds to a desired size inside (see FIG. 3B).

Thereafter, in an oxide film forming step U5, an oxide film 30 is deposited on the surface by CVD or the like. In this case, the oxide film 30 to be deposited is provided with a sufficient thickness in the same manner as described above so that the trench 32 is filled.
Subsequently, a heat treatment step U6 is performed to thermally flow the oxide film 30 so that the opening 33 is sufficiently filled with the oxide film 30. The heat treatment conditions at this time are as follows:
And the size of the opening 33.

Then, oxide film 30 deposited on the surfaces of trench 32 and nitride film 31 is removed by polishing in the next polishing step U7. At this time, by using the nitride film 31 as a polishing stopper, it is possible to reliably recognize the stop of polishing. Thereafter, the nitride film 3
When 1 is removed, an SOI substrate 27 in which the single-crystal silicon thin film 7 is separated for each element formation region 29 is obtained.

According to the fifth embodiment, the polycrystalline silicon film 4 formed in a smaller area than the element forming area 29 in which the single crystal silicon thin film 7 is separated is formed.
Can be obtained, whereby the configuration using the polycrystalline silicon film 4 as the back gate can be processed into a desired shape, and the degree of freedom for design is improved.

The present invention is not limited to the above embodiment, but can be modified or expanded as follows. As the silicon substrate on which the ion-implanted layer is formed, a single-crystal thin-film layer formed by epitaxial growth on a supporting substrate or a single-crystal thin-film layer formed by epitaxial growth on porous silicon can be used. In each case, an ion-implanted layer for separation can be formed by performing ion-implantation in the step of forming an ion-implanted layer in the epitaxial film or the porous film.

Although the case where only one polycrystalline silicon film 4 is provided as a conductive layer has been described, a configuration in which a plurality of conductive layers are provided in an insulated state with an insulating film such as an oxide film interposed therebetween may be employed. Further, the conductive layer may be used other than the back gate, and can be used as, for example, a wiring.

The conductive layer is not limited to polycrystalline silicon, but may be made of another semiconductor material, or may be amorphous other than polycrystalline. Further, in addition to a semiconductor material, it can be formed of a metal material. For example, a high melting point metal such as tungsten (W) or titanium (Ti), or a metal such as aluminum (Al) or copper (Cu) is used. Is also good.

[Brief description of the drawings]

FIG. 1 is a schematic explanatory view of a manufacturing process showing a first embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view showing a manufacturing process of an SOI substrate (part 1).

FIG. 3 is a schematic cross-sectional view showing a manufacturing process of the SOI substrate (part 2).

FIG. 4 is a schematic explanatory view of a manufacturing process for forming a trench and a silicon oxide.

FIG. 5 is a schematic cross-sectional view showing a manufacturing process of a trench and a silicon oxide (part 1).

FIG. 6 is a schematic cross-sectional view showing a manufacturing process of the trench and the silicon oxide (part 2).

FIG. 7 is a view corresponding to FIG. 1, showing a second embodiment of the present invention;

FIG. 8 is a schematic sectional view showing a manufacturing process of the SOI substrate.

FIG. 9 is a view corresponding to FIG. 1, showing a third embodiment of the present invention;

FIG. 10 is a schematic cross-sectional view showing a manufacturing process of an SOI substrate.

FIG. 11 is a schematic explanatory view of a manufacturing process of element isolation showing a fourth embodiment of the present invention.

FIG. 12 is a schematic cross-sectional view of an SOI substrate from which elements are separated.

FIG. 13 is a schematic cross-sectional view showing a manufacturing process of element isolation.

FIG. 14 is a view corresponding to FIG. 11, showing a fifth embodiment of the present invention;

FIG. 15 is a diagram corresponding to FIG. 12;

FIG. 16 is a schematic cross-sectional view showing a manufacturing process of element isolation (part 1).

FIG. 17 is a schematic cross-sectional view showing a manufacturing process of element isolation (part 2).

[Explanation of symbols]

1 is an SOI substrate (semiconductor substrate), 2 is a single crystal silicon substrate (supporting substrate), 3 is an oxide film, 4 is a polycrystalline silicon film (conductive layer), 5 is an oxide film, 6 is a film structure, 7 is a single crystal A silicon thin film (semiconductor layer), 8 a trench, 9 a silicon oxide, 10 a single crystal silicon substrate (semiconductor layer substrate),
11 is an oxide film, 12 is an ion implanted layer, 13 and 14 are semiconductor substrates, 15 is an oxide film, 16 is a nitride film, 17 is a photoresist pattern, 18 is a thermal oxide film, 19 is an oxide film, 20
Is a semiconductor substrate, 21 is a trench, 22 is a semiconductor substrate, 2
3 is an element isolation region, 24 is an SOI substrate (semiconductor substrate),
25 is a selective oxide film, 26 is a nitride film, 27 is an SOI substrate (semiconductor substrate), 28 is a selective oxide film, 29 is an element isolation region, 30 is a silicon oxide, 31 is a nitride film, 32 is a trench, and 33 is an opening. Department.

Claims (27)

[Claims] 1. A support substrate (2), at least one conductive layer (4) formed on the support substrate (2) in an insulated state, and formed on the conductive layer (4) in an insulated state. And a semiconductor layer (7) for forming an element. 2. The semiconductor substrate according to claim 1, wherein said conductive layer (4) is formed as a multilayer film layer (6) provided with insulating films (3, 5) above and below. Semiconductor substrate. 3. The semiconductor substrate according to claim 1, wherein the conductive layer (4) is a polycrystalline silicon film (4). 4. The semiconductor substrate according to claim 1, wherein the semiconductor layer (7) is formed in an island shape so as to be separated on a predetermined area on the support substrate (2). A semiconductor substrate, comprising: 5. The semiconductor substrate according to claim 4, wherein said conductive layer (4) is formed in an island shape separately with said semiconductor layer (7). 6. The semiconductor substrate according to claim 4, wherein an insulating material is buried between the island-shaped regions. 7. The semiconductor substrate according to claim 1, wherein said semiconductor layer (7) is separated for each element formation region (23, 29) by a selective oxide film (25, 28). A semiconductor substrate. 8. The semiconductor substrate according to claim 7, wherein the conductive layer (4) corresponds to an element forming region (23) separated by the selective oxide film (25) and is wider than the element forming region (23). A semiconductor substrate characterized by being formed separately. 9. The semiconductor substrate according to claim 7, wherein said conductive layer is formed so as to include a plurality of element forming regions separated by said selective oxide film. A semiconductor substrate, comprising: 10. The semiconductor substrate according to claim 7, wherein the conductive layer (4) is formed separately in a narrower region corresponding to an element formation region separated by the selective oxide film (28). A semiconductor substrate, comprising: 11. A conductive layer (4) for a supporting substrate (2).
(P1, P2) for forming a film structure (6) containing
2, P3) and an ion-implanted layer (1
Step (P5) of forming an ion-implanted layer for forming 2), and bonding a support substrate (2) having the film structure (6) formed thereon and a semiconductor layer substrate (10) having the ion-implanted layer (12) formed thereon. A bonding step (P6) for bonding, and a heat treatment is performed in a state where the support substrate (2) and the semiconductor layer substrate (10) are bonded to each other, and the support substrate (2) is peeled off at the ion implantation layer (12). 2)
The semiconductor substrate (1, 13, 14, 20, 24, 2) according to any one of claims 1 to 10, further comprising a peeling step (P7) of forming a semiconductor layer (7) thereon.
7) Manufacturing method. 12. A film forming step (R) for forming a film structure (6) including a conductive layer (4) on a semiconductor layer substrate (10).
An ion implantation layer forming step (R4) of forming a separation ion implantation layer (12) on the surface of the semiconductor layer substrate (10) on which the film structure (6) is formed; A bonding step (R5) for bonding a support substrate (2) to the surface of the substrate for semiconductor layer (10) on which the film structure (6) is formed; and a bonding step (R5) for the semiconductor layer substrate (10) and the support substrate ( 2)
The film structure (6) and the semiconductor layer (7) are formed on the supporting substrate (2) by performing a heat treatment in a state in which the film structure is bonded and peeling off at the ion implantation layer (12). The method for manufacturing a semiconductor substrate (1, 13, 14, 20, 24, 27) according to any one of claims 1 to 10, further comprising a peeling step (R6). 13. The method for manufacturing a semiconductor substrate according to claim 11, wherein said film forming step includes an insulating film forming step (P1, R) for forming a base insulating film (3).
1), a conductive layer forming step (P2, R2) of forming the conductive layer (4) on the lower insulating film (3) formed thereby, and an upper layer formed on the conductive layer (4) formed thereby. A method of manufacturing a semiconductor substrate, comprising: an insulating film forming step (P3, R3) of forming an insulating film (5). 14. The method of manufacturing a semiconductor substrate according to claim 13, wherein the film forming step includes the conductive layer forming step (P2, R2).
A polycrystalline silicon film (4) is formed as the conductive layer (4), and the insulating film forming step (P1, P3, R
(1) In the method of manufacturing a semiconductor substrate, an oxide film (3, 5) is formed as the insulating film (3, 5). 15. The method for manufacturing a semiconductor substrate according to claim 12, wherein in the film forming step, a thermal oxide film (3) is formed as an insulating film (3) formed on the semiconductor layer substrate (10). A method for manufacturing a semiconductor substrate, comprising: 16. A trench etching step (P9, Q5, R8, Pa) for partially etching a semiconductor layer (7) formed on a support substrate (2) to form an island shape. The method for manufacturing a semiconductor substrate according to any one of claims 4 to 10. 17. The method of manufacturing a semiconductor substrate according to claim 16, wherein said trench etching step (P9, Q5, R8, P
a) A method of manufacturing a semiconductor substrate, wherein the method is performed by dry etching using a nitride film (16) as a mask member. 18. A conductive layer (4) for a supporting substrate (2).
(P1, P2) for forming a film structure (6) containing
2, P3); a trench etching step (Pa) for etching the film structure (6) formed on the support substrate (2) so as to separate it into islands; Ion implantation layer (1
Step (P5) of forming an ion-implanted layer for forming 2), and bonding a support substrate (2) having the film structure (6) formed thereon and a semiconductor layer substrate (10) having the ion-implanted layer (12) formed thereon. A bonding step (P6) for bonding, and a heat treatment is performed in a state where the support substrate (2) and the semiconductor layer substrate (10) are bonded to each other, and the support substrate (2) is peeled off at the ion implantation layer (12). 2)
11. The semiconductor according to claim 4, further comprising a peeling step (P7) of forming an island-like semiconductor layer (7) in a portion corresponding to the film structure (6) above. A method for manufacturing a substrate (1, 13, 14, 20, 24, 27). 19. An embedding step (P10, Q8 to Q10) for filling an insulating material (9) between semiconductor layers (7) formed in an island shape on a support substrate (2). The method of manufacturing a semiconductor substrate according to claim 6. 20. The method of manufacturing a semiconductor substrate according to claim 19, wherein in the embedding step (P10, Q8 to Q10), a portion between the semiconductor layers (7) formed in an island shape is thermally oxidized. After performing the treatment to form an oxide film (Q7) and burying an oxide film (19) for depositing these portions by a chemical vapor deposition method as an insulating material (Q8), the surface of the semiconductor layer (7) (Q9, Q1)
0) A method for manufacturing a semiconductor substrate. 21. The method of manufacturing a semiconductor substrate according to claim 20, wherein the embedding step (P10, Q8 to Q10) performs a polishing process as the flattening process (Q10). Manufacturing method. 22. The method of manufacturing a semiconductor substrate according to claim 20, wherein said embedding step (P10, Q8 to Q10) performs an etch-back process as said planarization process. Method. 23. An element formation region (23, 2) by selectively oxidizing a semiconductor layer (7) formed on a support substrate (2).
The method of manufacturing a semiconductor substrate according to any one of claims 7 to 10, further comprising a selective oxidation step (T2, U2) for separating each of the semiconductor substrates. 24. Separation etching for separating a conductive layer (4) by forming a trench (32) in a portion of a selective oxide film (28) formed to separate a semiconductor layer (7) on a support substrate (2). Step (U3) and the trench (32) by wet etching.
The conductive layer (4) exposed at the inner bottom is trenched (3).
A conductive layer etching step (U4) of forming an area smaller than the isolation region (29) of the semiconductor layer (7) by etching inward from 2). Item 11. A method for manufacturing a semiconductor substrate according to item 10. 25. The method for manufacturing a semiconductor substrate according to claim 24, wherein a burying insulating material (30) is deposited on the surface of the support substrate (2) after the conductive layer etching step (U4). (U5) and a heat treatment step of heat-treating the buried insulating material (30) so as to fill the etching region of the conductive layer (4) formed in the conductive layer etching step (U4). (U6) and a polishing step (U7) of polishing the buried insulating material (30) such that a surface of the semiconductor layer (7) is exposed. 26. The method for manufacturing a semiconductor substrate according to claim 11, wherein the exfoliation surface of the semiconductor layer (7) obtained in the exfoliation step (P7, R6) is polished so as to be flat. A polishing step (P8, R7) to perform the method. 27. The method for manufacturing a semiconductor substrate according to claim 11, wherein in the steps after the peeling step (P7, R6), a heat treatment is performed in an oxidizing atmosphere to form the semiconductor layer. A method for manufacturing a semiconductor substrate, comprising: a thermal oxidation step of oxidizing an interface portion between the semiconductor layer (7) and the oxide film (5).