JPH11195775A - 半導体基板および薄膜半導体素子およびそれらの製造方法ならびに陽極化成装置 - Google Patents

半導体基板および薄膜半導体素子およびそれらの製造方法ならびに陽極化成装置

Info

Publication number
JPH11195775A
JPH11195775A JP9360428A JP36042897A JPH11195775A JP H11195775 A JPH11195775 A JP H11195775A JP 9360428 A JP9360428 A JP 9360428A JP 36042897 A JP36042897 A JP 36042897A JP H11195775 A JPH11195775 A JP H11195775A
Authority
JP
Japan
Prior art keywords
semiconductor
substrate
thin film
layer
porous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9360428A
Other languages
English (en)
Japanese (ja)
Inventor
Takeshi Matsushita
孟史 松下
Misao Kusunoki
美佐雄 楠
Takaaki Tatsumi
孝明 巽
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Priority to JP9360428A priority Critical patent/JPH11195775A/ja
Priority to US09/215,314 priority patent/US6214701B1/en
Priority to SG1998005869A priority patent/SG74107A1/en
Priority to SG9906443A priority patent/SG97825A1/en
Priority to KR1019980057604A priority patent/KR19990063376A/ko
Priority to EP98124609A priority patent/EP0928032A3/fr
Priority to IDP981691A priority patent/ID21598A/id
Priority to CN98126334A priority patent/CN1221218A/zh
Publication of JPH11195775A publication Critical patent/JPH11195775A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/127—The active layers comprising only Group III-V materials, e.g. GaAs or InP
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F71/00—Manufacture or treatment of devices covered by this subclass
    • H10F71/121—The active layers comprising only Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1914—Preparing SOI wafers using bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H10P90/1924—Preparing SOI wafers with separation/delamination along a porous layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/544—Solar cells from Group III-V materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/96—Porous semiconductor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/977—Thinning or removal of substrate

Landscapes

  • Weting (AREA)
  • Recrystallisation Techniques (AREA)
  • Formation Of Insulating Films (AREA)
JP9360428A 1997-12-26 1997-12-26 半導体基板および薄膜半導体素子およびそれらの製造方法ならびに陽極化成装置 Pending JPH11195775A (ja)

Priority Applications (8)

Application Number Priority Date Filing Date Title
JP9360428A JPH11195775A (ja) 1997-12-26 1997-12-26 半導体基板および薄膜半導体素子およびそれらの製造方法ならびに陽極化成装置
US09/215,314 US6214701B1 (en) 1997-12-26 1998-12-18 Semiconductor substrate and thin film semiconductor device, method of manufacturing the same, and anodizing apparatus
SG1998005869A SG74107A1 (en) 1997-12-26 1998-12-21 Semiconductor substrate and thin film semiconductor device method of manufacturing the same and anodizing apparatus
SG9906443A SG97825A1 (en) 1997-12-26 1998-12-21 Semiconductor substrate and thin film semiconductor device, method of manufacturing the same, and anodizing apparatus
KR1019980057604A KR19990063376A (ko) 1997-12-26 1998-12-23 반도체 기판, 박막 반도체 소자,이들의 제조 방법 및 양극화성 장치
EP98124609A EP0928032A3 (fr) 1997-12-26 1998-12-23 Substrat semiconducteur, dispositif semiconducteur à couches minces, procédé de fabrication et appareil d'anodisation
IDP981691A ID21598A (id) 1997-12-26 1998-12-24 Substrat semikonduktor dan piranti semikonduktor dengan film tipis, metoda pembuatannya, dan peralatan oksidasi anoda
CN98126334A CN1221218A (zh) 1997-12-26 1998-12-25 半导体衬底和薄膜器件及其制造方法以及阳极化处理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9360428A JPH11195775A (ja) 1997-12-26 1997-12-26 半導体基板および薄膜半導体素子およびそれらの製造方法ならびに陽極化成装置

Publications (1)

Publication Number Publication Date
JPH11195775A true JPH11195775A (ja) 1999-07-21

Family

ID=18469364

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9360428A Pending JPH11195775A (ja) 1997-12-26 1997-12-26 半導体基板および薄膜半導体素子およびそれらの製造方法ならびに陽極化成装置

Country Status (7)

Country Link
US (1) US6214701B1 (fr)
EP (1) EP0928032A3 (fr)
JP (1) JPH11195775A (fr)
KR (1) KR19990063376A (fr)
CN (1) CN1221218A (fr)
ID (1) ID21598A (fr)
SG (2) SG74107A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
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JP2004519093A (ja) * 2000-11-27 2004-06-24 エス　オー　イ　テク　シリコン　オン　インシュレータ　テクノロジース 基板、特に光学、電子工学または電子光学用基板の製造方法、およびこの製造方法により得られる基板
JP2024044461A (ja) * 2022-09-21 2024-04-02 キオクシア株式会社 半導体装置の製造方法

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US6159824A (en) * 1997-05-12 2000-12-12 Silicon Genesis Corporation Silicon-on-silicon wafer bonding process using a thin film blister-separation method
US6548382B1 (en) * 1997-07-18 2003-04-15 Silicon Genesis Corporation Gettering technique for wafers made using a controlled cleaving process
US6417069B1 (en) * 1999-03-25 2002-07-09 Canon Kabushiki Kaisha Substrate processing method and manufacturing method, and anodizing apparatus
US6204151B1 (en) * 1999-04-21 2001-03-20 Silicon Genesis Corporation Smoothing method for cleaved films made using thermal treatment
US6171965B1 (en) 1999-04-21 2001-01-09 Silicon Genesis Corporation Treatment method of cleaved film for the manufacture of substrates
US6287941B1 (en) 1999-04-21 2001-09-11 Silicon Genesis Corporation Surface finishing of SOI substrates using an EPI process
US6881644B2 (en) * 1999-04-21 2005-04-19 Silicon Genesis Corporation Smoothing method for cleaved films made using a release layer
US6664169B1 (en) * 1999-06-08 2003-12-16 Canon Kabushiki Kaisha Process for producing semiconductor member, process for producing solar cell, and anodizing apparatus
US6362075B1 (en) * 1999-06-30 2002-03-26 Harris Corporation Method for making a diffused back-side layer on a bonded-wafer with a thick bond oxide
JP4465745B2 (ja) * 1999-07-23 2010-05-19 ソニー株式会社 半導体積層基板，半導体結晶基板および半導体素子ならびにそれらの製造方法
US6500732B1 (en) 1999-08-10 2002-12-31 Silicon Genesis Corporation Cleaving process to fabricate multilayered substrates using low implantation doses
US6263941B1 (en) 1999-08-10 2001-07-24 Silicon Genesis Corporation Nozzle for cleaving substrates
EP1939932A1 (fr) * 1999-08-10 2008-07-02 Silicon Genesis Corporation Substrat avec une couche de séparation contrainte en silicium-germanium
JP2001085715A (ja) * 1999-09-09 2001-03-30 Canon Inc 半導体層の分離方法および太陽電池の製造方法
US7427526B2 (en) * 1999-12-20 2008-09-23 The Penn State Research Foundation Deposited thin films and their use in separation and sacrificial layer applications
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US8187377B2 (en) * 2002-10-04 2012-05-29 Silicon Genesis Corporation Non-contact etch annealing of strained layers
US7542197B2 (en) * 2003-11-01 2009-06-02 Silicon Quest Kabushiki-Kaisha Spatial light modulator featured with an anti-reflective structure
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US7811900B2 (en) * 2006-09-08 2010-10-12 Silicon Genesis Corporation Method and structure for fabricating solar cells using a thick layer transfer process
US9362439B2 (en) 2008-05-07 2016-06-07 Silicon Genesis Corporation Layer transfer of films utilizing controlled shear region
US8293619B2 (en) 2008-08-28 2012-10-23 Silicon Genesis Corporation Layer transfer of films utilizing controlled propagation
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CN110581058B (zh) * 2018-06-08 2022-01-18 上海和辉光电股份有限公司 一种多晶硅薄膜制作方法
JP2022034881A (ja) * 2020-08-19 2022-03-04 キオクシア株式会社 半導体装置、半導体装置の製造方法、および基板の再利用方法
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JP2024044461A (ja) * 2022-09-21 2024-04-02 キオクシア株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
ID21598A (id) 1999-07-01
KR19990063376A (ko) 1999-07-26
EP0928032A3 (fr) 1999-09-08
US6214701B1 (en) 2001-04-10
SG97825A1 (en) 2003-08-20
CN1221218A (zh) 1999-06-30
SG74107A1 (en) 2000-07-18
EP0928032A2 (fr) 1999-07-07

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