JPH11214432A - Semiconductor device and spacer forming method - Google Patents

Abstract

(57) [Problem] To provide a connection capable of keeping a constant distance between a semiconductor chip and a wiring board even if a positional shift between a mounting pad and a projecting electrode occurs. SOLUTION: In a semiconductor device in which a semiconductor chip 1 is connected on a wiring board 5 via a protruding electrode 2, at least three spacers 3 having the same height or lower than the height of other protruding electrodes 2 are formed. And a spacer forming method for electrically connecting only the protruding electrodes 2 of the above.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the connection between a semiconductor chip and a wiring board, and more particularly, to the connection between a semiconductor chip and a wiring board using flip-chip mounting using solder. And a semiconductor device for connecting to a mounting pad.

[0002]

2. Description of the Related Art In a conventional semiconductor device using flip-chip mounting, when a semiconductor chip and a wiring board are connected, in order to keep a uniform spacing dimension when the semiconductor chip and the wiring board are connected, As a semiconductor device using a spacer, for example, Japanese Patent Application Laid-Open No. Hei 7-226422 is cited.

The structure of a conventional semiconductor device using flip-chip mounting with spacers formed will be described with reference to FIGS.

FIG. 13 and FIG.
1 is a cross-sectional view illustrating a semiconductor device disclosed in Japanese Patent No. 6422. The structure of FIG. 13 will be described. Semiconductor chip 2
On 1, a protruding electrode 22 and a spacer 23 that are melted at a predetermined temperature are formed, and a small protrusion 26 having a smaller diameter than the spacer 23 is formed at the tip of the spacer 23. On the wiring substrate 25, the projecting electrodes 22 of the semiconductor chip 21 are provided.
The pad portion 24 is formed so as to correspond to the arrangement of the through holes 2 so as to correspond to the arrangement of the small projections 26 of the spacer 23.
7 are formed. The semiconductor chip 21 and the wiring board 25 are electrically connected by the protruding electrodes 22 formed on the semiconductor chip 21, and the small protrusions 26 of the spacer 23 are connected to the wiring board 25.
The semiconductor chip 21 and the wiring board 25 are positioned.

The structure shown in FIG. 14 will be described. On the semiconductor chip 21, a protruding electrode 22 and a spacer 23 that are melted at a predetermined temperature are formed. A pad portion 24 is formed on the wiring substrate 25 so as to correspond to the arrangement of the protruding electrodes 22 of the semiconductor chip 21, and a step 28 for regulating the position of the spacer 23 is formed. The semiconductor chip 21 and the wiring board 25 are electrically connected by the protruding electrodes 22 formed on the semiconductor chip 21, and the spacer 23 is connected to the wiring board 25.
Of the semiconductor chip 21
And the wiring board 25 are positioned.

[0006]

However, when a hole or a step is provided in the wiring board to position the spacer formed on the semiconductor chip side, a positional deviation between the electrode pad of the wiring board and the hole or the step occurs. As a result, the projecting electrodes and the electrode pads are obliquely joined as shown in FIG. As a result, stress on the connecting portion caused by inputting to an environmental test such as a temperature cycle test is concentrated, and the thermal fatigue life of the semiconductor device is reduced. In addition, when the positional deviation exceeds the allowable connection range, the protruding electrode and the electrode pad may not be connected.

(Object of the Invention) It is an object of the present invention to solve the above-mentioned problems and to keep the distance between the semiconductor chip and the wiring substrate constant even if the positional displacement between the mounting pad and the projecting electrode occurs. It is an object of the present invention to provide a possible semiconductor device and a method for forming a spacer.

[0008]

In order to achieve the above object, the structure of a semiconductor device and a method of manufacturing a spacer according to the present invention employ the following structures.

According to one aspect of the present invention, in a semiconductor device in which a semiconductor chip is connected to a wiring board via a protruding electrode, spacers having the same height or lower than the height of the other protruding electrodes are formed in at least three places. In addition, only the other protruding electrodes are electrically connected.

According to another aspect of the present invention, there is provided a semiconductor device in which a semiconductor chip is connected to a wiring substrate via a protruding electrode. The same or lower spacers are formed, and electrical connection is made only to the protruding electrodes of the semiconductor chip.

[0011]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.
The configuration of the semiconductor device according to the embodiment will be described. The structure of the first embodiment of the present invention will be described with reference to FIGS. 1 is a sectional view of a semiconductor device according to a first embodiment of the present invention, FIG. 2 is a plan view of an electrode side of a semiconductor chip 1, and FIG. 3 is a plan view of a wiring board on a semiconductor chip mounting side.

The semiconductor chip 1 will be described with reference to FIG.
An electronic circuit is formed on Si, and electrodes are formed of Al or the like as external terminals of the circuit. In order to make electrical connection with the electrode pad 6 of the wiring board 5 on the electrode, Sn and P
The bump electrode 1 is formed of solder having a composition of 6: 4 with respect to b.

The spacer 3 is made of 5Sn / 95Pb high melting point solder, which is a metal having a higher melting point than the bump electrode 2, or a resin material having a linear expansion coefficient of 20 to 30 ppm / ° C.

Projecting electrode 2 and spacer 3 of semiconductor chip 1
The other portions are covered with a protective film made of an organic film such as polyimide on the inorganic film such as an inorganic film such as SiN, and are electrically insulated from the outside.

The wiring board 5 will be described with reference to FIG. When the wiring board is a resin board, the base material is glass epoxy, B
T resin or polyimide is used, and in the case of a ceramic substrate, alumina or the like is used. The pad portion 4 of the wiring board 5 is formed so as to correspond to the arrangement of the protruding electrodes 2 formed on the semiconductor chip 1.

The pad portion 4 is plated with Au / Ni on Cu in order to ensure that the protruding electrode 2 formed of eutectic solder of the semiconductor chip 1 is sufficiently wet and has sufficient adhesion strength. The thickness of each metal layer is 3 to
The thickness of the Au layer is 5 μm, and the thickness of the Au layer is 0.02 to 0.05 μm.

There are two types of spacer pad portions 7 depending on the setting of the height of the projecting electrode 2 and the spacer 3. In many cases, the pad portion 7 for the spacer is formed as shown in FIG. In this case, the heights of the protruding electrodes 2 and the spacers 3 are made equal. However, when the distance between the protruding electrode 2 and the spacer 3 is small, or when the wiring of the wiring board 5 cannot be opened in the solder resist 6, the pad portion of the spacer is formed as shown in FIG. In this case, the height of the spacer 3 of the semiconductor chip 1 is
Must be set lower than the height of the solder resist 6 by the thickness of the solder resist 6.

The wiring board 5 is covered with a solder resist 6 except for the pad section 4 and the spacer pad section 7.

A semiconductor device including the above-described semiconductor chip 1 and the wiring board 5 will be described with reference to FIG. Each protruding electrode 2 on the semiconductor chip 1 and the pad portion 4 on the wiring board 5
Is electrically connected to melt the solder of the protruding electrode 2 and connect the protruding electrode 2 to the pad portion 4. In this case, the distance between the semiconductor chip 1 and the wiring board 5 is determined by the height of the spacer 3, and stable mounting can always be performed without tilting.

The space between the semiconductor chip 1 and the wiring board 5 is sealed with a sealing resin 8 in order to improve the reliability of the connection portion and protect the circuits formed on the semiconductor chip 1 and the wiring board 5. . A thermosetting epoxy resin is used for the sealing resin 8.

The second embodiment of the present invention will be described with reference to FIGS.
The structure will be described with reference to FIG. FIG. 6 is a sectional view of a semiconductor device according to the second embodiment of the present invention, FIG. 7 is a plan view of the semiconductor chip 1 on the electrode side, and FIG. 3 is a plan view of the wiring board on the semiconductor chip mounting side.

The semiconductor chip 1 will be described with reference to FIG.
An electronic circuit is formed on Si, and electrodes are formed of Al or the like as external terminals of the circuit. In order to make electrical connection with the electrode pad 6 of the wiring board 5 on the electrode, Sn and P
The bump electrode 1 is formed of solder having a composition of 6: 4 with respect to b.

The spacer pad portion 11 is made of Al, which is the same material as the electrodes and wirings of the IC, or Cu or Au, which is the uppermost layer of the barrier metal layer when forming the bump electrodes.

The portions of the semiconductor chip 1 other than the protruding electrodes 2 and the pad portions 11 for the spacers are covered with an inorganic film such as SiN or the above-mentioned inorganic film, and further covered with a protective film such as an organic film such as polyimide. It is electrically insulated.

The wiring board 5 will be described with reference to FIG. Glass epoxy, BT resin, polyimide, or the like is used for the base material of the wiring board. The pad portion 4 of the wiring board 5 is formed so as to correspond to the arrangement of the protruding electrodes 2 formed on the semiconductor chip 1.

The pad portion 4 is plated with Au / Ni on Cu in order to sufficiently wet the protruding electrode 2 formed of the eutectic solder of the semiconductor chip 1 and secure sufficient adhesion strength. The thickness of each metal layer is 3-5 μm for the Ni layer.
The thickness of each of the m and Au layers is 0.02 to 0.05 μm.

The spacer 10 is made of a 5Sn / 95Pb high melting point solder or a resin material having a linear expansion coefficient of 20 to 30 ppm / ° C., which is a metal having a higher melting point than the protruding electrode 2.

Regarding the setting of the height of the spacer 10, the first
In the same manner as in the first embodiment, the height is formed to be the same as or lower than that of the projecting electrode 2 depending on the structure of the spacer pad portion 11.

The wiring board 5 is covered with a solder resist 6 at portions other than the pad portions 4 and the spacers 10.

A semiconductor device including the above-described semiconductor chip 1 and the wiring board 5 will be described with reference to FIG. Each protruding electrode 2 on the semiconductor chip 1 and the pad portion 4 on the wiring board 5
Is electrically connected to melt the solder of the protruding electrode 2 and connect the protruding electrode 2 and the pad portion 4. In this case, the distance between the semiconductor chip 1 and the wiring board 5 is determined by the height of the spacer 10, and stable mounting is always possible without tilting.

The space between the semiconductor chip 1 and the wiring board 5 is sealed with a sealing resin 8 in order to improve the reliability of the connection portion and protect the circuits formed on the semiconductor chip 1 and the wiring board 5. . A thermosetting epoxy resin is used for the sealing resin 8.

The method for forming the spacer used in the first embodiment will be described. This will be described with reference to FIGS.

FIG. 9 is a sectional view of the semiconductor chip 1. S
An electronic circuit is formed on i12, and an electrode 13 is formed of Al or the like as an external terminal of the circuit. The portion other than the electrode 14 is covered with an inorganic film such as SiN or the above-mentioned inorganic film and a protective film 14 made of an organic film such as polyimide thereon.
It is electrically insulated from the outside.

Al, Cr, Cu
In this order or by vapor deposition or sputtering. Further, a resist is formed on the entire surface, and the resist is removed by photolithography except for the position where the electrode 14 and the single electrode 15 for the spacer are to be formed in a region where the semiconductor pad is not formed. Then, the resist is removed with a resist stripper, and the electrode 14 and the spacer electrode 15 are removed as shown in FIG.
To form

FIG. 11 shows a state in which a spacer is formed.
When a spacer of 5Sn / 95Pb high melting point solder, which is a high melting point metal, is formed, a resist is applied to the entire surface, only the spacer electrode 15 is opened, and the 5Sn / 95Pb high melting point solder spacer 15 is formed by electroless solder plating. Then, the resist is removed.

When a resin spacer is formed, only the spacer electrode 15 is formed of a thermosetting resin having a predetermined height by screen printing, and then cured to form a spacer.

Thereafter, as shown in FIG.
The eutectic solder paste is supplied by a screen printing method to form
After the eutectic solder balls are supplied by a transfer method, the eutectic solder balls are heated to a temperature at which the eutectic solder melts by a reflow furnace or the like, and the eutectic solder bump electrodes 2 are formed on the electrodes 14.

Next, as for the method of forming the spacer used in the second embodiment, the formation method spacer used in the first embodiment is formed.

[0039]

As described above, in a semiconductor device in which a semiconductor chip is connected on a wiring board via a protruding electrode, spacers having the same height or lower than the height of other protruding electrodes are formed at least at three places. , Only the protruding electrodes are connected. As a result, even if the mounting pad and the protruding electrode are misaligned, the spacer does not obliquely join the protruding electrode and the electrode pad. This stabilizes the thermal fatigue life of the semiconductor device.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a plan view of a semiconductor chip according to the first embodiment of the present invention.

FIG. 3 is a plan view of the wiring board according to the first embodiment of the present invention.

FIG. 4 is a sectional view of a spacer pad portion of the wiring board according to the first embodiment of the present invention.

FIG. 5 is a sectional view of a spacer pad portion of the wiring board according to the first embodiment of the present invention.

FIG. 6 is a sectional view showing a semiconductor device according to a second embodiment of the present invention.

FIG. 7 is a plan view of a semiconductor chip according to a second embodiment of the present invention.

FIG. 8 is a plan view of a wiring board according to a second embodiment of the present invention.

FIG. 9 is a sectional view of a semiconductor chip in a method of forming a spacer according to the first embodiment of the present invention.

FIG. 10 is a cross-sectional view showing a state in which a spacer electrode is formed on a semiconductor chip in the method of forming a spacer according to the first embodiment of the present invention.

FIG. 11 is a cross-sectional view showing a state in which a spacer is formed on the semiconductor chip in the method for forming a spacer according to the first embodiment of the present invention.

FIG. 12 is a cross-sectional view showing a state in which protruding electrodes are formed on the semiconductor chip in the method for forming a spacer according to the first embodiment of the present invention.

FIG. 13 is a cross-sectional view showing a semiconductor device according to the related art.

FIG. 14 is a cross-sectional view showing a semiconductor device according to the related art.

FIG. 15 is a cross-sectional view showing a connection portion of a semiconductor device according to a conventional technique.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Protruding electrode 3 Spacer 4 Pad part 5 Wiring board 6 Solder resist 7 Spacer pad part 8 Sealing resin

Claims (12)

[Claims] In a semiconductor device for connecting a semiconductor chip on a wiring board via a protruding electrode, spacers having the same height or lower than the height of another protruding electrode are formed in at least three places, and only the other protruding electrodes are formed. A semiconductor device which performs electrical connection. 2. The semiconductor device according to claim 1, wherein the material of the spacer is a metal having a higher melting point than other protruding electrodes. 3. The semiconductor device according to claim 1, wherein the material of the spacer is a resin material. 4. The semiconductor device according to claim 1, wherein the spacer is disposed in a region other than the internal element forming circuit region of the semiconductor chip. 5. The semiconductor device according to claim 1, wherein an electrode corresponding to a spacer of said semiconductor chip is formed on a wiring board on which said semiconductor chip is mounted. 6. A semiconductor device in which a semiconductor chip is connected to a wiring substrate via a protruding electrode, wherein at least three spacers on the wiring substrate have the same height as or lower than the height of the protruding electrodes formed on the semiconductor chip. A semiconductor device wherein only the protruding electrodes of the semiconductor chip are electrically connected. 7. The semiconductor device according to claim 6, wherein the material of the spacer formed on the wiring board is a metal having a higher melting point than the protruding electrode formed on the semiconductor chip. 8. The semiconductor device according to claim 6, wherein a material of the spacer formed on the wiring board is a resin material. 9. The semiconductor device according to claim 6, wherein the arrangement of the spacers formed on the wiring board is such that, when the semiconductor chip is mounted on the wiring board, the spacers are arranged outside the internal element forming circuit area of the semiconductor chip. A semiconductor device characterized by the following. 10. The semiconductor device according to claim 6, wherein
A semiconductor device, wherein an electrode corresponding to a spacer of a wiring board is formed on the semiconductor chip. 11. A step of forming a single electrode that is not electrically connected to another electrode in a region where a pad of a semiconductor chip is not formed, and a step of forming a single electrode that is not electrically connected to another electrode. Forming a spacer of a metal having a higher melting point than a protruding electrode formed on another electrode. 12. A step of forming a single electrode that is not electrically connected to another electrode in a region where a pad of a semiconductor chip is not formed, and a step of forming a single electrode that is not electrically connected to another electrode. Forming a resin spacer.