JPH11233458A - Semiconductor device manufacturing method and semiconductor wafer used for the manufacturing - Google Patents

Abstract

(57) [Summary] [Objective] To manufacture many semiconductor chips from one semiconductor wafer. After preparing a semiconductor wafer in which rectangular semiconductor element portions are arranged vertically and horizontally on a main surface, the semiconductor wafer is divided along a vertical division region and a horizontal division region between the semiconductor element portions to form a rectangular shape. A method of manufacturing a semiconductor device, wherein a width of the vertical divided region and a width of the horizontal divided region are different from each other. When the semiconductor element is rectangular, the width of the divided region in the direction extending along the long side of the semiconductor element is narrow, and the width of the divided region in the direction extending along the short side of the semiconductor element is wide. Form. All or part of the wide divided area has a test element
A mark such as a group is provided. The wide divided region is cut with a wide blade so that the width of the remaining divided region on each side of the semiconductor element formed by the division is the same or similar, and the narrow divided region is narrow. Cut with a blade.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device (semiconductor chip) and a semiconductor wafer used in the method, and more particularly to a technology for manufacturing a semiconductor chip having a rectangular shape in which the vertical and horizontal dimensions of the semiconductor chip are largely different. Regarding effective technology to apply.

[0002]

2. Description of the Related Art Semiconductor devices such as ICs and LSIs include ICs,
A semiconductor device (semiconductor chip) incorporating a circuit such as an LSI is incorporated in a sealing body (package).

[0003] A semiconductor chip is formed by vertically and horizontally cutting an element portion aligned on a silicon substrate or a compound semiconductor substrate.

[0004] The silicon substrate or the compound semiconductor substrate at the time of manufacturing a semiconductor device is generally called a semiconductor wafer (hereinafter, also simply referred to as a wafer).

The wafer is divided into chips by a method of cracking along a scribe line of the wafer using a cleavage plane of a crystal and a dicing method of cutting with a blade along a dicing area. In addition,
The scribe line and the dicing area are referred to as divided areas.

The dicing technique is disclosed, for example, in Japanese Patent Application Laid-Open No. 8-45800.

This document describes a semiconductor wafer in which semiconductor chips surrounded by cutting and separating regions extending in the X and Y directions orthogonal to each other are arranged in a matrix. Further, in this semiconductor wafer, an identification symbol for identifying the semiconductor wafer is displayed in the cutting separation area (dicing area). In addition, the widths of the cut separation regions extending along the X direction and the Y direction are the same.

A wafer having a TEG (test element group) arranged on a scribe line is described in "Nikkei Micro Devices", published in Nikkei BP, May 1995, pages P56 to P71.

On the other hand, a liquid crystal display (LCD: Liquid)
A semiconductor chip for a driver of a crystal display has a large aspect ratio and is elongated. Regarding a semiconductor chip for an LCD driver having a large aspect ratio, see, for example, “Electronic Materials” issued by the Industrial Research Council, May 1991, May 1, 1991, p.
It is described on page 36.

[0010] The document includes TAB (Tape Automated Bon).
ding) is described, for example, TAB
An LCD driver (TCP structure semiconductor device) and an LCD driver tape (tape carrier) are described.

[0011] Also, in the document, the LCD driver is an LC driver.
As one of the methods for connecting to a D panel, a structure for folding a tape is disclosed. This structure enables bending by making the IC chip slender.

The structure using the elongated IC chip has a tape area of 2/3 to 1/2 as compared with a normal type structure using a square IC chip. It describes that the picture frame becomes smaller.

This document also discloses an LCD driver tape (tape carrier) for assembling a square IC chip or a slender IC chip.

[0014]

SUMMARY OF THE INVENTION Conventional semiconductor wafer 1
As shown in FIG. 10, the semiconductor device 1 has a structure in which rectangular semiconductor element portions 2 are aligned and arranged on the main surface of a semiconductor wafer 1 vertically and horizontally. A linearly extending portion surrounding each semiconductor element portion 2 is a divided region 3.

The semiconductor wafer 1 is provided with an orientation flat 4 which is partially cut away linearly for identification of the front and back surfaces of the wafer. One side of the semiconductor element portion 2 is aligned with the orientation flat 4.
The semiconductor element portion 2 is formed so as to be parallel to the substrate.

In FIG. 10, a direction along the orientation flat 4 is defined as an X direction (for example, a horizontal direction), and a direction perpendicular to the direction is defined as a Y direction (for example, a Y direction). The semiconductor element section 2 is generally a rectangle formed of a square or a rectangle.

In FIG. 10, the long side of the semiconductor element portion 2 is not particularly limited, but may be in the X direction (for example, in the horizontal direction).
And the short side of the semiconductor element portion 2 extends in the Y direction (for example, the vertical direction).

The semiconductor wafer 1 is divided by a dicing method of cutting with a blade along the center line of the divided region 3 or a scribing method of dividing the semiconductor wafer 1 along the center line of the divided region 3. The divided area 3 is called a dicing area in the case of dicing, and is called a scribe area (scribe line) in the case of scribe.

In the case of scribe, the width of the divided region is narrower than that in the case of dicing because the width for cutting with a blade is unnecessary.

The number of semiconductor chips that can be obtained from one wafer (number of obtained chips) affects the manufacturing cost of the semiconductor device, and improving the number of obtained chips can reduce the manufacturing cost of the semiconductor device.

The semiconductor element portion for the LCD driver has a large aspect ratio.

As shown in FIG. 10, in the case of the semiconductor element portion 2 having a large aspect ratio, the number of divided regions 3 (horizontal divided regions 3X) in the direction along the long side of the semiconductor element portion 2 is The number of divided regions 3 (vertical divided regions 3Y) in the direction along the short side is greatly increased.

The divided region 3 is a region in consideration of safety so as not to damage the semiconductor element portion 2 at the time of dividing the semiconductor wafer 1. Will increase.

Division area 3 in conventional semiconductor wafer 1
Is determined in consideration of the size, pattern, and division method of the marks of the test element groups (TEGs) arranged in the division area 3.

However, in the case of the conventional semiconductor wafer 1, as shown in FIG. 10, both the vertical divided area 3Y and the horizontal divided area 3X have the same width (a).

In particular, in dicing, since it is necessary to set a cutting width by a blade, an unnecessary area increases and the number of chips obtained decreases.

On the other hand, according to the study of the present inventors, the marks such as the test element group and the like do not need to be arranged in both the vertical divided area 3Y and the horizontal divided area 3X of the divided area 3 in any case. It has been found that simply arranging it on one side is sufficient.

That is, these marks are useful because they are provided on the semiconductor wafer 1.

An object of the present invention is to provide a method of manufacturing a semiconductor device for manufacturing many semiconductor chips from one semiconductor wafer.

Another object of the present invention is to provide a semiconductor wafer capable of increasing the number of semiconductor chips obtained.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0032]

The following is a brief description of an outline of typical inventions disclosed in the present application.

(1) After preparing a semiconductor wafer in which rectangular and horizontal rectangular semiconductor element portions are arranged and arranged on the main surface, the semiconductor wafer is divided along the vertical division region and the horizontal division region between the semiconductor element portions. In which the width of the vertical divisional region and the width of the horizontal divisional region are different from each other. When the semiconductor element is rectangular, the width of the divided region in the direction extending along the long side of the semiconductor element is narrow, and the width of the divided region in the direction extending along the short side of the semiconductor element is wide. Form. A mark such as a test element group is provided on all or a part of the wide divided area. The wide divided region is cut with a wide blade so that the width of the remaining divided region on each side of the semiconductor element formed by the division is the same or similar, and the narrow divided region is narrow. Cut with a blade.

In the method of manufacturing a semiconductor device, the following semiconductor wafer is used.

A semiconductor wafer having a vertically divided region and a horizontally divided region on the main surface in a vertical and horizontal direction, and having a semiconductor element portion in a rectangular region surrounded by a pair of adjacent vertically divided regions and a horizontally divided region. The width of the divided area and the width of the horizontal divided area are different from each other. Further, in the semiconductor wafer, the width of the divided region having a large number of the vertical divided regions or the horizontal divided regions is narrow, and the width of the divided region having a small number is large.

The semiconductor element portion is rectangular, and the width of the divided region in the direction extending along the long side of the semiconductor element is narrow, and the width of the divided region in the direction extending along the short side of the semiconductor element is small. The width is wide. A mark such as a test element group is provided on all or a part of the wide divided area.

(2) After preparing a semiconductor wafer in which rectangular and horizontal rectangular semiconductor element portions are arranged and arranged on the main surface, the semiconductor wafer is divided along the vertical division region and the horizontal division region between the semiconductor element portions. A method of manufacturing a rectangular semiconductor device, wherein the width of the partial vertical division region is formed to be wider than the width of the other vertical division region, and / or the width of the partial horizontal division region is other than that of the other vertical division region. Is formed wider than the width of the horizontal division region.
The wide divided areas are formed every predetermined number of divided areas arranged in parallel. A mark such as a test element group is provided on all or a part of the wide divided area. The wide divided region is cut with a wide blade so that the width of the remaining divided region on each side of the semiconductor element formed by the division is the same or similar, and the narrow divided region is narrow. Cut with a blade.

In the method of manufacturing a semiconductor device, the following semiconductor wafer is used.

A semiconductor wafer having a vertically divided region and a horizontally divided region on a main surface in a vertical direction and a rectangular region surrounded by a pair of adjacent vertically divided regions and a horizontally divided region. The width of the vertical divided region of the portion is wider than the width of the other vertical divided region, and / or the width of the partial horizontal divided region is wider than the width of the other horizontal divided region.
That is, the width of a part of the vertical divided area or the horizontal divided area is large, and the width of the other divided areas is small.

The wide divided areas are arranged every predetermined number of divided areas arranged in parallel. A mark such as a test element group is provided on all or a part of the wide divided area.

According to the above-mentioned means (1), the width of a divided region having a large number of vertical divided regions or horizontal divided regions in a semiconductor wafer is reduced, and the width of a divided region having a small number of divided regions is increased. As a result, the number of semiconductor element portions arranged in the short side direction of the semiconductor element portion can be increased, so that the number of chips obtained from one semiconductor wafer increases,
Reduction of the manufacturing cost of the semiconductor element can be achieved.

According to the means (2), the width of a part of the vertical divided area or the horizontal divided area (every predetermined number) of the semiconductor wafer is increased, and the width of the other divided area is increased. Since the number of semiconductor elements in the short side direction of the semiconductor element can be increased as in the case of the configuration of the means (1), the number of chips obtained increases, and Manufacturing costs can be reduced.

[0043]

Embodiments of the present invention will be described below in detail with reference to the drawings. In all the drawings for describing the embodiments of the present invention, components having the same functions are denoted by the same reference numerals, and their repeated description will be omitted.

(Embodiment 1) FIGS. 1 to 4 are diagrams relating to the manufacture of a semiconductor element (semiconductor chip) according to an embodiment (Embodiment 1) of the present invention.

In the method of manufacturing a semiconductor device according to the first embodiment, first, a semiconductor wafer 1 as shown in FIG. 1 is manufactured.

The semiconductor wafer 1 is a circular plate, for example, a silicon substrate.

One edge of the semiconductor wafer 1 is provided with an orientation flat 4 which is cut out linearly for identification of the front and back surfaces of the wafer. A direction along the orientation flat 4 is defined as an X direction (for example, a horizontal direction), and a direction orthogonal to the orientation flat 4 is defined as a Y direction (for example, a vertical direction).

The main surface of the semiconductor wafer 1 is provided with divided regions 3 vertically and horizontally. The orientation
The divided area 3 in the direction along the flat 4 is referred to as a horizontal divided area 3X, and the divided area 3 in the direction orthogonal to the orientation flat 4 is referred to as a vertical divided area 3Y.

The semiconductor element portion 2 is a rectangular area formed by each pair of adjacent vertical divided areas 3Y and horizontal divided areas 3X. A predetermined IC (integrated circuit device) and the like are formed in the semiconductor element portion 2.

In the first embodiment, the semiconductor element portion 2 is formed in an elongated rectangular shape having a large aspect ratio, and forms a semiconductor element (semiconductor chip) for an LCD driver, for example.

The width (b) of the horizontal divided area 3X is narrow, and the width (c) of the vertical divided area 3Y is wide. The mark 10 such as a test element group is arranged in the wide vertical divided area 3Y.

The width (b) of the horizontal divided area 3X is, for example, 70 μm, and the width (c) of the vertical divided area 3Y is, for example, 140 μm.

If the width is 140 μm, the marks 10 such as test element groups can be sufficiently arranged.

The semiconductor element section 2 and the horizontal division area 3X
The vertical division region 3Y is formed using photolithography, an etching technique, or the like. The pattern exposure is performed by, for example, a reduction projection exposure apparatus as shown in FIG.

That is, as shown in FIG. 2, a light beam 32 emitted from a light source 30 and transmitted through a reticle 31 is reduced by a reduction lens 33 and is sequentially irradiated on a semiconductor wafer 1 on a stage 34 to thereby emit a predetermined pattern 35. Is exposed.

Using this exposure method, a vertically divided area 3Y having a semiconductor element portion 2 and a mark 10 as shown in FIG.
And the horizontal divided region 3X are manufactured.

Next, such a semiconductor wafer 1 is diced to produce a semiconductor device 20 as shown in FIG.

FIG. 3 is a view schematically showing dicing, and is a view showing the semiconductor wafer 1 and the blade 11.

In FIG. 3, a portion shown by a thick line is a cutting area 1 by the blade 11Y in the vertical division area 3Y.
2Y, a portion indicated by a thin line is a cutting area 12X by the blade 11X in the horizontal division area 3X.

The mark 10 is omitted in FIG.

The blade 11Y has a wide blade and cuts a wide vertical divided region 3Y. Further, the blade 11 has a narrow horizontal dividing region 3 having a narrow blade width.
X is cut.

The width of the blade 11Y is about 100 μm, and the width of the blade 11X is about 30 μm. Therefore, the semiconductor wafer 1 is cut along the center line of each divided region 3, so that the semiconductor wafer 1 can be cut by the blades 11 </ b> X and 11 </ b> Y.
Width of the remaining divided region 21 outside the semiconductor element portion 2 in the semiconductor element 20 shown in FIG.
Has the same or approximate dimensions on each side of the semiconductor element 20, for example, about 20 μm or less.

When it is not necessary to make the widths of the remaining divided regions 21 around the semiconductor element 20 equal to each other, the width of the blade 11 for cutting the horizontal divided region 3X and the vertical divided region 3Y may be the same.

FIGS. 5 to 7 relate to a semiconductor device 40 incorporating another semiconductor element (semiconductor chip) 20a for an LCD driver manufactured by the method of the first embodiment.

The semiconductor device 40 is a semiconductor device having a TCP structure. As shown in FIG. 6, the semiconductor device 40 includes an insulating tape 42 having a device hole 41 in the center,
And a plurality of conductive leads 43 provided on one surface of the tape 42.

The semiconductor element 20a forms a driver circuit for a liquid crystal display. The electrodes 44 provided on one surface of the semiconductor element 20a are respectively provided along a pair of opposed long sides of the elongated semiconductor element 20a. Input electrodes 44a are arranged along one side of the pair of long sides,
Output electrodes 44b are arranged along the other side.

The device hole 41 is an elongated hole corresponding to the elongated semiconductor element 20a as shown in FIG. On one side of the device hole 41, an elongated slit hole 45 is provided along the long side of the device hole 41.

The leads 43 are connected to the device holes 41.
Are arranged in parallel at regular intervals along the long sides of the device, and the front end (inner end) is projected into the device hole 41. The protruding end portion is provided with an electrode 44 (input electrode 44a, output electrode 4
4b).

The leads 43 arranged on the long sides of the device hole 41 on the slit hole 45 side are input leads, and the leads 43 on the other long sides of the device hole 41 are output leads.

The leads 43 around the device holes 41 and the surface of the tape 42 have a solder resist 46
Is provided. A resin is applied to a region surrounded by the solder resist 46 to form a package 47 (omitted in FIG. 5). The resin fills the device hole 41 and also covers the periphery of the semiconductor element 20a.

FIG. 7 shows a semiconductor device 40 a incorporated in a tape carrier 50. Tape carrier 5
On both sides of 0, sprocket holes 51 are provided.

Generally, the tape carrier 50 shown in FIG.
In this state, the semiconductor device 40a is provided.

In FIG. 7, a region shown by a dotted frame is a user use region 52. When the user cuts the tape carrier 50 along the dotted frame, the semiconductor device 40 shown in FIGS. 5 and 6 is obtained.

In the first embodiment, the width of the horizontal division region 3X in the direction orthogonal to the short side of the semiconductor element portion 2 having a large aspect ratio is set to the vertical division region 3Y in the direction orthogonal to the long side of the semiconductor element portion 2. By making the width narrower, the number of semiconductor element units 2 arranged in the Y direction (vertical direction) can be increased. That is, since the width of the divided region having a large number of the vertical divided regions or the horizontal divided regions in the semiconductor wafer 1 is reduced and the width of the divided region having a small number of divided regions is increased, the semiconductor element portion that can be disposed on the semiconductor wafer 1 is formed. Can be increased, so that the number of obtained chips increases. Therefore, a reduction in the manufacturing cost of the semiconductor element can be achieved.

In the present invention, the semiconductor wafer 1 having the following configuration
Is used to manufacture the semiconductor element 20, and also to manufacture a semiconductor device.

The semiconductor wafer is a semiconductor wafer having a vertically divided region and a horizontally divided region on the main surface vertically and horizontally, and having a semiconductor element portion in a rectangular region surrounded by the pair of adjacent vertically divided regions and the horizontally divided region. Thus, the width of the divided region having a large number of the vertical divided regions or the horizontal divided regions is narrow, and the width of the divided region having a small number is large.

(Embodiment 2) FIG. 8 is a front view of a semiconductor wafer 1 according to another embodiment (Embodiment 2) of the present invention.

In the second embodiment, in the vertical divided area 3Y and the horizontal divided area 3X, the width of the divided area 3 is increased every two lines, and the wide part is 140 μm and the narrow part is 70 μm. .

In the second embodiment, a total of nine semiconductor element sections 2 of three pieces each vertically and horizontally surrounded by a wide divided area 3 constitute one block.

Then, marks (not shown) such as inspection information of the semiconductor element portion 2 of one block are arranged in the wide divided area 3.

In the division of the semiconductor wafer 1, the wide divided region 3 is cut with a wide blade, and the narrow divided region 3 is cut with a narrow blade, so that the semiconductor element 20 as shown in FIG. To manufacture.

In the second embodiment, only the divided region 3 for forming one block has a large divided region width.
Since the other divided regions 3 are formed to have a narrow divided region width, it is possible to increase the number of semiconductor element portions 2 arranged on the semiconductor wafer 1. Therefore, it is possible to increase the number of obtained chips per one chip, and the semiconductor device 20
Can be reduced in manufacturing cost.

In the present invention, the semiconductor wafer 1 having the following structure
Is used to manufacture the semiconductor element 20, and also to manufacture a semiconductor device.

The semiconductor wafer is a semiconductor wafer having a vertically divided region and a horizontally divided region on the main surface, and having a semiconductor element portion in a rectangular region surrounded by a pair of adjacent vertically divided regions and the horizontally divided region. Thus, the width of a part of the vertical divided area or the horizontal divided area is large, and the width of the other divided areas is small.

In the divided region of the semiconductor wafer,
The wide divided area in which the divided area width is increased may be provided in one of the vertical divided area and the horizontal divided area.

FIG. 9 shows an example in which only a part of the divided regions 3 is made into a narrow divided region 3 (narrow divided region 3e).

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above-described embodiments, and can be variously modified without departing from the gist thereof. Needless to say. The invention is equally applicable to scribe technology.

[Brief description of the drawings]

FIG. 1 is a schematic plan view of a semiconductor wafer according to an embodiment (Embodiment 1) of the present invention.

FIG. 2 is a schematic perspective view showing a part of the manufacture of the semiconductor wafer of the first embodiment.

FIG. 3 is a schematic plan view showing a dicing line on a semiconductor wafer in manufacturing the semiconductor device of the first embodiment.

FIG. 4 is a schematic plan view showing a semiconductor device manufactured by manufacturing the semiconductor device of the present invention.

FIG. 5 is a schematic plan view showing a semiconductor device incorporating the semiconductor element manufactured according to the first embodiment.

FIG. 6 is an enlarged cross-sectional view of a semiconductor device incorporating the semiconductor element manufactured according to the first embodiment.

FIG. 7 is a schematic plan view showing a TAB type semiconductor device incorporating the semiconductor element manufactured according to the first embodiment.

FIG. 8 is a schematic plan view of a semiconductor wafer according to another embodiment (Embodiment 2) of the present invention.

FIG. 9 is a schematic plan view of a semiconductor wafer according to a modification of the second embodiment of the present invention.

FIG. 10 is a schematic plan view of a conventional semiconductor wafer.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Semiconductor wafer, 2 ... Semiconductor element part, 3 ... Division area,
3e: narrow division area, 3X: horizontal division area, 3Y: vertical division area, 4: orientation flat, 10: mark, 11, 11X, 11Y: blade, 12X, 12Y
... Cutting area, 20, 20a Semiconductor element, 21 Residual divided area, 30 Light source, 31 Reticle, 32 Reduction lens, 34 Stage, 35 Pattern, 40, 40a
Semiconductor device, 41: device hole, 42: tape, 4
3 lead, 44 electrode, 44a input electrode, 44b
Output electrode, 45: slit hole, 46: solder resist, 47: package, 50: tape carrier, 51
... sprocket holes, 52 ... user use area.

Claims (13)

[Claims] 1. A semiconductor wafer having rectangular semiconductor element portions arranged in a matrix on a main surface is prepared, and the semiconductor wafer is divided along a vertical division region and a horizontal division region between the semiconductor element portions. A method for manufacturing a rectangular semiconductor device, wherein the width of the vertical divided region and the width of the horizontal divided region are different from each other. 2. When the semiconductor element is rectangular, the width of the division region in the direction extending along the long side of the semiconductor element is narrow, and the division in the direction extending along the short side of the semiconductor element is narrow. 2. The method according to claim 1, wherein the region is formed to have a large width. 3. After preparing a semiconductor wafer in which semiconductor element portions of a rectangular shape are arranged vertically and horizontally on the main surface, the semiconductor wafer is divided along the vertical division region and the horizontal division region between the semiconductor element portions. A method of manufacturing a rectangular semiconductor device, wherein the width of the one vertical division region is formed to be wider than the width of another vertical division region, and / or the width of the partial horizontal division region is other than the other vertical division region. A method for manufacturing a semiconductor device, wherein the width is formed wider than the width of a horizontal division region. 4. The method according to claim 3, wherein the wide divided regions are formed at predetermined intervals of the divided regions arranged in parallel. 5. The semiconductor device according to claim 1, wherein a mark such as a test element group is provided on all or a part of the wide divided region. Production method. 6. The wide divided region is cut with a wide blade so that the width of the remaining divided region on each side of the semiconductor element formed by the division is the same or similar, and the narrow divided region is cut. The region is cut by a narrow blade.
13. The method for manufacturing a semiconductor device according to item 10. 7. A semiconductor wafer having a vertically divided region and a horizontally divided region on the main surface in a vertical and horizontal direction, and having a semiconductor element portion in a rectangular region surrounded by a pair of adjacent divided vertically and horizontally divided regions, A semiconductor wafer, wherein the width of a divided region having a large number of the vertical divided regions or the horizontal divided regions is narrow, and the width of a divided region having a small number is large. 8. A semiconductor wafer having a vertically divided region and a horizontally divided region on the main surface in a vertical and horizontal direction, and having a semiconductor element portion in a rectangular region surrounded by a pair of adjacent divided vertically and horizontally divided regions, A semiconductor wafer, wherein the width of the vertical divided region and the width of the horizontal divided region are different from each other. 9. The semiconductor element portion has a rectangular shape, the width of a divided region extending along a long side of the semiconductor element is narrow, and the width of a divided region extending along a short side of the semiconductor element is small. The semiconductor wafer according to claim 7, wherein the width of the region is wide. 10. A semiconductor wafer having a vertically divided region and a horizontally divided region on a main surface in a vertical and horizontal direction, and having a semiconductor element portion in a rectangular region surrounded by a pair of adjacent vertically divided regions and a horizontally divided region. A semiconductor wafer, wherein the width of a part of the vertical divided area or the horizontal divided area is large and the width of another divided area is small. 11. A semiconductor wafer having a vertically divided region and a horizontally divided region on a main surface in a vertical and horizontal direction, and having a semiconductor element portion in a rectangular region surrounded by a pair of adjacent vertically divided regions and a horizontally divided region. The width of the partial vertical division area is wider than the width of the other vertical division area, and / or the width of the partial horizontal division area is wider than the width of the other horizontal division area. Semiconductor wafer. 12. The semiconductor wafer according to claim 10, wherein said wide divided regions are arranged at predetermined intervals of divided regions arranged in parallel. 13. The apparatus according to claim 7, wherein a mark such as a test element group is provided on all or a part of the wide divided area. A method for manufacturing a semiconductor device.