JPH11266334A - Image reading device - Google Patents

Abstract

(57) [Summary] [PROBLEMS] To provide an image reading apparatus in which the number of sections and the degree of freedom of reading conditions thereof are expanded and section functions are expanded. SOLUTION: Dither processing and error diffusion processing circuit 15
Is to use the dither pattern data input from the dither pattern generation circuit 14 as a threshold value, perform binarization processing on the filtered data output from the filter processing circuit 12, and An error diffusion process is performed on the data after the filtering process together with the error data in the line buffer 16, and the binary data after the error diffusion process is output to the next stage processing circuit. The binarization processing selection 17 includes a dither pattern selection signal to the dither pattern generation circuit 14, a filter processing selection signal to the filter processing circuit 12, and a binarization processing to the binarization data selection circuit. Output a signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to an image reading apparatus capable of setting a plurality of areas having different reading conditions in a window.

[0002]

2. Description of the Related Art In recent years, with the spread of image reading apparatuses such as facsimile apparatuses, image scanners, and digital copiers, higher grades have been required.
As a response to this demand for higher quality, first, a window function has emerged that allows an operator to specify an area to be read as a window in a document reading area which is a maximum reading area of an image reading apparatus. This window function is shown in FIG.
As shown in (1), the pixels are counted from the readable area X0, the enable is activated from X1, the enable signal is made negative at X2, and the window area is set to perform reading. The setting of this window area is X1
And X2 are set by a register, and an enable signal is generated based on the set value of the register, by a method fixed as hardware.

Further, recently, not only the window function,
A section designating function has also been proposed in which a region having a reading condition different from the reading condition of the window can be designated as a section in the window. In the conventional section function, a section area is designated by a configuration similar to the above-described window function. That is, when a register for setting a section area is provided, and an enable signal is generated based on the set value of the register to set the section area,
The reading condition is set at that time, the image is read, and the section function is executed.

[0004]

However, in such a conventional image reading apparatus, the designation of the section area in the section function is fixedly performed as hardware using a register or the like. Is determined, the number of sections is uniquely determined. As a result, there is a problem that expandability of the number of sections and reading conditions is poor, and expandability of the section function is poor. Therefore, an object of the present invention is to provide a section including a break pointer indicating a position of the section in the main scanning direction and the sub-scanning direction, a sequence pointer indicating a position of a next pointer sequence, and an attribute pointer specifying a reading condition. It is an object of the present invention to provide an image reading apparatus in which the number of sections and the degree of freedom of the reading conditions are expanded by defining three elements and these elements can be freely set, thereby expanding the section function.

[0005]

According to the first aspect of the present invention, an area to be read is designated as a window in a document reading area which defines a maximum reading area, and the document in this window is scanned by main scanning and sub scanning. An image reading apparatus capable of reading and specifying a plurality of areas in the window under a reading condition different from a reading condition of a window as a section, wherein the section is positioned in a main scanning direction and a sub-scanning direction of the section. , A sequence pointer that indicates the position of the next pointer sequence, and an attribute pointer that specifies reading conditions. Different dither matrix and dither matrix when the dither matrix method is specified Dithering circuit and the binary error diffusion processing circuit for specifying the box size, that is of a common, to achieve the above object.

According to a second aspect of the present invention, in the first aspect, a line buffer for storing error data used for error diffusion processing and a line buffer used for filter processing are commonly used. I do. Claim 3
According to the invention described in the first aspect, the use of the line buffer is switched between the filter processing and the error diffusion processing during the section processing and when the section processing is not performed.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a preferred embodiment of the present invention will be described in detail with reference to FIGS. FIG.
FIG. 8 to FIG. 8 show an embodiment of the present invention, which is applied to an image scanner (hereinafter, scanner) device. FIG. 1 is a diagram showing the appearance of the scanner device. In FIG. 1, a document table 3 is provided on a main body 2 of a scanner device 1, and the document table 3 is formed of a contact glass. An operation unit 4 is provided on an upper front surface of the main body 2, and the operation unit 4 is provided with various operation keys.

A document holder 5 is attached to the main body 2, and the document holder 5 functions to press a document set on the document table 3 against the document table 3. In the main body 2, photoelectric conversion means for irradiating light on the original set on the document table 3 and photoelectrically converting the reflected light, sub-scanning means for moving the photoelectric conversion means in the sub-scanning direction, and reading by the photoelectric conversion means. An image processing circuit for processing the processed image data, in particular, a section processing circuit for performing section processing according to the present embodiment, a control circuit for controlling each unit of the scanner device 1, and the like are housed therein.

FIG. 2 is a diagram showing a section processing circuit. The section processing circuit is a gamma table selection circuit 1
1, filter processing circuit 12, filter processing line buffer 13, dither pattern generation circuit 14, dither processing and error diffusion processing circuit 15, error diffusion line buffer 16,
It includes a binarization processing selection 17, a pointer memory 18, a latch circuit 19, and a coincidence detection circuit 20. The gamma table selection circuit 11 receives the image data read by the photoelectric conversion means, selects a gamma table according to a gamma table selection signal from the binarization processing selection 17, and converts the image into a density converted by the selected gamma table. The data is output (see FIGS. 7 and 8).

The filter processing circuit 12 receives the image data selected by the gamma table selection circuit 11 and inputs the image data.
According to the filter processing selection signal from the binarization processing selection 17, the arithmetic processing is performed while accessing the filter processing line buffer 13, and data after MTF correction or smoothing processing is output. The dither pattern generation circuit 14
Various types of dither pattern data are stored in a memory in a dither pattern generation circuit by setting a PU (central processing unit). Dither data is selected from the memory by a dither pattern generation counter and a dither pattern selection signal in the dither pattern generation circuit, and dither processing is performed. Output dither pattern data to the circuit. When a simple fixed threshold is generated, the dither pattern generation circuit 14 stores continuous fixed data in a memory, and reads out data from the memory to output fixed threshold data.

The dither processing and error diffusion processing circuit 15
The dither pattern data input from the dither pattern generation circuit 14 is used as a threshold value, and the filtered data output from the filter processing circuit 12 is
Performing the binarization processing, performing error diffusion processing on the filtered data together with the error data of the connected error diffusion line buffer 16, and outputting the binary data after the error diffusion processing to the next-stage processing circuit I do. The binarization processing selection 17 includes a dither pattern selection signal to the dither pattern generation circuit 14, a filter processing selection signal to the filter processing circuit 12, and a binarization processing to the binarization data selection circuit. Output a signal.

The pointer memory 18 is formed by a RAM (random access memory), and has 128 pointer blocks P0 to P127 as shown in FIG.
Are divided into Pointer blocks P0 to P127
Is formed of eight section script bytes (section pointers) SDB0 to SDB7, and the pointer memory has a capacity of 1024 bytes. The section debug bytes SDB0, 1, and 7 are attribute bytes (attribute pointers), which are output to the binarization processing selection 17 and set the image data reading conditions.

Section script byte SDB6
Is a sequence byte (sequence pointer),
The pointer blocks P0 to P127 to which the section following the breakpoint (end in the main scanning direction) of the section of the pointer blocks P0 to P127 to which the section script byte SDB6 belongs are specified. The section debug byte SDB2 and the section debug byte SDB3 are break pointers in the main scanning direction, and specify a main scan break point of the section to which the section debug bytes SDB2 and SDB3 belong.

The section script bytes SDB2 and SDB3 are used in order to support the scanner device 1 having about 8000 pixels per line.
Are used as the main scan point data and output to the latch. The section script bytes SDB4 and SDB5 are break pointers in the sub-scanning direction, and designate breakpoints in the sub-scan of the section to which the section script bytes SDB4 and SDB5 belong. The section debug bytes SDB4 and SDB5 can specify the number of lines in a range in which the number of lines in one frame can be set in a hexadecimal number with a 16-bit width. The content is output to the latch as sub-scanning point data.

Here, the section script byte S
DB0 to SDB7 are summarized as follows. SDB0, SDB1, SDB7: attribute byte (attribute pointer) SDB2, SDB3: main scanning break pointer SDB4, SDB5: sub-scanning break pointer SDB6: sequence byte (sequence pointer) , And the sub-scanning pointer coincidence signal and the point data according to the setting from the CPU. The coincidence signal and the point data will be described later.

The latch circuit 19 latches the main scanning and sub-scanning point data from the pointer memory 18 and outputs the latched point data to the coincidence detecting circuit 20. Are compared with the main scanning counter signal and the sub-scanning counter signal input from the control unit. The main scanning counter signal is a signal that the main scanning counter built in the control unit counts and outputs the number of pixels of image data in the main scanning direction for each line, and the sub scanning counter signal is a sub scanning counter built in the control unit. Is a signal for counting and outputting the number of lines of the read image. When the main-scanning counter signal and the sub-scanning counter signal match the main-scanning point data and the sub-scanning point data, respectively, the coincidence detection circuit 20 outputs main-scanning and sub-scanning pointer match signals to the pointer memory 18, respectively. I do. When the main / sub pointer coincidence signal is input from the coincidence detection circuit 20, the pointer memory 18 switches the pointer blocks P0 to P127. That is, the process moves to the next pointer block P0 to P127 specified by the section script byte SDB6.

Next, the operation of this embodiment will be described with reference to FIGS. As shown in FIG. 4, a case will be described in which two sections S1 and S2 are superimposed and set in a window. The area setting of the window W is performed by specifying the size of A4, A5, B5, etc. in the maximum readable area (original reading area) of the entire area of the document table 3 and the coordinate specification for specifying the upper left coordinate and the lower right coordinate of the area. It is performed by Also, the area designation of the sections S1 and S2 is as follows:
As shown in FIG. 5, this is performed by specifying the upper left coordinates and the lower right coordinates of each section S1, S2.

Then, the window W and the section S
When the reading conditions of S1 and S2 are set, the control unit of the scanner device 1 expands the pointer in the pointer memory based on the coordinate information and the attribute information. That is, the window W is located at the upper left corner Q0 of the document reading area.
From (0, 0) to the point QE of the coordinates (E, E) is designated, and Q1 (X1, Y1) and Q12 are set as the section S1.
(X2, Y2) becomes Q3 (X3,
When Y3) and Q10 (X4, Y4) are designated, the control unit of the scanner device 1 expands the input coordinate information into a pointer memory as shown in FIG.

That is, in FIG. 6, the numbers attached from "0" to "10" on the right side of the pointer structure diagram indicate pointer numbers, and the names P0 to P63 of the pointer blocks shown on the left side (shown in FIG. 6). Then P0-P1
0) is shown. Each pointer block P0-P
63 is the section script bytes SDB0 to SDB
DB7, the attribute bytes SDB0 and SDB1, the main scan break pointers SDB2 and SDB3, and the sub scan break pointer S
DB4, SDB5, sequence byte SDB6, and attribute byte SDB7 are shown.

When the start button of the operation unit 4 is pressed to start reading an image on a document, the main scanning counter signal and the sub-scanning counter signal are driven. The designated process is performed for each designated point according to the condition set in the pointer memory by the counter signal. At the start of reading, the pointer memory 18 specifies the pointer block P0. An attribute selection signal indicating the reading condition A is output from the section script bytes SDB0, SDB1, and SDB7 of the designated pointer block P0 to the binarization processing selection 17, and the main scanning point is output from the main scanning section script bytes SDB2 and SDB3. The data is also transferred to the sub-scan section debug byte SDB4, S
The sub-scanning point data is output from the DB 5 to the latch circuit 19, respectively.

The binarization processing selection 17 further converts the attribute selection signal into a dither pattern generation circuit 14, a gamma table selection circuit 11, a dither processing and error diffusion processing circuit 1.
5, the gamma table selection circuit 11 selects the data after the gamma table conversion specified by the attribute selection signal, and outputs it to the next stage. The dither pattern generation circuit 14 outputs the pattern data specified by the attribute selection signal to the dither processing and error diffusion processing circuit 15 as a comparison signal, and the dither processing and error diffusion processing circuit 15 outputs the pattern data designated by the attribute selection signal. Perform value conversion processing. When the dither processing is designated, the comparison signal is compared with the image data after the filter processing, and the binarization processing is started from the image data of the first pixel.

When the error diffusion processing is designated, error data is calculated from the image data after the filter processing, and the pattern data from the dither pattern generation circuit 14 is binarized as a comparison signal. The error data after being converted into a true value is accumulated in the error diffusion line buffer 16. Also in the error diffusion processing, the binarization processing is started from the first image data. Thus, the binarization processing of the image data is started from the point Q0 under the reading condition A, and the section script bytes (break pointers) SDB2 and SDB3 of the pointer block P0 are set as (MAX). The processing is performed up to the point (O, E) which is the end in the main scanning direction. When the processing advances to this point (O, E), it is compared with the sub-scanning counter signal whether or not the line is specified by the sub-scanning section debug bytes SDB4 and SDB5. If they do not match, the next line is set at P0. Performed processing.

As described above, the processing is repeated up to the line specified by the sub-scanning description byte, and when the line coincides with the sub-scanning counter signal, the process moves to the processing of the pointer block P1 indicated by the sequence pointer of the section script byte of P0. That is, the pointer block P0
, The processing is performed under the reading condition A up to the line indicated by Q01 in FIG.

From the next line, the designation of the pointer memory 18 outputs an attribute selection signal of the reading condition "A" to the binarization processing selection 17 based on the pointer block P1 and a pointer for displaying "X1". The data is output to the latch circuit 19. Therefore, the binarization processing selection 17 instructs each block to perform the binarization processing under the reading condition “A”. Here, "2" is set in the section script byte (sequence byte) SDB6 of the pointer block P1.
Is displayed, the reading condition “A” indicates the main scanning direction “
When the processing advances to X1 ″, that is, when the main scanning point data and the main scanning counter signal match and a match signal is input from the match detection circuit 20, the pointer memory 18 stores the section debug byte S of the pointer block P1.
The process proceeds to the pointer block P2 designated by DB6, and based on the pointer block P2, the binarization process is started from the position in the main scanning direction "X1" under the reading condition "C".

When the processing proceeds to the main scanning direction "X2", a coincidence signal is output from the coincidence detection circuit 20, and when the coincidence signal is input, the pointer memory
Then, the process proceeds to the pointer block specified by the section script byte SDB1 of No. 3 and outputs the attribute selection signal of the reading condition “A” specified by the pointer block P3 to the binarization processing selection 17 and displays “MAX”. Point data to be output to the latch circuit 19.
Therefore, processing under the reading condition "A" is performed up to the main scanning direction "E". This process is repeatedly performed up to the sub-scanning direction “y3”. When the sub-scan advances to “y3” which is the point Q02, the section script bytes SDB3, SD
The byte data is switched to "P4" in accordance with the number of lines specified by B4 and the sub-scanning counter signal.

Therefore, the pointer memory 18 starts from the next line.
Is a binarization process selection 17 based on the pointer block P4.
, An attribute selection signal of the reading condition “A” is output, and point data indicating “x3” is output to the latch circuit 19. Therefore, the binarization processing selection 17 instructs each block to perform the binarization processing up to the main scanning direction “x3” according to the reading condition “A”, and when the processing proceeds to “x3”,
A match signal is input from the match detection circuit 20 to the pointer memory 18, and the pointer block P designated by the section script byte SDB6 of the pointer block P4
Move to 5.

The pointer memory 18 outputs an attribute selection signal of the reading condition "B" specified by the pointer block P5 to the binarization processing selection 17, and also outputs "x4" of the section script bytes SDB2 and SDB3.
Is output to the latch circuit 19. Therefore, the binarization process is performed based on the reading condition "B" from the main scanning direction "x3" to "x4", and when the process proceeds to the main scanning direction "x4", the pointer block designated by the section script byte SDB6 Move to P6. The pointer memory 18 converts the attribute selection signal of the read condition “A” specified by the section debug byte SDB0 of the pointer block P6 into the binarization process selection 1
7 and the point data indicating “MAX” of the section script bytes SDB2 and SDB3 is output to the latch circuit 19.

Therefore, the window W is moved from the main scanning direction x4.
The processing under the reading condition "A" is performed up to the right end "E". This processing is repeatedly performed up to the sub-scanning direction “y4”, and the sub-scan description bytes SDB4, SDB5
, The processing from the next line to the area from point Q03 to point Q04 is performed in the same manner as the area from point Q01 to point Q02. Further, when the processing proceeds to the point Q04, the same processing as the processing of the area from the point Q0 to the point Q01 is executed for the area from the point Q04 to the point Q05.

As described above, the pointers in the main scanning and sub-scanning directions are collectively indicated to the pointer memory 18 before the reading, so that the CPU does not impose a load on the section processing during the reading line and the section with the gamma conversion is performed. Perform processing. In the present embodiment, as shown in FIG.
B7 is shown as a section script byte that specifies a gamma table, and the reading conditions A, B, and C specify a gamma table 1, a gamma table 2, and a gamma table 3, respectively.

A description will be given of a process in the case where the binarization process is designated by error diffusion or dither process in attribute selection. FIG. 9 shows a block diagram of the dither processing and error diffusion processing circuit 15 in the section processing circuit shown in FIG. In the dither processing and error diffusion processing circuit block shown in FIG. 9, the image data after the filter processing is input to the addition circuit as an input image. Here, the input image data is set as a target pixel, the sum of the input image data and the weighted sum of the surrounding error data is calculated, and the sum is output to the output value calculation in the next stage. The arithmetic circuit for the weighted sum of the surrounding error data takes the weighted sum of the error data of the previous line.

FIG. 10 is an example of a matrix of the weighted sum in the error diffusion process. In the example of FIG. 10, the target pixel is located at the position indicated by the mark *, the error data to be calculated on the same line as the target pixel is only one adjacent pixel, and the error data of the previous line is three pixels. is there. The number shown at the adjacent pixel to be operated means weighting of the error data. In this matrix example, the error data is multiplied by 1 at this position as the weighting 1, and the sum of the peripheral pixels is obtained. Similarly, weighting is applied to three pixels at the position of the pixel to be calculated on the previous line, and all the surrounding error data indicated by the error diffusion calculation matrix are summed up with weighting 1.

As described in the circuit for calculating the weighted sum of the surrounding error data, the total of the error data for the previous line is output from the circuit for calculating the weighted sum of the surrounding error data to the adding circuit. The sum of the same line data and the adjacent error data is calculated, and the sum of the surrounding error data is completed. In this example, the summed data is 1 /
Then, the sum of the quartered data and the target pixel is calculated. This data is output from the addition circuit to the output value calculation circuit.

Next, the processing in the output value calculation circuit will be described. The error calculation data input from the addition circuit performs a binarization process using the pattern data from the dither pattern generation circuit 14 as a threshold. 2 obtained by the binarization process
The value data is output as binary data after error diffusion processing. At this time, error data of the binarized target pixel is generated. Error data generation method is binary processing data.
In the case of "1", data obtained by subtracting 255 from the error operation data input from the adder circuit is used as the error data of the target pixel. Conversely, when the data after binarization processing is "0", the data is input from the adder circuit. The error calculation data is output as the error data of the pixel of interest, which is the next pixel on the same line data for the next pixel of interest, and is therefore output to the adder circuit for the next pixel of interest. In the error diffusion calculation on the next line, the error data of the previous line is output to the line buffer, so that the error data is prepared for the next line processing. The extracted data is used as error data in the previous line, and error diffusion processing is performed in this manner.

Next, a description will be given of a case where dither processing is performed using the same circuit. In FIG. 9, the input of the image data first enters the addition circuit, but when dither processing is selected, the image data is output to the output value calculation unit in the next stage without performing the addition processing. The output value calculator performs binarization processing using the dither data as a threshold value. The data obtained by the binarization processing is output to the next stage as image data after dither processing. As described above, switching between error diffusion processing and dither processing is performed by the attribute selection signal, and section processing is performed as required.

Next, an example in which the line buffers used for the error diffusion processing and the filter processing are commonly used in the apparatus will be described. In the section processing circuit example shown in FIG. 2, a filter processing line buffer 13 is used for the filter processing circuit 12, and an error diffusion line buffer 16 is used for the dither processing and error diffusion processing circuit 15. I have. A method commonly used for each function will be described with reference to FIG. FIG. 11 is an example showing the configuration of a filter matrix and a filter processing line buffer.

In this example, the filter operation uses a matrix of 5 × 5 size. In order to form a 5 × 5 matrix, the filter line buffer is composed of four line buffers, and the line buffer delays the data by 4 lines in the sub-scanning direction. The matrix size is formed. When performing a filter operation, a matrix is formed in this way,
In order to perform a target filter operation, the image data on the matrix is weighted to generate data obtained by performing a filter operation process on a target pixel.

In the processing example shown in FIG. 11, when the section designation is other than the error diffusion processing, a 5 × 5 matrix operation processing is performed using all the line buffers. If the section specification is error diffusion,
Informs that the attribute signal is error diffusion processing.
With that information, of the filtered line buffer,
The line buffer 4 that generates the line delay is switched to a line buffer that accumulates error data for error diffusion. With this switching, the line buffer 4 functions to delay the error data generated by the error diffusion processing. By this processing, error diffusion processing can be performed. In the filtering process, by eliminating the line buffer for generating the line delay for one line, the matrix size at that time becomes 5 × 4.
Even if the matrix size is reduced, the position of the pixel of interest must not be changed. In performing the error diffusion process, the filter process is performed as a 5 × 4 size. FIG. 12 is a diagram showing an example of a section processing circuit of the device.

An example of processing for switching between filter processing and use of the line buffer in section processing and other processing using the above-described apparatus will be described. FIG. 12 shows a circuit example of the section processing. This circuit operates as follows when the image is not switched by the section. First, when the setting for instructing the section switching is input to the pointer memory, the setting is set to be equal to or larger than the window size for processing the switching point. With this setting, image switching processing by section processing does not occur in this window. Therefore, the setting of the attribute byte in the section script byte is also 1
Set. In this one setting, selection of a gamma table, setting of a filter, setting of dither processing or error diffusion processing are performed. Here, when setting the error diffusion process,
Filter Processing and Error Diffusion Processing Among the line buffers of the line buffer, an instruction is given in the attribute byte to use one line buffer for error diffusion processing and to use the remaining line buffers for filter processing.

In this case, the size of the filter is set in the attribute byte within the range that can be set by the remaining line buffer. When the error diffusion process is not set, all the line buffers provided in the filter process and the error diffusion process can be used for the filter process, so that filters of all sizes prepared in the filter process can be selected.

[0040]

According to the first aspect of the present invention, the section is defined by three elements, and each element can be freely set, so that the number of sections and the degree of freedom of the reading conditions can be expanded, and the section function can be increased. Can be expanded.
A dither processing circuit used in section processing;
By sharing the value error diffusion processing circuit, the circuit scale can be reduced.

According to the second aspect of the present invention, the line scale for storing the error data of the error diffusion processing used for the section processing and the line buffer used for the filter processing are shared, thereby reducing the circuit scale. Can be. According to the third aspect of the present invention, the use of the line buffer can be switched between the filtering process and the error diffusion process during the section processing and when the section processing is not performed, so that the circuit scale can be reduced.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating an appearance of a scanner device.

FIG. 2 is a diagram showing a section processing circuit.

FIG. 3 is a diagram showing how pointer blocks are separated.

FIG. 4 shows two sections S1, S2 in a window
FIG. 7 is a diagram showing a state in which are set by superimposing.

FIG. 5 is a diagram in which coordinates of each section are designated.

FIG. 6 is a diagram showing a state where a pointer is developed in a pointer memory.

FIG. 7 is a diagram illustrating gamma table conversion of image data.

FIG. 8 is a diagram showing table conversion between image data and addresses.

FIG. 9 is a diagram showing a dither processing and error diffusion processing circuit block in the section processing circuit.

FIG. 10 is an example of a matrix of a weighted sum in an error diffusion process.

FIG. 11 is an example showing a configuration of a filter matrix and a filter processing line buffer.

FIG. 12 is a diagram illustrating an example of a section processing circuit.

FIG. 13 is a diagram showing a configuration example of a conventional window function.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Scanner apparatus 2 Main body 3 Document table 4 Operation part 5 Document holder 11 Gamma table selection circuit 12 Filter processing circuit 13 Filter processing line buffer 14 Dither pattern generation circuit 15 Dither processing and error diffusion processing circuit 16 Error diffusion line buffer 17 Binarization Processing selection 18 Pointer memory 19 Latch circuit 20 Match detection circuit

Claims (3)

[Claims] An area to be read is specified as a window within a document reading area that defines a maximum reading area, and a document in this window is read by main scanning and sub-scanning. Is an image reading apparatus capable of designating a plurality of areas to be read under different reading conditions as sections, wherein the sections include a break pointer indicating a position of the section in the main scanning direction and a sub-scanning direction, and a position of a next pointer sequence. Is defined by three elements, namely, a sequence pointer that indicates a read condition and an attribute pointer that specifies a reading condition, and has setting means that can freely set these elements. When the dither matrix method is specified in each section setting Dither processing to specify different dither matrices and dither matrix sizes An image reading apparatus road and the binary error diffusion processing circuit, characterized in that it is constituted by a common. 2. An image reading apparatus according to claim 1, wherein a line buffer for storing error data used for error diffusion processing and a line buffer used for filter processing are commonly used. 3. The image reading apparatus according to claim 2, wherein the use of the line buffer is switched between the filtering process and the error diffusion process during the section processing and when the section processing is not performed.