JPH1127070A - Clamp circuit - Google Patents

Abstract

(57) Abstract: A clamp circuit for clamping an input signal at a predetermined clamp level, and an object thereof is to provide a clamp circuit that can accurately and surely clamp an input signal. SOLUTION: A clamping transistor Q11 which is turned on when an input signal exceeds a clamp potential to hold the input signal at the clamp potential, a constant current source 121 which generates a constant current according to a power supply voltage, and a constant current A resistor R11 connected between the source 121 and the base of the clamping transistor Q11
And a base potential control transistor Q12 having a base connected to the connection point between the constant current source 121 and the resistor R11, a collector connected to the base of the clamping transistor Q11, and controlling the base potential of the clamping transistor Q11. It becomes as.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a clamp circuit, and more particularly, to a clamp circuit for clamping an input signal at a predetermined clamp level.

[0002]

2. Description of the Related Art In a tape recorder, noise may be recorded on a magnetic tape due to external static electricity during reproduction. This is considered to be due to the fact that noise current flows through the coil of the magnetic head due to static electricity, and a high voltage is generated at both ends of the coil of the magnetic head.

For this reason, a clamp circuit is provided at both ends of the coil of the magnetic head so as not to generate such a high voltage that recording is performed, thereby preventing noise from being recorded. FIG. 4 shows a block diagram of a conventional tape recorder. The tape recorder 1 magnetically records / reproduces information by sliding the magnetic head 3 against the magnetic tape 2. The recording signal is a recording amplifier 4
And supplied to one end of the magnetic head 3 to be recorded on the magnetic tape 2. A reproduction signal reproduced from the magnetic tape 2 by the magnetic head 3 is amplified by the reproduction amplifier 5 and supplied to the output stage.

The recording amplifier 4 includes an operational amplifier 4a, resistors R1 and R2, and a switch SW1. The operational amplifier 4a and the resistors R1 and R2 form a non-inverting amplifier, and the recording signal amplified by the non-inverting amplifier is supplied to the switch SW1. Switch SW1
Is composed of two fixed contacts T1, T2 and a movable contact T3. The output of the operational amplifier 4a is a fixed contact T1
Supplied to Also, the fixed contact T2 of the switch SW1
Is open, and the movable contact T3 is connected to one end of the magnetic head 3.

[0005] The switch SW1 has a movable contact T during recording.
3 is connected to the fixed contact T1 and supplies the output of the operational amplifier 4a to one end of the magnetic head 3;
Is connected to the fixed contact T2 to disconnect the operational amplifier 4a and the magnetic head 3. The reproduction amplifier 5 is an operational amplifier 5
a, resistors R4 to R6, capacitors C1 and C2, and constitute a non-inverting amplifier circuit.

The inverting input terminal of the operational amplifier 5a is connected to one end of a coil of the magnetic head 3, and a center voltage (1/2) Vcc is applied via a resistor R2, and is maintained at the center voltage (1/2) Vcc. Is done. The signal generated by the magnetic head 3 is supplied to the reproducing amplifier 5 and the center voltage (1/1)
2) Non-inverted amplification centered around Vcc. The other end of the coil of the magnetic head 3 is connected to the bias circuit 6. The bias circuit 6 includes a switch SW2 and a current source 6a. The switch SW2 has a movable contact T4 connected to the other end of the magnetic head 3. The fixed contact T5 of the switch SW2 is
It is grounded via the current source 6a and is connected to the movable contact T4 during recording. Also, the fixed contact T of the switch SW2
6 is applied with a center voltage (1/2) Vcc and is connected to the movable contact T4 during reproduction.

When recording, the current source 6 is switched by the switch SW2.
A predetermined current is drawn from the magnetic head 3 by a, and the recording signal supplied from the recording amplifier 4 is recorded on the magnetic tape 2 with a different polarity centering on the predetermined current.
During reproduction, the center voltage (1) is applied to the other end of the magnetic head 3.
/ 2) Vcc is applied to reproduce the signal reproduced from the magnetic tape 2 around the center voltage (1/2) Vcc and supply it to the reproducing amplifier 5.

The magnetic head 3 is connected to a clamp circuit 7 for clamping a signal generated by the magnetic head 2 within a predetermined range so that noise generated by static electricity or the like during reproduction is not recorded on the magnetic tape 2. . The clamp circuit 7 includes Schottky diodes D1, D2 and a switch SW3. Schottky diode D1
Has a cathode connected to one end of the magnetic head 3 and an anode connected to the other end of the magnetic head 3 via a switch SW3.

The Schottky diode D2 has an anode connected to one end of the magnetic head 3 and the other end connected to the magnetic head 3 via a switch SW3. The switch SW3 is such that the movable contact T7 has a Schottky diode D1.
, D2, the fixed contact T8 is open at the other end of the magnetic head 3, and the fixed contact T9 is open. Movable contact T
Numeral 7 is connected to the fixed contact T9 during recording and disconnects the Schottky diodes D1 and D2 from the magnetic head 3, and connected to the fixed contact T8 during reproduction to connect the Schottky diodes D1 and D2 to the magnetic head 3. Connecting. That is, switching is performed so that clamping is performed only during reproduction.

The Schottky diode D1 is connected so that the direction from the other end of the coil of the magnetic head 3 to the one end is forward, and the Schottky diode D1 is connected to the coil of the magnetic head 3 from the other end due to static electricity during reproduction. When noise is generated in the direction of one end, the coil of the magnetic head 3 is short-circuited to absorb the noise. The Schottky diode D2 is connected so that the direction from one end to the other end of the coil of the magnetic head 3 becomes the forward direction, contrary to the Schottky diode D1, and the magnetic head 3 When noise is generated from one end of the coil to the other end, the coil of the magnetic head 3 is short-circuited and the noise is absorbed.

The level of a normal signal generated in the coil of the magnetic head 3 is several tens of mV _PP, which is sufficiently smaller than the forward saturation voltage of the Schottky diodes D 1 and D 2, so that the input signal is not clamped. Absent.

[0012]

However, in a conventional reproducing circuit of a tape recorder, a clamp circuit using a forward saturation voltage of a Schottky diode connected between both ends of a magnetic head is used. The clamp potential is determined by the characteristics of the key diode, and there is a problem that the degree of freedom in setting the clamp potential is low.

It is an object of the present invention to provide a clamp circuit that can accurately and surely clamp an input signal.

[0014]

According to a first aspect of the present invention, a clamp circuit for clamping an input signal turns on when the input signal exceeds a clamp potential to hold the input signal at the clamp potential. A base potential for setting the clamping transistor and a base potential of the clamping transistor to an off potential when the input signal is within the clamping potential, and to an on potential when the input signal exceeds the clamping potential. Setting means.

According to the first aspect of the present invention, the base potential of the clamp transistor is set by the base potential setting means so that the clamp transistor is turned on when the input signal becomes a predetermined clamp potential, thereby clamping the input signal. Is performed, the clamp potential can be set freely by controlling the base potential of the clamping transistor by the base potential setting means, so that the degree of freedom of the clamp range can be improved.

In a preferred embodiment, the base potential setting means includes:
A constant current source that generates a constant current according to a power supply voltage, a resistor connected between the constant current source and the base of the clamping transistor, and a base at a connection point between the constant current source and the resistor. And a collector connected to the base of the clamping transistor and controlling a base potential of the clamping transistor.

According to the second aspect, the on-potential of the clamping transistor is set by the base potential control transistor, and the clamping potential is set by the constant current source and the resistor, so that the base potential of the clamping transistor is set to the predetermined clamping potential. And the clamp potential can be set freely, so that the degree of freedom of the clamp range can be improved.

In a preferred embodiment of the present invention, there is provided a clamp control means which is connected to a base of the clamp transistor and controls a base potential of the clamp transistor in accordance with a clamp control signal for controlling whether or not the input signal needs to be clamped. It is characterized by the following. According to the third aspect, by controlling the base potential of the clamping transistor in accordance with the clamp control signal for controlling the necessity of the clamp by the clamp control means, the necessity of the clamp for the input signal can be freely set and released. .

[0019]

FIG. 1 is a circuit diagram of an embodiment of the present invention. 4, the same components as those of FIG. 4 are denoted by the same reference numerals, and the description thereof will be omitted. Reproduction circuit 10 of the present embodiment
Numeral 0 indicates that the clamp circuit 110 is connected not between both ends of the magnetic head 3 but between the power supply potential and the connection point between the magnetic head 3 and the reproducing amplifier 5.

The clamp circuit 110 includes a negative clamp circuit 120 for clamping the level in the positive direction, and a negative clamp circuit 1 for clamping the level in the negative direction.
30. First, the negative clamp circuit 120
Will be described. The negative clamp circuit 120 is an NP
It comprises N transistors Q11 to Q13, resistors R11 and R12, a constant current source 121, a switch SW11, and a constant voltage source 122. The transistor Q11 is a clamping transistor, the emitter of which is connected to the connection point between the magnetic head 3 and the reproducing amplifier 5, and the power supply voltage Vcc is applied to the collector.

The collector of the transistor Q12 is connected to the base of the transistor Q11. 1/2 Vcc is applied to the emitter of the transistor Q12, and the base is connected to the connection point between the constant current source 121 and the resistor R11. Constant current source 1
21 has one end connected to the resistor R11 and the other end connected to the power supply voltage V
cc is applied. The base potential of the transistor Q11 is set by the resistor R11 and the transistor Q12.

The transistor Q13 controls the clamping operation. The emitter is grounded, and the collector is connected to the base of the transistor Q11. The base is connected to the switch SW11 via the base resistor R12. The switch SW11 has the movable contact T11 connected to the base of the transistor Q13 via the resistor R12, the fixed contact T12 to which the movable contact T11 is connected at the time of recording is connected to the constant voltage source 122, and the movable contact T11 is connected at the time of reproduction. Fixed contact T
13 is left open.

Here, the clamp potential of the negative clamp circuit 120 will be described. During playback, the transistor Q
13 is off, and the constant current I0 supplied from the constant current source 121 is Ｖ Vcc via the resistor R11 and the transistor Q12.
Flows to Therefore, the base potential V of the transistor Q11
B11 can be expressed as follows: VB11 = (１ ／) Vcc + VF− (R11 × I0) (1) where VF is the forward voltage of the transistor Q12.

Here, assuming that the emitter potential of the transistor Q11 is (1/2) Vcc, the base-emitter voltage VBE11 of the transistor Q11 is VBE11 = VB11- (1/2) Vcc = VF- (R11.times.I0) ... (2) Therefore, only the voltage VBE11 represented by the equation (2) is applied to the base of the transistor Q11. In this state, the transistor Q11 is turned off.

At this time, it is assumed that an external noise current flows through the coil of the magnetic head 3 and lowers the emitter potential of the transistor Q11. When the emitter potential of the transistor Q11 becomes (１ ／) Vcc− (I0 × R11) (3) or less, the base-emitter voltage VBE11 of the transistor Q11 becomes VBE11 = VB11 − ｛(１ ／) Vcc. − (R11 × I0)｝ = VF (4) As a result, the transistor Q11 is turned on, and the emitter potential of the transistor Q11 is clamped to (1/2) Vcc- (R11.times.I0) (5).

As described above, the negative clamp circuit 12
By 0, the negative side is clamped by (1/2) Vcc- (R11.times.I0). The operation of the negative polarity clamp circuit will be described with reference to the drawings. FIG. 2 is a diagram illustrating the operation of the negative clamp circuit according to one embodiment of the present invention. FIG. 2A is a waveform at a connection point P0 between the magnetic head 3 and the reproducing amplifier 5, and FIG.
Shows the switching state of the transistor Q11, and FIG. 2C shows the switching state of the transistor Q13.

In order to perform reproduction at time t1, switch SW
When the movable contact T11 of 11 is connected to the fixed contact T13, the base of the transistor Q13 becomes low level.
Turn off as shown in (C). When the transistor Q13 is turned off, the base potential of the transistor Q11 rises and is set to a predetermined base potential shown in Expression (1).

At this time, the magnetic head 3 and the reproducing amplifier 5
As shown in FIG. 2A, when the signal at the connection point P0 is within the clamp potential represented by the equation (5), the transistor Q11 is turned off, and is not affected by the negative clamp circuit 120. It is supplied to the reproducing amplifier 5 and does not affect the magnetic head 3. At time t2,
As shown in FIG. 2A, the magnetic head 3 and the reproducing amplifier 5
When the level of the connection point P0 with the transistor Q11 drops below a predetermined clamp potential shown in the equation (5) due to noise or the like, the emitter potential of the transistor Q11 drops, so that the transistor Q11
Is turned on, and the transistor Q11 is turned on.

When the transistor Q11 is turned on, the power supply voltage V is applied to the connection point P0 between the magnetic head 3 and the reproducing amplifier 5.
2A, the potential at the connection point P0 between the magnetic head 3 and the reproducing amplifier 5 is controlled so as to increase and not decrease below a predetermined level as shown in FIG. Next, FIG.
Returning to, the positive polarity clamp circuit 130 will be described.

The positive clamp circuit 130 includes PNP transistors Q21 to Q23, resistors R21 and R22, a constant current source 13
1. It is composed of a switch SW12. Transistor Q21
Is a clamp control transistor, the emitter of which is connected to the connection point P0 between the magnetic head 3 and the reproducing amplifier 5, and the collector of which is grounded. The collector of the transistor Q22 is connected to the base of the transistor Q21.
Is switched in accordance with the collector potential of 1/2 Vcc is applied to the emitter of the transistor Q22, and the base is connected to the connection point between the constant current source 131 and the resistor R21.
The constant current source 131 has one end connected to the resistor R21 and the other end grounded. Switching is performed in accordance with the base potential of the transistor Q21, and controls the base potential of the transistor Q21.

The transistor Q23 controls the clamping operation. The power supply voltage Vcc is applied to the emitter, and the collector is connected to the base of the transistor Q21. The base of the transistor Q23 is connected to a base resistor R22.
Through the switch SW12. Switch SW12
The movable contact T21 is connected to the base of the transistor Q23 via the resistor R22, the fixed contact T23 to which the movable contact T21 is connected during recording is grounded, and the fixed contact T22 to which the movable contact T21 is connected during reproduction is opened. Is done.

Here, the clamp potential of the positive polarity clamp circuit 130 will be described. During playback, the transistor Q
23 is off, and the constant current I0 is drawn from the resistor R21 and the transistor Q22 by the constant current source 131 and flows to the ground. Therefore, the base potential VB21 of the transistor Q21
Is given by: VB21 = (1/2) Vcc-VF- (R21.times.I0) (6) where VF is the saturation voltage of transistor Q22.

Here, assuming that the emitter potential of the transistor Q21 is (1/2) Vcc, the base-emitter voltage VBE11 of the transistor Q21 is VBE21 = (1/2) Vcc-VB21 = VF + (R21.times.I0) (7) Therefore, only the voltage VBE21 represented by the equation (2) is applied to the base of the transistor Q21, and in this state, the transistor Q21 is turned off.

At this time, it is assumed that an external noise current flows through the coil of the magnetic head 3 and raises the emitter potential of the transistor Q21. When the emitter potential of the transistor Q21 becomes (（) Vcc + (I0 × R21) (8) or less, the base-emitter voltage VBE21 of the transistor Q21 becomes VBE21 = ｛(１ ／) Vcc + (R21 × I0)｝-VB21 = -VF (9) For this reason, the transistor Q21 is turned on, and the emitter potential of the transistor Q21 is clamped to (1/2) Vcc + (R21 × I0) (10).

As described above, the positive polarity clamp circuit 13
The positive side is clamped by (1/2) Vcc + (R21 × I0) by 0. The operation of the negative polarity clamp circuit will be described with reference to the drawings. FIG. 3 is a diagram illustrating the operation of the positive polarity clamp circuit according to one embodiment of the present invention. FIG. 3A is a waveform at a connection point P0 between the magnetic head 3 and the reproducing amplifier 5, and FIG.
FIG. 3C shows the switching state of the transistor Q11, and FIG. 3C shows the switching state of the transistor Q13.

To perform reproduction at time t11, switch SW
When the movable contact T21 of the transistor 21 is connected to the fixed contact T23, the base of the transistor Q23 becomes high level.
The transistor Q23 is turned off as shown in FIG. When the transistor Q23 is turned off, the base potential of the transistor Q21 decreases, and is set to a predetermined base potential shown in Expression (6).

At this time, the magnetic head 3 and the reproducing amplifier 5
3A, the transistor Q21 is turned off and is not affected by the positive polarity clamp circuit 120, as shown in FIG. It is supplied to the reproducing amplifier 5 and does not affect the magnetic head 3. At time t12
Then, as shown in FIG. 3A, the level of the connection point P0 between the magnetic head 3 and the reproducing amplifier 5 is calculated by the equation (1)
When the potential rises above a predetermined clamp potential shown in (0), the emitter potential of the transistor Q21 rises, so that the base-emitter voltage of the transistor Q21 becomes an on voltage, and the transistor Q21 turns on.

When the transistor Q21 is turned on, the connection point P0 between the magnetic head 3 and the reproducing amplifier 5 is set to the ground potential, and the connection between the magnetic head 3 and the reproducing amplifier 5 is made as shown in FIG. The potential at the point P0 is reduced, and the equation (10)
Is controlled so as not to rise above a predetermined clamp potential shown in FIG. As described above, according to the present embodiment, the signal at the connection point P0 between the magnetic head 3 and the reproducing amplifier 5 is set to a predetermined level {(1/2) Vcc + (R21.times.I0)} and
It can be clamped at {(1/2) Vcc + (R21 × I0)}. Therefore, even if noise occurs in the coil of the magnetic head 3, a predetermined level {(1/2) Vcc + (R21 × I0)}.
The components above and below {(1/2) Vcc + (R21 × I0)} have a predetermined level {(1/2) Vcc + (R21 × I0).
) And {(1/2) Vcc + (R21 × I0)} so that no noise is written on the magnetic tape 2 by the magnetic head 3.

[0039]

As described above, according to the first aspect of the present invention, the base potential setting means sets the base potential of the clamp transistor to be turned on when the input signal reaches a predetermined clamp potential. The clamp potential can be freely set by controlling the base potential of the clamping transistor by the base potential setting means by clamping the input signal by setting to, so that the degree of freedom of the clamp range can be improved. Has features.

According to the present invention, the base potential control transistor sets the on-potential of the clamp transistor, and the constant current source and the resistor set the clamp potential, thereby setting the base potential of the clamp transistor to a predetermined clamp potential. The clamp potential can be set freely, and therefore, the clamp potential can be set freely.

According to the third aspect, the necessity of the clamping for the input signal can be freely set by controlling the base potential of the clamping transistor according to the clamp control signal for controlling the necessity of the clamping by the clamp control means. , And can be released.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention.

FIG. 2 is an operation waveform diagram of the negative polarity clamp circuit according to one embodiment of the present invention.

FIG. 3 is an operation waveform diagram of the positive polarity clamp circuit according to one embodiment of the present invention.

FIG. 4 is a circuit diagram of a conventional example.

[Explanation of symbols]

 REFERENCE SIGNS LIST 100 tape recorder 2 magnetic tape 3 magnetic head 4 recording amplifier 5 reproduction amplifier 6 bias circuit 110 clamp circuit 120 positive polarity clamp circuit 121, 131 constant current source 122 constant voltage source 130 negative polarity clamp circuit

Claims (3)

[Claims] 1. A clamp circuit for clamping an input signal, comprising: a clamp transistor that is turned on when the input signal exceeds a clamp potential to hold the input signal at the clamp potential; and a base potential of the clamp transistor. And a base potential setting means for setting the input signal to an off potential when the input signal is within the clamp potential, and to an on potential when the input signal exceeds the clamp potential. . 2. The system according to claim 1, wherein the base potential setting means includes: a constant current source that generates a constant current according to a power supply voltage; a resistor connected between the constant current source and a base of the clamping transistor; A base potential control transistor having a base connected to a connection point between the current source and the resistor, a collector connected to the base of the clamp transistor, and controlling a base potential of the clamp transistor. Item 2. The clamp circuit according to Item 1. 3. A clamp control means connected to a base of the clamp transistor and controlling a base potential of the clamp transistor in accordance with a clamp control signal for controlling whether or not the input signal needs to be clamped. 3. The clamp circuit according to claim 1, wherein: