JPH11275128A - Switching hub circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily construct a duplex of a system, to disconnect a fault node from a network and to improve reliability of the network. SOLUTION: A fault detection circuit 2 detects the frequent occurrence of reception data abnormality such as an FCS(frame check sequencer) error or the like in a received packet, the abnormality of a transmission line such as disconnection or the like and the abnormality of a node such as frequent occurrence of collision or the like and informs a switch controller 6 of the detection of the fault. A packet buffer 3 tentatively stores the received packet and informs the switch controller 6 of that effect. While storing the packet to the packet buffer 3, the address of the packet is reattached. The switch controller 6 reattaches the address of the packet, specifies a path to a switch circuit 5 and abandons the received packet based on information stored in the reception port table 41, transmission origin MAC(medium access control) address table 42 and destination MAC address table 43 of a memory 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a switching hub circuit, and more particularly to a switching hub circuit for improving system reliability.

[0002]

2. Description of the Related Art Conventionally, a switching hub (HUB) circuit refers to a transmitted MAC (MediaAccess C).
A plurality of LANs (Local Area Network) connected to the switching hub circuit are interpreted by interpreting a destination address called a MAC address in the (control) frame.
This is a device that controls which LAN node of the node the data is relayed to.

A switching hub as described above is shown in FIG.
As shown in FIG. 1, a star topology is used, that is, a network system in which LAN nodes 51, 52-1 to 52-1 are connected in a star configuration via a switching hub 50.

That is, the switching hub 50 is connected to a LAN.
The MAC frame 53 from the node (# 0) 51 is relayed to one of a plurality of LAN nodes (# 1 to # 1) 52-1 to 52-1.

[0005] For example, as shown in FIG. 13, if the MAC address added to the MAC frame 53 is “M”, the switching hub 50 transmits to the LAN node (# 2) where the MAC address “M” is set in advance. ) To relay the MAC frame 53 to 52-2.

As connection forms in the network system, there are a ring topology and a bus topology other than the above-mentioned star topology. In the network system, when a failure occurs in a connected port, the port is disconnected.

As a method of disconnecting the port, there is a method disclosed in Japanese Patent Application Laid-Open No. 7-336377. According to the method described in the publication, when any one of the physical layer controllers in the concentrator of the ring network has failed, the controller monitoring mechanism is configured to detect the failed physical layer controller.

In this case, by switching a switch connected to the physical layer controller in which the failure is detected, the physical layer controller in which the failure is detected is electrically cut off, and a bypass is formed to form another physical layer controller. Connect controllers. As a result, normal stations are connected to each other without disconnecting the entire line concentrator from the link, thereby enabling data transmission.

[0009]

In the above-described conventional switching hub circuit, the failure of the LAN node or the LA
If the disconnection of N occurs, it becomes impossible to recognize the existence of the node that is the destination of the packet. Therefore, if the failure of the LAN node of the destination of the packet or the disconnection of the LAN connected to the destination LAN node occurs, the packet Will be discarded.

When a failure such as a failure occurs in a working node of a device requiring high reliability, it is necessary to switch to a spare node. Further, at that time, it is necessary to physically disconnect the failed active node from the network in order to prevent the failed active node from affecting the network by the abnormal output.

[0011] Therefore, when connecting a device requiring high reliability having a working node and a backup node to a switching hub, a network switching function between the device and the network or a device having the function is required.

Therefore, an object of the present invention is to solve the above-mentioned problems and to easily construct a duplex system.
An object of the present invention is to provide a switching hub circuit capable of separating a failed node from a network and improving the reliability of the network.

[0013]

A switching hub circuit according to the present invention is connected to a plurality of nodes and interprets a destination address in a packet transmitted from one of the plurality of nodes to interpret a destination address of another node. The switching hub circuit controls which of the nodes relays the packet, and includes means for changing a destination address of the packet.

In another switching hub circuit according to the present invention, a plurality of nodes are connected via corresponding transmission lines, and a destination address in a packet transmitted from one of the plurality of nodes is set in advance. A switching hub circuit that controls which of the other nodes to relay the packet by interpreting based on the table, and a means for detecting a failure of each of the plurality of nodes and the transmission path, Means for replacing the address of the packet with an address pre-recorded in the table when the address of the packet is any one of a node where the failure is detected and a node corresponding to the transmission line where the failure is detected And

That is, the switching hub circuit of the present invention includes means for detecting a failure of a node or a transmission line connected to the switching hub, means for rewriting a MAC address of a received packet, and information of a spare node to be switched in the event of a failure. It has means for managing and means for controlling a switch based on information on failure detection and spare nodes.

As described above, the provision of the means for controlling the switch based on the information of the failure detection and the spare node at the time of failure makes it possible to easily construct a highly reliable system.

Further, by switching to the spare node, the failed node can be disconnected from the network, so that it is possible to avoid the danger that the failed node will output abnormally to the network due to the failure. It becomes possible.

Further, by registering necessary information in the means for managing information on the spare node in advance, it is possible to automatically switch to the spare node when a failure is detected, that is, it is not necessary to manually switch to the spare node. It is possible to respond quickly to a failure.

[0019]

Next, an embodiment of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing a configuration of a switching hub circuit according to one embodiment of the present invention.
In the figure, a switching hub (HUB) circuit 1 includes a failure detection circuit 2, a packet buffer 3, a memory 4, a switch circuit 5, and a switch controller 6.

The failure detection circuit 2 is a LAN (Local A)
area 7) (i = 1, 2, 2)
...) And the packets received from the working node 8-1 and the protection node 8-2, respectively.
(Detection circuits 21-1 and 21) that detect anomalies of received data such as ck Sequencer errors, abnormalities of transmission paths such as disconnections between nodes and the switching hub circuit 1, and abnormalities of nodes such as frequent occurrence of collisions. −2, ……,
21-m and 21-n. When the failure detection circuit 2 detects the above-described failure, it notifies the switch controller 6 of the detection of the failure.

The packet buffer 3 is a LAN node 7-i
And a buffer 31- for temporarily storing packets respectively received from the active node 8-1 and the standby node 8-2.
1, 31-2,..., 31-m, 31-n. The packet buffer 3 stores packets received from the LAN node 7-i, the working node 8-1 and the standby node 8-2, respectively, in buffers 31-1, 31-2,.
The switch controller 6 is notified of the temporary storage in 31-m and 31-n. While the packet is being stored in the packet buffer 3, the address of the packet is changed.

The memory 4 stores a reception port table 41 and S
A (Source Address: source MAC address) table 42 and DA (Destination)
(Address: destination MAC address) table 43
And The switch controller 6 changes the address of the packet, specifies the path to the switch circuit 5, and discards the received packet based on the information in each table in the memory 4.

FIG. 2 shows the detection circuit 2 of the failure detection circuit 2 shown in FIG.
FIG. 1 is a block diagram showing a configuration of 1-1. In the figure, a detection circuit 21-1 is a circuit that detects a failure for one port, and includes a link disconnection detection circuit (LNK) 22-1, an FCS error detection circuit 24-1, and a collision detection circuit (CO
L) 26-1.

The link disconnection detecting circuit 22-1 has a link disconnection timer 23-1, and when detecting a link disconnection with the LAN node 7-1, the time interval of the link disconnection state is determined by the link disconnection timer 23-1. Measure with

The FCS error detection circuit 24-1 has an FSC counter 25-1 and checks the FCS of a received packet received from the LAN node 7-1. FSC
When the error detection circuit 24-1 detects an FCS error,
The FCS counter 25-1 is incremented by +1.

The collision detection circuit 26-1 includes a collision counter 27-1. When a collision (collision) is detected, the collision counter 15 counts up by +1.

The switch controller 6 has a fault register 6
1 and a detection circuit 21-via an OR circuit 28.
1 is stored in the failure register 61, and the failure notification notified from the link disconnection detection circuit 22-1, the FCS error detection circuit 24-1, and the collision detection circuit 26-1 is stored in the failure register 61. Manages failure status for each port.

Although not shown, the detection circuit 21-
2,..., 21-m and 21-n are also detected by the detection circuit 21-.
1, the detection circuit 21-2,.
, 21-m, and 21-n perform the same operation as the detection circuit 21-1.

In the detection circuit 21-1 in the failure detection circuit 2, a link disconnection timer 22-1 measures a time interval of a link disconnected state. The FCS counter 25-1 counts up by +1 when a received packet in which an FSC error has occurred is received, and is reset to 0 when a received packet without an FSC error is received. That is, the FCS counter 25-1
Is a counter for counting the number of consecutive reception packets in which an FCS error has occurred.

The collision counter 27-1 is a counter for counting up the number of times of transmission of a packet in which a collision has occurred. When the switching hub circuit 1 transmits a packet without collision, the collision counter 27-1 is reset to zero. In other words, the collision counter 27-1 counts the number of consecutive packet transmission failures due to collision.

The link disconnection timer 23-1, FCS counter 25-1, and collision counter 27-1 each have a threshold. Link disconnection timer 23-1 and FCS counter 25-
If any one of 1 and the collision counter 27-1 exceeds the threshold value, the switch controller 6 is notified as a failure notification.

Upon receiving the failure notification, the switch controller 6 records the failure notification in the failure register 61. The failure register 61 records that a failure has been notified for each port.

FIG. 3 is a block diagram showing the configuration of the buffer 31-1 of the packet buffer 3 of FIG. In the figure, a buffer 31-1 is a buffer circuit for one port, and is a dual port RAM (random access memory).
32-1, a reception detection circuit 33-1 and a RAM control circuit 34-1.

The dual port RAM 32-1 is a memory for storing a packet received from the LAN node 7-1 input via the failure detection circuit 2. Reception detection circuit 33
-1 is a circuit for detecting the beginning and end of a received packet.

The RAM control circuit 34-1 is a circuit for controlling the dual port RAM 32-1. The RAM control circuit 34-1 has a storage address counter 35-1 and a DA that records a destination MAC address.
An address register 36-1 and an SA address register 37-1 recording a source MAC address are provided.

The storage address counter 35-1, DA address register 36-1, and SA address register 37-1
In (2) and (3), the value of the register is written based on the notification of the reception of the packet detected by the reception detection circuit 33-1.

Although not shown, the buffer 31-
The configuration of 2,..., 31-m, 31-n is also a buffer 31-m.
1 and the buffer 31-2,...
, 31-m, 31-n perform the same operation as the buffer 31-1.

Buffer 31-1 in packet buffer 3
In, when a reception packet is received via the failure detection circuit 2, the reception detection circuit 33-1 notifies the RAM control circuit 34-1 that the reception packet is being received.

The RAM control circuit 34-1 counts up the storage address counter 35-1 while receiving the receiving notification. The RAM control circuit 34-1 gives the value of the storage address counter 35-1, which keeps counting up while receiving the received packet, as the address of the dual port RAM 32-1. Dual port RAM 32-1
Stores the received packet at the given address.

When a read or write instruction is given from the switch controller 6, the RAM control circuit 34-1 gives the values of the DA address register 36-1 and the SA address register 37-1 to the dual port RAM 32-1 as addresses. . Dual port RAM32
-1 reads and writes the packet corresponding to this address.

FIG. 4 is a block diagram showing the configuration of a system using the switching hub circuit 1 according to one embodiment of the present invention. In the figure, this system adopts a star topology connection configuration in which a LAN node 7-i, an active node 8-1 and a standby node 8-2 are connected to the switching hub circuit 1.

FIG. 5 is a diagram showing an example of packet transfer in the system shown in FIG. The figure shows packet transfer between the LAN node 7-1 and the active node 8-1. The arrows in the figure indicate the flow of the packet.

FIG. 6 shows the format of a packet. In the figure, packets are assembled in this format, and data is transferred to the LAN node of the destination MAC address according to this format.

As shown in FIG. 6, the packet is composed of a 6-octet DA (destination MAC address) and a 6-octet S
A (source MAC address), 2-octet type (TYPE), 46-1500 octet data (DATA), and 4-octet FCS.

FIG. 7 is a diagram showing an example of packet transfer at the time of failure in the system shown in FIG. In the figure,
Failure of working node 8-1 or working node 8-1
4 shows a state in which a transition from using the working node 8-1 to using the standby node 8-2 due to a failure such as a disconnection of the transmission path between the switching node and the switching hub circuit 1.

By transitioning to the use of the standby node 8-2, the standby node 8-2 operates instead of the active node 8-1, which was the communication partner of the LAN node 7-1.

FIG. 8 is a diagram showing an example of the configuration of each table in the memory 4 during packet transfer between the LAN node 7-1 and the active node 8-1 in FIG. 8A shows a configuration example of the reception port table 41, FIG. 8B shows a configuration example of the SA table 42, and FIG. 8C shows a configuration example of the DA table 43.

The reception port table 41 stores port numbers 1, 2,..., M, n and enable [ON (ON) or OFF (OFF)] in association with each other. The source MAC address (S
A) α, β, ..., γ, δ and enable [ON
.., C, and γ are stored in association with each other.

In the DA table 43, destination MAC addresses (DA) α, β,..., Γ, δ and enable [ON (O
N) or off (OFF)] and the destination MAC address (DA) A, B,..., Δ, C and the transmission port number 1,
.., M, and n are stored in association with each other.

FIG. 9 is a diagram showing an example of the contents updated after detecting a failure in each table in the memory 4 shown in FIG.
0 is a flowchart showing the operation of the switch controller 6 in FIG. 1, and FIG. 11 is a flowchart showing the operation of the switch controller 6 when the failure detection circuit 2 in FIG. 1 detects a failure.

The operation of the switch hub circuit 1 according to one embodiment of the present invention will be described with reference to FIGS. Hereinafter, an operation when a packet received from the LAN node 7-1, that is, a received packet is transferred to the active node 8-1 will be described.

The switching hub circuit 1 has a LAN node 7
When a packet is received from -1 via port # 1 of port number "1", the received packet is temporarily stored in the packet buffer 3. After storing the received packet, the packet buffer 3 notifies the switch controller 6 of a reception notification indicating that the packet has been received.

Upon receiving the reception notification (step S1 in FIG. 10), the switch controller 6 searches the reception port table 41 in the memory 4 using the port number “1” that has received the reception packet as a key (step S2 in FIG. 10).

In this case, as a result of the search, the switch controller 6 searches the SA table 42 because the enable of the port number "1" is "ON" (step S3 in FIG. 10) (steps S4 and S5 in FIG. 10). . The switch controller 6 reads the source MAC address from the received packet stored in the packet buffer 3 in order to search the SA table 42.

The switch controller 6 searches the SA table 42 using the read source address “α” as a key.
As a result of the search, the switch controller 6 reads the destination MAC address from the packet buffer 3 (step S9 in FIG. 10) because the enable is “off” (step S7 in FIG. 10). The switch controller 6 searches the DA table 43 using the read destination MAC address “γ” as a key (Step S10 in FIG. 10).

The switch controller 6 has a DA table 4
As a result of the search of No. 3, since the enable is “OFF” and the transmission port is “m” (step S11 in FIG. 10), the path between the port # 1 that has received the packet and the transmission port #m that is the search result is connected. An instruction is given to the switch circuit 5 (step S13 in FIG. 10).

The switch circuit 5 includes a switch controller 6
Connect the path according to the instructions of. LAN node 7-1 connected to port # 1 due to connection of the path
From the active node 8-1 connected to the port #m. Working node 8-1 to LAN
The operation of transferring the packet to the node 7-1 is the same as the operation described above.

Next, an operation when the detection circuit 21-m in the failure detection circuit 2 corresponding to the port #m detects a failure will be described. Here, when the detection circuit 21-m detects the following state, it is regarded as a failure. That is, when the reception of the FSC error packet from the working node 8-1 connected to the port #m occurs frequently, when the port #m does not change while the link is disconnected, the collision occurs frequently at the port #m. The detection circuit 21-m fails.

When the detection circuit 21-m detects a failure, the failure detection circuit 2 notifies the switch controller 6 of the failure. Upon receiving the failure notification (step S21 in FIG. 11), the switch controller 6 searches the reception port table 41 using the port #m as a key (step S2 in FIG. 11).
2). The switch controller 6 turns off the enable of the port #m referred to in the search (step S23 in FIG. 11).

The switch controller 6 discards all the packets received from the port #m by setting the enable to “OFF”. That is, the active node 8-1 connected to the port #m whose enable is turned “off”
Is logically separated from the switching hub circuit 1.

Subsequently, the switch controller 6 searches for the replacement source MAC address in the SA table 42 by using the source MAC address “γ” of the working node 8-1 that has become unusable as a key (FIG. 11 steps S2
4). The switch controller 6 rewrites the referenced enable item to “on” as a result of the search (step S25 in FIG. 11).

Further, the switch controller 6 searches the DA item of the DA table 43 with the destination MAC address “γ” of the active node 8-1 (step S2 in FIG. 11).
6). The switch controller 6 rewrites the referenced enable item to “ON” as a result of the search (step S27 in FIG. 11).

The above is a series of operations when the failure detection circuit 2 detects a failure. Through the above series of operations, the reception port table 41, the SA table 42, and the DA table 43 are updated to the contents as shown in FIG. 9, respectively.

The operation when a packet is transferred from the LAN node 7-1 to the standby node 8-2 instead of the failed active node 8-1 will be described. In this case, when the switching hub circuit 1 receives a packet from the LAN node 7-1 via the port # 1, the switching hub circuit 1 stores the received packet received via the port # 1 in the packet buffer 3.

The packet buffer 3 notifies the switch controller 6 that the received packet has been stored. When receiving the storage notification, the switch controller 6 searches the reception port table 41 in the memory 4 using the port number “1” that has received the received packet as a key.

The switch controller 6 reads the destination MAC address “γ” from the received packet stored in the packet buffer 3 because the enable of the port number 1 referred to by this search is “ON”. The switch controller 6 searches for the DA item in the DA table 43 using the read destination MAC address “γ”.

As a result of the search, the switch controller 6 refers to “ON” as an enable item, “δ” as a replacement DA item, and “n” as a transmission port. Based on the search result, the switch controller 6 first rewrites the destination MAC address of the stored received packet to “δ” referred to from “γ”.

Thereafter, the switch controller 6 instructs the switch circuit 5 to connect a path between the input port # 1 and the port #n referenced from the DA table 43. In this way, the received packet stored in the packet buffer 3 is transferred to the standby node 8-2 connected to the port #n through the path in the switch circuit 5.

By the above operation, the LAN node 7-1
Are transferred to the protection node 8-2. That is, the standby node 8-2 switches to the active node 8-1 and receives the packet.

The operation when the standby node 8-2 transfers a packet to the LAN 7-1 in place of the failed active node 8-1 will be described. In this case, the switching hub circuit 1 receives a packet from the standby node 8-2 via the port #n. The packet buffer 3 transfers the received packet to a buffer 31-n in the packet buffer 3.
To be stored.

The packet buffer 3 notifies the switch controller 6 that the received packet has been stored. Upon receiving the storage notification, the switch controller 6 searches the reception port table 41 in the memory 4 using the port number “n” that has received the reception packet as a key.

As a result of the grinding, the switch controller 6 transmits the destination MAC address “α” from the received packet stored in the packet buffer 3 because the enable of the referenced port number “n” is “ON”. The original MAC address “δ” is read.

The switch controller 6 searches for an SA item in the SA table 42 using the read source MAC address “δ” as a key. As a result of the search, the switch controller 6 refers to “ON” as the enable item and “γ” as the replacement SA item. As a result of this search, the switch controller 6 rewrites the source MAC address of the stored received packet from “δ” to “γ”.

The switch controller 6 uses the read destination MAC address “α” as a key to set the DA table 4
Search for the 3 DA item. As a result of the search, the switch controller 6 refers to “OFF” as an enable item and “1” as a transmission port item.

As a result of the search, the switch controller 6 instructs the switch circuit 5 to connect the path between the port having the port number “n”, which is the receiving port, and the port # 1 searched from the DA table 43. As described above, the received packet stored in the packet buffer 3 is transferred to the LAN node 7-1 connected to the port # 1 through the path in the switch circuit 5.

By the above operation, the LAN node 7-1
Is the active node 8-1 in which all packets addressed to the LAN node 7-1 transferred by the standby node 8-2 have become unusable.
Received as a packet transferred from. That is, the active node 8-1 is switched to the standby node 8-2.

FIG. 12 is a block diagram showing a configuration of a switching hub circuit according to another embodiment of the present invention. The configuration is the same as that of the embodiment of the present invention except that an external interface 11 is added to the switching hub circuit 10 according to another embodiment of the present invention, and the same components are denoted by the same reference numerals. The operation of the same component is the same as the operation of the embodiment of the present invention.

The external interface 11 is connected to an external terminal 12 such as a personal computer. Each table in the memory 4 can be rewritten from the connected external terminal 12. In other words, the nodes can be switched and the nodes can be disconnected by manual operation.

As described above, with the above configuration, a failed node can be disconnected from the network, and the failed node can be switched to a spare node, so that the system can be easily duplicated. it can. Therefore, a highly reliable system can be easily constructed by switching the failed node to the spare node.

In order to duplicate the system, a switching device for switching the transmission line is conventionally required, but by using the switching hub circuit 1, the switching device for the transmission line is not required. , A highly reliable system can be easily constructed.

[0081]

As described above, according to the present invention, a plurality of nodes are connected, and a destination address in a packet transmitted from one of the plurality of nodes is interpreted to determine a destination address of another node. In a switching hub circuit that controls which node relays the packet, by duplicating the destination address of the packet, the system can be easily duplexed, and the faulty node can be separated from the network to improve the reliability of the network. There is an effect that can be improved.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a switching hub circuit according to one embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a detection circuit of the failure detection circuit of FIG.

FIG. 3 is a block diagram illustrating a configuration of a buffer of the packet buffer of FIG. 1;

FIG. 4 is a block diagram showing a configuration of a system using a switching hub circuit according to one embodiment of the present invention.

FIG. 5 is a diagram showing an example of packet transfer in the system shown in FIG.

FIG. 6 is a diagram showing a format of a packet.

FIG. 7 is a diagram showing an example of packet transfer at the time of failure in the system shown in FIG. 4;

8 is a diagram illustrating a configuration example of each table in a memory during packet transfer between the LAN node and the active node in FIG. 1;

FIG. 9 is a diagram showing an example of contents updated after detecting a failure in each table in the memory shown in FIG. 8;

FIG. 10 is a flowchart illustrating an operation of the switch controller of FIG. 1;

FIG. 11 is a flowchart showing an operation of the switch controller when the failure detection circuit of FIG. 1 detects a failure.

FIG. 12 is a block diagram showing a configuration of a switching hub circuit according to another embodiment of the present invention.

FIG. 13 is a diagram illustrating an example of a conventional star topology.

[Explanation of symbols]

 1, 10 switching hub circuit 2 failure detection circuit 3 packet buffer 4 memory 5 switch circuit 6 switch controller 7-1, 7-2 LAN node 8-1 working node 8-2 standby node 11 external interface 12 external terminal 21- 1, 21-2, 21-m, 21-n detection circuit 22-1 link disconnection detection circuit 23-1 link disconnection timer 24-1 FCS error detection circuit 25-1 FSC counter 26-1 collision detection circuit 27-1 collision Counter 28 OR circuit 31-1, 31-2, 31-m, 31-n buffer 32-1 Dual port RAM 33-1 Reception detection circuit 34-1 RAM control circuit 35-1 Storage address counter 36-1 DA address register 37-1 SA Address Register 41 Receive Port Table 4 SA table 43 DA port table

Claims (6)

[Claims] A plurality of nodes are connected, and a destination address in a packet transmitted from one of the plurality of nodes is interpreted to determine to which of the other nodes the packet is to be relayed. A switching hub circuit for controlling, comprising means for changing a destination address of the packet. 2. The switching hub circuit according to claim 1, further comprising: means for detecting a failure of each of the plurality of nodes; and means for disconnecting the node at which the failure has been detected. 3. The switching hub circuit according to claim 1, further comprising means for switching a node in which the failure has been detected to a preset spare node. 4. A method in which each of a plurality of nodes is connected via a corresponding transmission line and interprets a destination address in a packet transmitted from one of the plurality of nodes based on a preset table. A switching hub circuit for controlling which of the other nodes relays the packet, wherein the means for detecting a failure of each of the plurality of nodes and the transmission path, and wherein the address of the packet is Means for replacing the address with an address pre-recorded in the table when the address is any one of the detected node and the node corresponding to the transmission line in which the failure has been detected. Switching hub circuit. 5. The switching hub circuit according to claim 4, further comprising means for disconnecting a node in which the failure is detected and a node corresponding to the transmission line in which the failure is detected from a system. 6. The switching hub circuit according to claim 4, further comprising means for switching a node in which the failure has been detected to a preset spare node.