JPH11275461A - Video switching device - Google Patents

Abstract

(57) [Problem] To provide a video switching device that inputs a plurality of videos that are not synchronized with each other and switches the video in video frame units with a small buffer amount. SOLUTION: Video input means (210, 22) for switching and inputting a plurality of video signals every three frame times.
0, 230) and write control means (313, 324) for selectively inputting the video output from the video input means over two frame periods and controlling the period for writing video information to the delay buffer. Buffer (31
4,324) and the phase difference absorbing means (310, 32).
0), and multiplexing means 40 for reading and multiplexing video information from the delay buffers of the two phase difference absorbing means.
By providing 0, a plurality of images that are not synchronized can be switched in frame units.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a video switching device for inputting a plurality of videos and switching to a desired video and outputting the video, and in particular, a video switching unit capable of switching a video input that is not vertically synchronized in video frame units. The present invention relates to a video switching device having the same.

[0002]

2. Description of the Related Art Conventionally, as a video switching device for inputting a plurality of videos, switching to a desired video and outputting the desired video, Japanese Unexamined Patent Publication No.
No. 91365. In this publication, when a plurality of videos are to be switched and recorded on a field basis, the field and the burst are made continuous.

In Japanese Patent Application Laid-Open No. Hei 6-253213, a series of video signals is obtained in which a plurality of video signals that are not synchronized with each other are sequentially switched so that no video disturbance occurs.

[0004]

Problems to be Solved by the Invention
This publication is disclosed on the assumption that input images are synchronized with each other. In a video surveillance system in which a plurality of camera images are switched and recorded, a camera capable of external synchronization is expensive. Further, a device for generating an external synchronization signal is required, and the system becomes expensive. Therefore, video switching is required for cameras that are not synchronized with each other.

On the other hand, Japanese Patent Laying-Open No. 6-253213 discloses a camera switching device which operates even when cameras are not synchronized with each other. However, according to the publication, the same field is continuously output a plurality of times, so that it is not possible to switch in units of video frames or video fields.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a video switching apparatus capable of inputting a plurality of videos that are not synchronized with each other and switching the video in video frame or video field units.

[0007]

According to the present invention, at least three sets of video input means for switching and inputting a plurality of video signals from a plurality of cameras for at least three frame times are provided. The video output from the video input means is selectively input over a two-frame period, and further, the video information is stored in the delay buffer by controlling the writing period to the delay buffer based on the frame synchronization information input from the video input means. Two sets of phase difference absorbing means for writing are provided, and multiplexing means for reading and multiplexing image information from the delay buffers in the two phase difference absorbing means are provided, so that a plurality of unsynchronized images are switched in frame units. is there.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS According to the first aspect of the present invention, there are provided three sets of video input means for switching and inputting a plurality of video signals every three frame times, and outputting from the video input means. A video control unit for selectively inputting the video to be input over a two-frame period, and further controlling the period for writing the video information to the delay buffer based on the frame synchronization information input from the video input unit, and writing the video information. Two phase difference absorbing means comprising a delay buffer
A set, and multiplexing means for reading and multiplexing the video information from the delay buffers in the two phase difference absorbing means.

According to a second aspect of the present invention, there are provided four or more sets of video input means for inputting a plurality of video signals over three or more frame times, and a video output from the video input means. Writing control means for selectively inputting over two frame periods and further controlling a period for writing video information to the delay buffer based on the frame synchronization information input from the video input means, and a delay buffer for writing video information; And a multiplexing means for reading and multiplexing the video information from the delay buffers in the two phase difference absorbing means.

According to a third aspect of the present invention, in the video switching apparatus according to the first or second aspect, the write control means controls so as not to write a specific section of the video into the delay buffer. It is characterized by the following.

According to a fourth aspect of the present invention, in the video switching apparatus according to the first or second aspect, the writing control means controls whether a constant video level in a vertical or horizontal synchronization period of the video is maintained. The present invention is characterized in that a continuous section is controlled not to be written in the delay buffer.

According to a fifth aspect of the present invention, in the video switching device according to the third or fourth aspect, the video switching device includes video level generating means for generating a video signal level, and The means reproduces the video of the entire section by multiplexing the video of the video section not written in the delay buffer with the signal output from the video level generating means.

According to a sixth aspect of the present invention, in the first to fifth aspects, the time unit of the image input means inputting an image and the phase difference absorbing means inputting the image is a time unit. It is characterized by being a video field time length.

Hereinafter, embodiments of the present invention will be described with reference to FIGS.
This will be described with reference to FIG. (Embodiment 1) FIG. 1 shows a video switching device connected to five cameras. 2 and 3 are timing charts of main parts in FIG.

In FIG. 1, reference numeral 10 denotes a video switching device;
0, 220 and 230 are video input means, 211, 221, and 231 are input video selection means, 212, 222, and 232 are synchronization detection means, 310 and 320 are phase difference absorption means, 31
1 and 321 are selection means, 312 and 322 are analog-digital conversion means, 313 and 323 are writing control means, 3
14 and 324 are delay buffers, 400 is multiplexing means, 50
0 is a selection timing generator, 600 is a read timing generator, and 700 is a video level generator. Also,
101 to 105 are cameras.

FIG. 2 is a timing chart at the timings t _{1 to} t ₉ of the camera and the image input means in the _first half of the apparatus, and FIG. 3 is the same timing t ₁ to t ₉ of the phase difference absorbing means and the multiplexing means in the second half of the apparatus. shows a timing diagram in t _9. Here, the interval between the timing time t ₁ ~t ₉ is equivalent to a period of a video frame.

The cameras connected as image sources to the image switching device 10 include a camera A (101) to a camera E (1).
05), the vertical synchronization between the cameras is not established, and the vertical synchronization positions are not aligned as shown in the camera outputs (camera A output to camera E output) in FIG.

Hereinafter, the operation of the video switching device 10 will be described. Three video input means (210, 220, 23
0), the camera image specified at the timing indicated by the selection timing generation means 500 is input to the input image selection means (21).
1, 221, 231) respectively. Selection of a camera image to be input is performed in the order of the video input means 210, the video input means 220, and the video input means 230.
At the timing shown in FIG. 2, the cameras are selected in the order of camera A, camera B, camera C, camera D, and camera E.

Hereinafter, the operation of the video input means will be described using the video input means 210 as an example of the video input means. In the video input unit 210, the input video selection unit 211 selects the same camera video from five camera videos over a three-frame period according to an instruction from the selection timing generation unit 500. In FIG. 2, after selecting camera A for three frame periods, camera D is selected for three frame periods. Then
Camera B is selected for three frame periods. As described above, the video is selected during the three frame periods. However, as in the case of selecting the camera D and the subsequent selection of the camera B, the switching may be performed in the middle of the video frame. Two frames in three frame periods are not interrupted.

The image obtained by the selection is sent to the synchronization detecting means 2.
It is conveyed to 12. The synchronization detecting unit 212 reproduces a video clock based on an input video, detects a frame, and displays a frame break. The synchronization pulse signal in the video input means 210 shown in FIG. 2 indicates detection of frame synchronization. As shown in FIG. 2, a clock synchronized with the input video is reproduced within the first frame time, and frame synchronization is established. Similarly, the video input unit 220 and the video input unit 230 select the designated camera and perform the clock reproduction and the frame detection operation.

Two phase difference absorbing means (310, 320)
Selects and inputs a video output from the video input means (210, 220, 230). The selection timing generating means 500 instructs which video input means to select. Hereinafter, the operation of the phase difference absorbing unit 310 will be described as a representative of the phase difference absorbing unit.

In the phase difference absorbing means 310, the selecting means 31
The video input means is selected by 1 to input a video and a clock and a frame synchronization pulse reproduced based on the video. As shown by the video input in the phase difference absorbing means 310 in FIG. 3, the selecting means 311 selects the same video input means over two frame periods. In FIG. 3, each video input shown in FIG. 2 is selected for two frame periods in the order of the video input means 210, 230, 220, 210. On the other hand, in the writing control means 313, a signal indicating the recording period of the video information to the delay buffer 314 (phase difference absorbing means 3 in FIG.
10 is generated. Then, during the synchronization period, the input video is digitally converted by the analog-digital converter 312 and written into the delay buffer 314. In FIG. 3, the recorded images A ₁ , C ₃ , E ₅ , and B ₇ in the phase difference absorbing means 310 are stored in the delay buffer 3.
Reference numeral 14 shows the information recorded as video information. The writing side of the phase difference absorbing means 320 operates in the same manner as the phase difference absorbing means 310, and the recorded images E ₀ , B ₂ , D ₅ , and A _6.
Are recorded as video information in the delay buffer 324.

The multiplexing means 400 alternately selects the phase difference absorbing means 310 and the phase difference absorbing means 320 every other frame time and reads out video information from the delay buffer. The read timing is instructed by the read timing generating means 600. The outputs of the phase difference absorbing means 310 and the phase difference absorbing means 320 in FIG.
4 and video information read from the delay buffer 324. The read video information is multiplexed and output from the multiplexing means 400 as shown in FIG.

As described above, in this embodiment, two sets of delay buffers in the phase difference absorbing means can match the phase difference between input images that are not synchronized with each other. In the above description, there are three sets of video input means,
Although one frame time is devoted to clock recovery and the like in the synchronization detecting means, the number of video input means is increased to four or more, and the time devoted to clock recovery and the like can be made longer to ensure stable clock reproduction.

Next, in this embodiment, the timing when the image input means is selected in the phase difference absorbing means and the details of the recording timing to the delay buffer will be described with reference to FIGS.

FIG. 4 shows a phase difference absorbing means (310, 320).
Shows the details of the timing near the timing of switching the video from the video input means (210, 220, 230).

Hereinafter, the phase difference absorbing means 310 will be described as a representative. The period during which the phase difference absorbing unit 310 selects the image input unit is a two-frame period as described with reference to FIG. Meanwhile, a recording period is generated based on the input of the synchronization pulse, and the video information is recorded in the delay buffer 314. However, when the phase difference absorbing unit 310 switches the input video signal from the video input unit, the clock signal is also switched at the same time. However, since the frequency of the video clock in the synchronization detecting unit is generally different, the phase difference absorbing unit 3
The clock used in 10 will be switched discontinuously,
For example, the clock width becomes narrow.

Therefore, there is a possibility that the circuit operation in the phase difference absorbing means 310 is not stable or malfunctions. Here, as a countermeasure against clock instability after switching the video input means, the write control means 31
As shown in FIG. 4, it is assumed that a time of about 100 clocks is given as the T time of the initialization period for the circuit initialization in 3. The clock used for video processing is 13.5 MH
z (for component processing) or 14.3 MHz (N
In the case of TSC, etc., the time of 100 clocks is less than 10 microseconds.

Next, a period during which video information is written to the delay buffer 314 will be described. As shown in FIG. 4, the timing at which the writing of the video information is started to the delay buffer 314 is not the head (= synchronization pulse position) of the frame to be written, but 0.5H (H
Is the horizontal scanning time: about 63 microseconds), that is, after about 32 microseconds. And delay buffer 3
Writing to 14 is continued until the next synchronization pulse position. That is, the first 0.5H of the video frame is not written, but all the subsequent sections are written to the delay buffer.

Under the above-described conditions, even if the synchronization pulse arrives immediately after the video switching, the writing control means 313 is initialized for 10 microseconds or less.
By 5H (after about 32 microseconds), the initialization of the write control means 313 has been completed, and video information other than the first 0.5H section can be reliably written to the delay buffer 314. Furthermore, no matter what the phase relationship between the camera switching timing and the synchronization pulse is, the 0.5H period from the synchronization pulse timing is not written into the delay buffer 314, and the same amount of video is output regardless of the switching timing. The information will be written to the delay buffer 314.

On the reading side of the delay buffer, output data from the video level generating means 700 is separately used for a period of 0.5H from the head position of the video frame. 0.5H
After the period of, the data read from the delay buffer is multiplexed. If the non-writing period to the delay buffer is a period in which the video signal is at a constant level (for example, a period other than the horizontal synchronization pulse position in the vertical blanking period), the video level generation unit 700 outputs a code of a certain level. And the reproduction of the unrecorded portion can be simplified.

As described above, even when the clock signal is asynchronously switched, the video can be reproduced over the entire period in consideration of the countermeasure time for preventing circuit malfunction. (Embodiment 2) FIG. 5 shows a video switching device connected to five cameras. 6 and 7 are timing charts of main parts in FIG.

FIG. 5 has almost the same configuration as FIG. 1 of the first embodiment, except that the number of video input means is three.
And 4, and each of the phase difference absorbing means is connected to two video input means.

Each unit in FIG. 5 operates in substantially the same manner as the unit of the same name in FIG. The differences in operation and function are as follows. In the first embodiment, the video input means inputs the same camera video over three frame periods. However, in the second embodiment, the video input means (25
0, 260, 270, 280) are inputting the same camera video over four frame periods. The phase difference absorbing means (350, 360) alternately obtains video signals and corresponding video clocks and synchronization pulses from the two video input means (250 and 260, 270 and 280).

According to the present embodiment, more video input means are required than in the first embodiment, but more time can be devoted to clock generation and frame synchronization detection in the synchronization detection means in the video input means. . Further, since a plurality of video input means are provided for each phase difference absorbing means, the circuit configuration in the selection timing generating means for instructing the switching timing to be given to the selecting means in the phase difference absorbing means can be simplified, or the video input can be performed with a simple configuration. Or select a signal from the means.

In FIG. 5, the selecting means in the phase difference absorbing means receives signals from the two video input means. The selection function may be configured by enabling the output.

[0037]

As described above, according to the present invention, it is possible to switch a plurality of video images not vertically synchronized with each other at a rate of 30 frames per second by using only two delay buffers. The same function can be realized with a small amount, and there is an effect that the circuit scale of the video switching device can be reduced.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a video switching device according to a first embodiment of the present invention.

FIG. 2 is a main timing chart of the first half of the video switching device according to the embodiment;

FIG. 3 is a main timing chart of the second half of the video switching device according to the embodiment;

FIG. 4 is an operation explanatory diagram of the embodiment.

FIG. 5 is a configuration diagram of a video switching device according to a second embodiment of the present invention.

FIG. 6 is a main timing chart of the first half of the video switching device according to the embodiment;

FIG. 7 is a main timing chart of the second half of the video switching device according to the embodiment;

[Explanation of symbols]

 Reference Signs List 10 video switching device 101 camera A 102 camera B 103 camera C 104 camera D 105 camera E 210, 220, 230 video input means 211, 221, 231 video input selection means 212, 222, 232 synchronization detection means 250, 260, 270, 280 Video input means 251, 261, 271, 281 Video input selection means 252, 262, 272, 282 Synchronization detection means 310, 320 Phase difference absorption means 311, 321 Selection means 312, 322 Analog-digital conversion means 313, 323 Writing Control means 314,324 Delay buffer 350,360 Phase difference absorption means 351,361 Selection means 352,362 Analog-digital conversion means 353,363 Writing control means 354,364 Delay buffer 400 Multiplexing means 500 Selection Timing generating means 600 read timing generating means 700 video level generation means

Claims (6)

[Claims] 1. A set of video input means for switching and inputting a plurality of video signals every three frame time, selecting and inputting a video output from the video input means over a two-frame period, and further comprising: Two sets of phase difference absorbing means including a write control means for controlling a period for writing video information to the delay buffer based on the frame synchronization information input from the means and a delay buffer for writing video information; Multiplexing means for reading and multiplexing video information from a delay buffer in the two phase difference absorbing means. 2. A video input means for inputting a plurality of video signals for at least three frame times, at least four sets of video input means, and a video output from the video input means are selectively input for two frame periods. Two sets of phase difference absorbing means including writing control means for controlling a period for writing video information to the delay buffer based on frame synchronization information input from the video input means and a delay buffer for writing video information; Multiplexing means for reading and multiplexing video information from a delay buffer in the two phase difference absorbing means. 3. The video switching device according to claim 1, wherein the writing control means controls so that a specific section of the video is not written into the delay buffer. 4. A writing control device according to claim 1, wherein said writing control means controls not to write a section in the vertical or horizontal synchronizing period of the video in which a constant video level continues in the delay buffer. 2. The video switching device according to 2. 5. A video switching device comprising: video level generating means for generating a video signal level; and multiplexing means for outputting a video in a video section not written in the delay buffer from the video level generating means. 5. The video switching device according to claim 3, wherein the video is reproduced by multiplexing the signals and reproducing the video in all sections. 6. The image field according to claim 1, wherein a time unit of a period during which the image input unit inputs an image and a period unit during which the phase difference absorbing unit inputs an image are image fields. Video switching device.