JPH11312704A5 - - Google Patents

Info

Publication number
JPH11312704A5
JPH11312704A5 JP1998365074A JP36507498A JPH11312704A5 JP H11312704 A5 JPH11312704 A5 JP H11312704A5 JP 1998365074 A JP1998365074 A JP 1998365074A JP 36507498 A JP36507498 A JP 36507498A JP H11312704 A5 JPH11312704 A5 JP H11312704A5
Authority
JP
Japan
Prior art keywords
aluminum
metallization
alloys
tungsten
copper
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1998365074A
Other languages
English (en)
Other versions
JPH11312704A (ja
Filing date
Publication date
Priority claimed from US08/997,682 external-priority patent/US6033984A/en
Application filed filed Critical
Publication of JPH11312704A publication Critical patent/JPH11312704A/ja
Publication of JPH11312704A5 publication Critical patent/JPH11312704A5/ja
Pending legal-status Critical Current

Links

Description

第二の異方性のエッチングの完結後及びボンドパッド溝218の最終形成が完結すると、上に置かれた金属被覆層は、任意の適当な金属被覆技術によって金属を付着させることによって直ちに形成される。金属被覆技術は、従来技術で十分に知られており、かつ例えば VLSI technology、第2版、S. M. Sze 1988年、McGraw-Hill Publishing Company に記載されている。金属被覆層を形成するのに適する金属及び合金は、例えばアルミニウム、銅、ニッケル、モリブデン、タングステン、白金、二珪化タンタル、二珪化チタン並びに前記金属の他の合金である。アルミニウム、アルミニウム合金、例えば珪化アルミニウム、銅及びタングステンは、しばしば、相互接続金属被覆のために選択される材料である。
JP10365074A 1997-12-23 1998-12-22 ボンドパッドを有するデュアルダマスク Pending JPH11312704A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US08/997,682 US6033984A (en) 1997-12-23 1997-12-23 Dual damascene with bond pads
US08/997682 1997-12-23

Publications (2)

Publication Number Publication Date
JPH11312704A JPH11312704A (ja) 1999-11-09
JPH11312704A5 true JPH11312704A5 (ja) 2006-02-02

Family

ID=25544264

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10365074A Pending JPH11312704A (ja) 1997-12-23 1998-12-22 ボンドパッドを有するデュアルダマスク

Country Status (5)

Country Link
US (1) US6033984A (ja)
EP (1) EP0926721A3 (ja)
JP (1) JPH11312704A (ja)
KR (1) KR19990063359A (ja)
TW (1) TW436930B (ja)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4651815B2 (ja) * 1998-01-23 2011-03-16 ローム株式会社 ダマシン配線および半導体装置
US6090696A (en) * 1999-10-20 2000-07-18 Taiwan Semicondutor Manufacturing Company Method to improve the adhesion of a molding compound to a semiconductor chip comprised with copper damascene structures
US6191023B1 (en) * 1999-11-18 2001-02-20 Taiwan Semiconductor Manufacturing Company Method of improving copper pad adhesion
US6417087B1 (en) * 1999-12-16 2002-07-09 Agere Systems Guardian Corp. Process for forming a dual damascene bond pad structure over active circuitry
US6838769B1 (en) 1999-12-16 2005-01-04 Agere Systems Inc. Dual damascene bond pad structure for lowering stress and allowing circuitry under pads
GB2364170B (en) * 1999-12-16 2002-06-12 Lucent Technologies Inc Dual damascene bond pad structure for lowering stress and allowing circuitry under pads and a process to form the same
US6551856B1 (en) * 2000-08-11 2003-04-22 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming copper pad redistribution and device formed
US6960496B2 (en) * 2003-04-03 2005-11-01 Taiwan Semiconductor Manufacturing Method of damascene process flow
US20060071304A1 (en) * 2004-09-29 2006-04-06 International Business Machines Corporation Structure and layout of a fet prime cell
US20060211167A1 (en) * 2005-03-18 2006-09-21 International Business Machines Corporation Methods and systems for improving microelectronic i/o current capabilities
US7425507B2 (en) * 2005-06-28 2008-09-16 Micron Technology, Inc. Semiconductor substrates including vias of nonuniform cross section, methods of forming and associated structures
US20110156260A1 (en) * 2009-12-28 2011-06-30 Yu-Hua Huang Pad structure and integrated circuit chip with such pad structure
US20120273937A1 (en) * 2011-04-30 2012-11-01 Stats Chippac, Ltd. Semiconductor Device and Method of Forming Bump Interconnect Structure with Conductive Layer Over Buffer Layer
US8575022B2 (en) * 2011-11-28 2013-11-05 International Business Machines Corporation Top corner rounding of damascene wire for insulator crack suppression
US20250062124A1 (en) * 2023-08-18 2025-02-20 Tokyo Electron Limited Methods and structures for improving etch profile of underlying layers

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2428373C2 (de) * 1974-06-12 1982-05-27 Siemens AG, 1000 Berlin und 8000 München Verfahren zum Herstellen von weichlötbaren Anschlußkontakten auf einer Halbleiteranordnung
JPS5561027A (en) * 1978-10-30 1980-05-08 Chiyou Lsi Gijutsu Kenkyu Kumiai Gas plasma etching
US5266446A (en) * 1990-11-15 1993-11-30 International Business Machines Corporation Method of making a multilayer thin film structure
US5618381A (en) * 1992-01-24 1997-04-08 Micron Technology, Inc. Multiple step method of chemical-mechanical polishing which minimizes dishing
US5773363A (en) * 1994-11-08 1998-06-30 Micron Technology, Inc. Semiconductor processing method of making electrical contact to a node
US5516710A (en) * 1994-11-10 1996-05-14 Northern Telecom Limited Method of forming a transistor
US5534462A (en) * 1995-02-24 1996-07-09 Motorola, Inc. Method for forming a plug and semiconductor device having the same
US5739563A (en) * 1995-03-15 1998-04-14 Kabushiki Kaisha Toshiba Ferroelectric type semiconductor device having a barium titanate type dielectric film and method for manufacturing the same
JP2728025B2 (ja) * 1995-04-13 1998-03-18 日本電気株式会社 半導体装置の製造方法
US5534460A (en) * 1995-04-27 1996-07-09 Vanguard International Semiconductor Corp. Optimized contact plug process
US5780337A (en) * 1996-09-23 1998-07-14 United Microelectronics Corporation Method of fabricating a bit line of a dynamic random access memory
US5877076A (en) * 1997-10-14 1999-03-02 Industrial Technology Research Institute Opposed two-layered photoresist process for dual damascene patterning

Similar Documents

Publication Publication Date Title
US11222812B2 (en) Semiconductor device with multi-layer metallization
EP1139413A3 (en) Wire bonding process
EP0721216B1 (en) A soft metal conductor and method of making
EP1492162A3 (en) A method of forming a nickel silicide layer
WO2002103782A3 (en) Barrier enhancement process for copper interconnects
EP1146552A3 (en) Interconnections to copper ICs
JP2001085438A (ja) 集積回路デバイスの製造中に銅配線を形成する方法
EP1126519A3 (en) Structure and method for bond pads of copper-metallized intergrated circuits
TW298675B (ja)
JP2004517498A5 (ja)
JP2002009076A (ja) 化学・機械的研磨(cmp)中における銅のディッシングを防止するための局部領域合金化
TW200423258A (en) Damascene process and structure thereof
WO2000075964A3 (en) Method of fabricating semiconductor device employing copper interconnect structure
TW200414363A (en) Integrated circuit structure and fabrication method thereof
KR960032684A (ko) 다층배선형성방법
EP0987752A3 (en) Improved-reliability damascene interconnects and process of manufacture
KR19990015715A (ko) 금속배선층 형성방법
JPH03286527A (ja) 配線形成方法
KR950030264A (ko) 반도체소자 금속배선 형성방법
TW575918B (en) Process for producing metal-containing thin films with a low electrical resistance
Hey et al. Selective tungsten on aluminum for improved VLSI interconnects
JPH02186634A (ja) 集積回路装置の製造方法
JPS62117368A (ja) 半導体装置
JP2809193B2 (ja) 半導体装置
JPS5918659A (ja) 多層配線の形成方法