JPH11340268A - Method for manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent cracks and current leakage due to scratches on the back surface of a wafer in the manufacture of a semiconductor device in which a solder film pattern is formed by a lift-off method. SOLUTION: An adhesive tape 10 is attached to a surface of a wafer W on which a resist pattern 7 having an opening 7a for selectively exposing a BLM film 6 and a solder film 8 covering the resist pattern 7 are formed. Removes the substrate 1 from the back surface of the wafer W by a margin d. This shaving allowance d is set to such an amount that the scratch 5 can be removed and the back surface of the wafer W can be smoothed. The smoothing means 21 used for this removal includes a grinding wheel of a grinding device,
This is a polishing cloth for a chemical mechanical polishing apparatus. Thereafter, peeling of the adhesive tape 10, peeling of the resist pattern 7, and wet back are performed to form solder balls, and the wafer W is diced. Since the stress-concentrated scratches disappear, device failure during dicing or mounting can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device in which a solder film pattern is formed by a lift-off method, and more particularly to a method of preventing device failures by smoothing the back surface of a wafer before dicing. .

[0002]

2. Description of the Related Art In order to further reduce the size of electronic devices, it is important to improve the component mounting density. Regarding semiconductor ICs, wireless bonding has been proposed in which a bare chip of an LSI is directly connected to a conductor pattern on a mounting substrate, instead of the conventional package mounting using a bonding wire and a lead frame. In particular, there is a method in which all electrode portions and corresponding connection terminals are formed on the device forming surface side of a device chip, and the device forming surface is directed downward to directly connect to a conductor pattern on a mounting board. Flip
It is called a chip bonding method, and its use is expected to expand because the assembly process can be streamlined.

A typical example of the connection terminals of the device chip is a solder ball. In recent years, a BGA (ball grid array) type LSI in which tens to hundreds of solder balls are two-dimensionally arranged in a matrix at a pitch of about 0.4 to 1.0 mm on one side of an LSI chip. Chips have also been put to practical use. Generally, solder balls are formed on a semiconductor substrate (wafer) before dicing.
Forming a solder film pattern connected to the electrode pads of
This is shrunk in a spherical shape on the electrode pad by heat treatment to be formed collectively.

FIG. 11 is a schematic sectional view of a wafer W on which a solder film pattern is formed. The steps leading to this state will be briefly described. First, the Al electrode pad 32 is patterned into a predetermined shape on the substrate 31 on which all the elements have been formed. Next, the entire surface of the substrate (wafer) is
An opening 33a facing the Al electrode pad 32 is formed by patterning this film with a passivation film 33. Subsequently, the entire surface of the wafer is covered with the first-layer polyimide film 34, and an opening 34a facing the Al electrode pad 32 is formed further inside the opening 33a. Next, the opening 34
A BLM (Ball Limiting Metal) film 36 is formed so as to cover a. The BLM film 36a is formed of Cr
A multilayer base metal film in which a film, a Cu film, and an Au film are stacked by sputtering, and the adhesion between the Al electrode pad 32a and a solder ball (see reference numeral 39 in FIG. 12) to be formed later. The purpose is to improve and prevent mutual diffusion. On the BLM film 36, a solder film pattern 38 is formed.

[0005] Subsequently, when a heating reflow is performed, the solder film pattern 38 contracts in a self-aligned manner on the BLM film 36 due to its own surface tension, and becomes a solder ball 39 as shown in FIG. Thereafter, the wafer W is diced and divided into individual LSI chips, and the solder ball forming surfaces of these LSI chips face down to face the mounting substrate, and the pre-soldered conductor pattern on the mounting substrate is When the solder balls are aligned and heated and welded, the mounting of the chip is completed.

As a method for selectively forming the solder film pattern 38 on the BLM film 36 connected to the Al electrode pad 32, an electrolytic plating method is conventionally known. There is a problem that the thickness of the solder film tends to fluctuate due to slight variations in the state and electric resistance. Variations in the thickness of the solder film in the area corresponding to one LSI chip are directly linked to variations in the height of the solder balls, so the frequency of defective mounting increases, and especially BGA packages with a large number of terminals In this case, the yield may be seriously reduced.

[0007] A lift-off method is a method that can effectively suppress such variations in the thickness of the solder film. In this method, first, a resist pattern is formed by ordinary photolithography and development processing. This resist pattern has an opening for selectively exposing a portion where a solder ball is to be formed, and in the example of FIG. 11 described above, the BLM film 36 is exposed. In this state, a solder film is formed on the entire surface of the wafer by a sputtering method or a vacuum evaporation method. This solder film is formed by a physical method,
Since it is hardly affected by various characteristics on the wafer side, the film thickness is excellent in uniformity. Moreover, the thickness of the solder film on the vertical plane is smaller than the thickness on the horizontal plane. here,
Unnecessary parts are attached to the top surface of the resist pattern,
The portion to be deposited inside the opening is a necessary portion to become a solder ball in a later process. Next, an adhesive tape is adhered to the entire surface of the wafer substantially flat, and only unnecessary portions are removed using the adhesive tape, and then the resist pattern is peeled off, so that the solder film pattern can be left only in the necessary portions.

[0008]

By the way, in a semiconductor device manufacturing process, the wafer W is subjected to an extremely large number of steps.
In addition to the above, an LSI is formed, and a number of steps are performed as described above until a solder ball is formed.
For this reason, numerous small scratches 35 are formed on the back surface of the wafer W as shown in FIG. Of these scratches 35, those deep in the thickness direction of the substrate 31 may cause cracks in the LSI chip due to stress concentration during a later dicing step or mounting on a printed wiring board, or induce current leakage during device operation. May cause serious failures.

In particular, for a chip mounted on a printed wiring board or an interposer (relay substrate) in a flip chip bonding manner like a BGA type LSI chip, the back surface of the wafer W becomes the upper surface of the chip after mounting, and It is in a state where it is easily affected by external force. This L
This is especially true when the SI chip is mounted as a bare chip. Further, when sealing using a thermosetting resin is performed, cracks are likely to occur from the scratches 35 due to thermal stress. Accordingly, an object of the present invention is to provide a method of manufacturing a semiconductor device in which a solder film pattern is formed by a lift-off method, in which a device defect due to a scratch on a back surface of a wafer can be avoided. I do.

[0010]

The inventor of the present invention focused on the fact that the adhesive tape used in the lift-off method can be used for temporary protection of the surface of a wafer. By smoothing the back side of the wafer, it is possible to remove scratches from the back side without any adverse effect on the elements and solder film already formed on the front side. It has been found that there is no place where stress is concentrated even during chip mounting, and that the problems of cracks and leak current can be solved, and the present invention has been proposed.

That is, according to the method of manufacturing a semiconductor device of the present invention, a resist pattern is formed on one main surface of a substrate (hereinafter, also referred to as a wafer), that is, on the front surface side in the same manner as in a normal lift-off method. After the entire surface of the film is applied and the adhesive tape is attached, the opposite main surface, that is, the back surface is smoothed by removing a part of the substrate in the thickness direction from the back surface, and then the adhesive tape is peeled off. This is to remove an unnecessary portion of the solder film which is adhered to the upper surface of the resist pattern. The “substrate” in the present invention is not limited to a bare semiconductor substrate, but is defined as a substrate on which all structural parts such as an element, an electrode pad, a passivation film, and a resist pattern are formed.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, a substrate (wafer) is used.
The purpose of the smoothing on the back surface side is to remove countless formed scratches. The depth of a flaw that can be generated on the back surface of a wafer in a normal semiconductor process is as large as 1 to 50 μm.
Therefore, it is sufficient that the thickness to be removed from the back side is approximately 50 to 100 μm. The smoothing is
For example, it can be performed using a grinding device provided with a grinding means such as a grindstone or a chemical mechanical polishing device provided with a polishing cloth. Hereinafter, for examples using each device,
This will be specifically described.

[0013]

Embodiment 1 In this embodiment, an example in which the back surface of a wafer is smoothed by using a grinding device will be described with reference to FIGS. 1 to 6 and FIGS.
This will be described with reference to FIG. FIG. 1 is a schematic cross-sectional view of the wafer W after the patterning of the BLM film has been completed. To briefly explain the steps leading to this state, first, the Al electrode pad 2 was patterned into a predetermined shape on the substrate 1 on which all the elements had been formed. Next, the entire surface of the wafer W was covered with a SiN passivation film 3 formed by, for example, a plasma CVD method, and this film was patterned to form an opening 3 a facing the Al electrode pad 2.

Subsequently, a photosensitive polyimide film 4 (trade name: UR-3100, manufactured by Toray Industries, Inc .; relative permittivity ε) is formed on the entire surface of the wafer.
(3.2) was applied to a thickness of about 5 μm, and the obtained coating film was subjected to g-line lithography and development processing to form an opening 4 a exposing the Al electrode pad 2. Next, a BLM (Ball LiM) that selectively covers the opening 4a is provided.
The miting metal film 6 was formed by, for example, DC sputtering. The BLM film 6 is formed by sequentially laminating a Cr film having a thickness of 0.1 μm, a Cu film having a thickness of 1.0 μm, and an Au film having a thickness of 0.1 μm from the lower layer side by a lift-off method. Only the part finally connected to the Al electrode pad 2 is left.
At this point, the back surface of the wafer W, that is, the back surface of the substrate 1 is inevitably flawed.

Next, as shown in FIG. 2, ordinary resist coating, photolithography and development were performed to form a resist pattern 7 having a thickness of about 30 μm. The resist pattern 7 has an opening 7 a for exposing the portion where the solder ball is to be formed, that is, the BLM film 6. Next, as shown in FIG. 3, a solder film 8 (97% Pb-3% Sn) having a thickness of about 30 μm is formed on the entire surface of the wafer W.
Was formed by vapor deposition. This solder film 8 is made of a resist
Although thickly deposited on the upper surface of the pattern 7 and inside the opening 7a, the film thickness on the side wall surface of the opening 7a is relatively thin. At this point, the number of scratches 5 on the back surface of the wafer W has further increased.

Next, the wafer W in this state was set on a tape application machine, and an adhesive tape 10 was applied substantially flatly on the entire surface of the wafer W as shown in FIG. This adhesive tape 1
Reference numeral 0 denotes a sheet-like base material 11 on which an adhesive layer 12 was formed. The adhesive layer 12 was attached so that the adhesive layer 12 was in contact with the solder film 8 deposited on the upper surface of the resist pattern 7.

Next, as shown in FIG. 5, the back surface of the wafer W, that is, the back surface of the substrate 1 was brought into sliding contact with the smoothing means 21 to remove only the shaving allowance d. By setting the shaving allowance d to be larger than the depth of the scratch 5, the back surface can be smoothed. In the present embodiment, for the above-mentioned smoothing, for example, a grinding device as shown in FIG. 6 was used. The grinding apparatus includes a wafer stage 22 on which a wafer W is placed, and a grinding head 2 which is disposed opposite to the wafer stage 22 and has a plurality of grindstones 24 mounted on an outer peripheral portion of a wafer facing surface.
3 is a main component. The above grindstone 24
Correspond to the smoothing means 21 in FIG. 5 described above. Wafer W
Is held on the wafer stage 22 by a vacuum suction mechanism (not shown) with the surface to be ground facing upward. Here, the wafer W is held so that the adhesive tape 10 comes into contact with the surface of the wafer stage 22. Since the wafer stage 22 is rotated in the direction of arrow B while the grinding head 23 is rotated in the direction of arrow A, uniform grinding is performed while the relative position between the surface to be ground and the grindstone 24 changes continuously. .

The grinding conditions were as follows as an example. Grinding wheel feed speed: 150 μm / min Grinding wheel rotation speed: 2500 rpm Cutting allowance (d): 100 μm By this grinding, the back surface of the wafer W was smoothed by removing the scratches 5.

Next, the wafer W in this state was set in a tape peeling machine, and the adhesive tape 10 was peeled off. With this peeling, an unnecessary portion of the solder film 8 that had been adhered to the upper surface of the resist pattern 7 was removed, and the solder film pattern 8a remained in the opening 7a. In addition, no adverse effects due to the grinding were recognized on the structure of the adhesive tape 10 and each part on the wafer W, and it was confirmed that the adhesive tape 10 exerted the surface protection effect of the wafer W during the grinding.

Next, the resist pattern 7 was removed by performing resist peeling cleaning as shown in FIG. As a result, the solder film pattern 8a that selectively covers the BLM film 6 is left. Thereafter, a flux is applied to the surface of the solder film pattern 8a,
The solder film pattern 8a was shrunk by gradually increasing the temperature in an N ₂ atmosphere to form a solder ball 9 as shown in FIG. Thereafter, the wafer W was diced and divided into individual LSI chips. Unlike the conventional process, no cracks were generated during dicing due to scratches on the back surface of the wafer. Therefore, L
The yield of SI chips has been greatly improved as compared with the conventional process.

Further, the above-mentioned LSI chip is mounted by aligning the conductor pattern on the mounting board, which has been preliminarily soldered in advance, with the solder ball 9 and heat-welding the same, and further performing necessary mounting and assembly. To produce the final product. It was confirmed that the reliability and durability including the leakage current resistance of this final product were greatly improved as compared with those manufactured conventionally.

Example 2 In this example, the back surface of the wafer after the adhesive tape 10 was applied was smoothed by chemical mechanical polishing. In this embodiment, the process until the adhesive tape 10 is attached is the same as that of the first embodiment. For the smoothing of the back surface of the wafer, a chemical mechanical polishing apparatus as shown in FIG. 7 was used. This apparatus comprises a surface plate 25 on which a polishing cloth 26 is stretched, and a polishing head 27 for holding a wafer W on a surface facing the surface plate 25.
And a nozzle 28 for discharging the polishing slurry S onto the surface of the polishing pad 26 as main components.
The polishing cloth 26 corresponds to the smoothing means 21 in FIG. 5 described above. The wafer W is held by the polishing head 27 with the surface to be polished facing downward, for example, by a vacuum suction mechanism (not shown). Here, the wafer W is held so that the adhesive tape 10 contacts the surface of the polishing head 27. Platen 25
Is rotated in the direction of arrow D, while the polishing head 27 is rotated in the direction of arrow C, so that the relative position between the polishing pad 26 and the surface to be polished of the wafer W is continuously changed so that uniform polishing is performed. Done.

The polishing conditions were as follows as an example. Polishing head rotation speed: 80 rpm Surface plate rotation speed: 80 rpm Polishing pressure: 400 g / cm ² Oscillating speed: 2 mm / sec Slurry supply speed: 40 ml / min Shaving allowance (d): 100 μm The back surface of the wafer W became smooth with the scratches 5 removed.

Thereafter, peeling of the adhesive tape 10, peeling of the resist pattern 7, wet back, dicing,
Each step of chip mounting was performed in the same manner as in Example 1. According to this embodiment, the yield of LSI chips can be improved, and the reliability and durability of the final product can be greatly improved.

Although the present invention has been described based on two embodiments, the present invention is not limited to these embodiments. For example, the details of the illustrated wafer structure, the constituent materials and dimensions of each structural part of the wafer, the forming method, the grinding conditions and polishing conditions of the back surface of the wafer, and the configuration of the grinding device and the chemical mechanical polishing device are appropriately changed and selected. , Combinations are possible.

[0026]

As is clear from the above description, according to the present invention, the adhesive tape used for forming the solder film pattern by the lift-off method is also used as a temporary surface protection film for the substrate. Since the back surface of the base is removed and smoothed with the adhesive tape attached, dicing and mounting of the LSI chip can be performed with almost no damage. Therefore, device defects such as cracks and current leaks can be effectively prevented beforehand, and the yield and reliability of final products can be significantly improved. The present invention adds a smoothing step to an existing process, but the smoothing itself can be easily performed using an existing grinding device or chemical mechanical polishing device, and does not require any special equipment. .

[Brief description of the drawings]

FIG. 1 shows an example of a process to which the present invention is applied.
FIG. 3 is a schematic cross-sectional view showing a state of a wafer on which a film has been patterned.

FIG. 2 is a schematic sectional view showing a state where resist patterning has been performed on the wafer of FIG. 1;

FIG. 3 is a schematic sectional view showing a state in which a solder film is applied to the entire surface of the wafer of FIG. 2;

FIG. 4 is a schematic cross-sectional view showing a state in which an adhesive tape is applied substantially flat to a convex portion of the wafer of FIG. 3;

FIG. 5 is a schematic cross-sectional view showing a state in which the back surface of the wafer is smoothed and scratches are removed in a state where an adhesive tape is stuck.

FIG. 6 is a schematic cross-sectional view showing a state where the back surface of the wafer is being ground using a grinding device.

FIG. 7 is a schematic cross-sectional view showing a state where the back surface of the wafer is being polished using the chemical mechanical polishing apparatus.

FIG. 8 is a schematic cross-sectional view showing a state in which an adhesive tape is peeled off and a solder film on an upper surface of a resist pattern is removed.

FIG. 9 is a schematic cross-sectional view showing a state where a resist pattern is peeled from the wafer of FIG. 8;

FIG. 10 is a schematic sectional view showing a state where solder balls are formed by heating a wafer.

FIG. 11 is a schematic cross-sectional view showing a state of a wafer on which a solder film pattern is selectively formed in a conventional process.

FIG. 12 is a schematic cross-sectional view showing a state where a solder ball is formed by contracting the solder film pattern of FIG. 11;

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Substrate 2 ... Al electrode pad 3 ... SiN passivation film 4 ... Polyimide film 5 ... Scratch 6 ... BLM film
7: resist pattern 7a: opening 8: solder film
8a: Solder film pattern 9: Solder ball 10:
Adhesive tape 11 Base material 12 Adhesive layer 21 Smoothing means 23 Grinding head 24 Grinding stone 25 Platen 26 Polishing cloth 27 Polishing head W Wafer d Shaving allowance

Claims (3)

[Claims] A first step of forming a resist pattern for selectively exposing a portion where a solder ball is to be formed on one principal surface of a substrate on which an element is formed; and a step of forming a solder pattern on the entire surface of the substrate. A second step of applying a film, a third step of applying an adhesive tape substantially flat so as to come into contact with the projections on the base over the entire surface of the base, and the base from the side opposite to the main surface of the base. A fourth step of smoothing the opposite main surface by removing a part of the solder film in the thickness direction; and removing unnecessary portions of the solder film on the upper surface of the resist pattern by peeling the adhesive tape. And a fifth step of removing the portion. 2. The method of manufacturing a semiconductor device according to claim 1, wherein, in the fourth step, the opposite main surface of the base is slidably brought into contact with a grinding means to smooth the substrate. 3. The method according to claim 1, wherein, in the fourth step, the opposite main surface of the base is smoothed by chemical mechanical polishing.