JPH11345949A5 - - Google Patents
Info
- Publication number
- JPH11345949A5 JPH11345949A5 JP1999098944A JP9894499A JPH11345949A5 JP H11345949 A5 JPH11345949 A5 JP H11345949A5 JP 1999098944 A JP1999098944 A JP 1999098944A JP 9894499 A JP9894499 A JP 9894499A JP H11345949 A5 JPH11345949 A5 JP H11345949A5
- Authority
- JP
- Japan
- Prior art keywords
- trench
- integrated circuit
- epitaxial layer
- lining
- oxide collar
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Description
【特許請求の範囲】
【請求項1】 半導体集積回路であり、前記集積回路がトレンチキャパシタを有し、前記トレンチキャパシタがエピタキシャル層を有し、前記エピタキシャル層が酸化物カラーの下方にトレンチ側面の下部を裏打ちし、酸化物カラーがトレンチの上部を裏打ちすることを特徴とする、半導体集積回路。
【請求項1】 半導体集積回路であり、前記集積回路がトレンチキャパシタを有し、前記トレンチキャパシタがエピタキシャル層を有し、前記エピタキシャル層が酸化物カラーの下方にトレンチ側面の下部を裏打ちし、酸化物カラーがトレンチの上部を裏打ちすることを特徴とする、半導体集積回路。
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/056119 | 1998-04-06 | ||
| US09/056,119 US6265741B1 (en) | 1998-04-06 | 1998-04-06 | Trench capacitor with epi buried layer |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11345949A JPH11345949A (ja) | 1999-12-14 |
| JPH11345949A5 true JPH11345949A5 (ja) | 2006-03-30 |
Family
ID=22002267
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11098944A Withdrawn JPH11345949A (ja) | 1998-04-06 | 1999-04-06 | 半導体集積回路 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6265741B1 (ja) |
| EP (1) | EP0949684A3 (ja) |
| JP (1) | JPH11345949A (ja) |
| KR (1) | KR19990082939A (ja) |
| CN (1) | CN1145214C (ja) |
| TW (1) | TW425693B (ja) |
Families Citing this family (30)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6310375B1 (en) * | 1998-04-06 | 2001-10-30 | Siemens Aktiengesellschaft | Trench capacitor with isolation collar and corresponding manufacturing method |
| US5945704A (en) * | 1998-04-06 | 1999-08-31 | Siemens Aktiengesellschaft | Trench capacitor with epi buried layer |
| US6018174A (en) * | 1998-04-06 | 2000-01-25 | Siemens Aktiengesellschaft | Bottle-shaped trench capacitor with epi buried layer |
| US6037620A (en) * | 1998-06-08 | 2000-03-14 | International Business Machines Corporation | DRAM cell with transfer device extending along perimeter of trench storage capacitor |
| US6307247B1 (en) * | 1999-07-12 | 2001-10-23 | Robert Bruce Davies | Monolithic low dielectric constant platform for passive components and method |
| JP3457236B2 (ja) * | 1999-11-05 | 2003-10-14 | 茂徳科技股▲ふん▼有限公司 | 深いトレンチキャパシター蓄積電極の製造方法 |
| DE19956078B4 (de) | 1999-11-22 | 2006-12-28 | Infineon Technologies Ag | Verfahren zur Herstellung eines Isolationskragens in einem Grabenkondensators |
| DE19957123B4 (de) * | 1999-11-26 | 2006-11-16 | Infineon Technologies Ag | Verfahren zur Herstellung einer Zellenanordnung für einen dynamischen Halbleiterspeicher |
| DE19956978B4 (de) * | 1999-11-26 | 2008-05-15 | Promos Technologies, Inc. | Verfahren zur Herstellung eines tiefen flaschenförmigen Graben-Kondensators |
| US6387772B1 (en) * | 2000-04-25 | 2002-05-14 | Agere Systems Guardian Corp. | Method for forming trench capacitors in SOI substrates |
| US6465373B1 (en) * | 2000-08-31 | 2002-10-15 | Micron Technology, Inc. | Ultra thin TCS (SiCl4) cell nitride for DRAM capacitor with DCS (SiH2Cl2) interface seeding layer |
| AUPR174800A0 (en) * | 2000-11-29 | 2000-12-21 | Australian National University, The | Semiconductor processing |
| DE10111755C1 (de) * | 2001-03-12 | 2002-05-16 | Infineon Technologies Ag | Verfahren zur Herstellung einer Speicherzelle eines Halbleiterspeichers |
| DE10120053A1 (de) * | 2001-04-24 | 2002-11-14 | Infineon Technologies Ag | Stressreduziertes Schichtsystem |
| MY144264A (en) * | 2001-11-29 | 2011-08-29 | Transform Solar Pty Ltd | Semiconductur texturing process |
| KR100442781B1 (ko) * | 2001-12-24 | 2004-08-04 | 동부전자 주식회사 | 트렌치 캐패시터를 구비한 반도체소자 및 그 제조방법 |
| DE10205077B4 (de) * | 2002-02-07 | 2007-03-08 | Infineon Technologies Ag | Halbleiterspeicherzelle mit einem Graben und einem planaren Auswahltransistor und Verfahren zu ihrer Herstellung |
| US6534824B1 (en) | 2002-02-20 | 2003-03-18 | International Business Machines Corporation | Self-aligned punch through stop for 6F2 rotated hybrid DRAM cell |
| US6734524B1 (en) | 2002-12-31 | 2004-05-11 | Motorola, Inc. | Electronic component and method of manufacturing same |
| TW584931B (en) * | 2003-04-10 | 2004-04-21 | Nanya Technology Corp | Collar dielectric process for preventing top size of deep trench from enlargement |
| US7182188B2 (en) * | 2005-02-16 | 2007-02-27 | Honeywell International, Inc. | Isolator using externally pressurized sealing bellows |
| DE102006029701B4 (de) * | 2006-06-28 | 2017-06-01 | Infineon Technologies Ag | Halbleiterbauteil sowie Verfahren zur Herstellung eines Halbleiterbauteils |
| US7982284B2 (en) | 2006-06-28 | 2011-07-19 | Infineon Technologies Ag | Semiconductor component including an isolation structure and a contact to the substrate |
| CN101409210B (zh) * | 2007-10-09 | 2010-06-02 | 南亚科技股份有限公司 | 半导体元件及其制作方法 |
| US7608908B1 (en) | 2008-05-22 | 2009-10-27 | Freescale Semiconductor, Inc. | Robust deep trench isolation |
| US8327985B2 (en) * | 2009-06-22 | 2012-12-11 | Honeywell International Inc. | Two stage vibration isolator |
| TWI826125B (zh) * | 2022-05-24 | 2023-12-11 | 南亞科技股份有限公司 | 具有多層介電質的儲存電容器 |
| US12176386B2 (en) | 2022-05-24 | 2024-12-24 | Nanya Technology Corporation | Storage capacitor with multiple dielectrics |
| US20230389267A1 (en) * | 2022-05-24 | 2023-11-30 | Nanya Technology Corporation | Method of fabricating storage capacitor with multiple dielectrics |
| GB2633551A (en) * | 2023-09-07 | 2025-03-19 | X Fab Global Services Gmbh | CMOS devices for high-voltage applications |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02111062A (ja) * | 1988-10-20 | 1990-04-24 | Matsushita Electric Ind Co Ltd | 半導体メモリの製造方法 |
| US5250829A (en) * | 1992-01-09 | 1993-10-05 | International Business Machines Corporation | Double well substrate plate trench DRAM cell array |
| SG45211A1 (en) * | 1992-01-09 | 1998-01-16 | Ibm | Double grid and double well substrate plate trench dram cell array |
| JPH0637275A (ja) * | 1992-07-13 | 1994-02-10 | Toshiba Corp | 半導体記憶装置及びその製造方法 |
| TW366585B (en) * | 1996-08-17 | 1999-08-11 | United Microelectronics Corp | Manufacturing method of low-temperature epitaxy titanium silicide |
| US5945704A (en) * | 1998-04-06 | 1999-08-31 | Siemens Aktiengesellschaft | Trench capacitor with epi buried layer |
-
1998
- 1998-04-06 US US09/056,119 patent/US6265741B1/en not_active Expired - Lifetime
-
1999
- 1999-04-01 EP EP99106682A patent/EP0949684A3/en not_active Withdrawn
- 1999-04-01 TW TW088105191A patent/TW425693B/zh not_active IP Right Cessation
- 1999-04-01 CN CNB991059719A patent/CN1145214C/zh not_active Expired - Fee Related
- 1999-04-06 KR KR1019990011817A patent/KR19990082939A/ko not_active Withdrawn
- 1999-04-06 JP JP11098944A patent/JPH11345949A/ja not_active Withdrawn
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